Make struct pcib_softc explicit in our softc.
This commit is contained in:
martin
parent
f3b6f1bea8
commit
4956be1f47
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@ -1,4 +1,4 @@
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/* $NetBSD: amdpcib.c,v 1.2 2008/03/21 12:29:38 xtraeme Exp $ */
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/* $NetBSD: amdpcib.c,v 1.3 2008/07/20 17:18:21 martin Exp $ */
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/*
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* Copyright (c) 2006 Nicolas Joly
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@ -29,7 +29,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: amdpcib.c,v 1.2 2008/03/21 12:29:38 xtraeme Exp $");
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__KERNEL_RCSID(0, "$NetBSD: amdpcib.c,v 1.3 2008/07/20 17:18:21 martin Exp $");
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#include <sys/systm.h>
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#include <sys/device.h>
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@ -37,8 +37,11 @@ __KERNEL_RCSID(0, "$NetBSD: amdpcib.c,v 1.2 2008/03/21 12:29:38 xtraeme Exp $");
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcidevs.h>
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#include "pcibvar.h"
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struct amdpcib_softc {
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/* we are calling pcibattach(), which assumes this starts like this: */
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struct pcib_softc sc_pcib;
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bus_space_tag_t sc_memt;
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bus_space_handle_t sc_memh;
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};
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@ -47,8 +50,6 @@ static int amdpcib_match(device_t, cfdata_t, void *);
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static void amdpcib_attach(device_t, device_t, void *);
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static int amdpcib_search(device_t, cfdata_t, const int *, void *);
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extern void pcibattach(struct device *, struct device *, void *);
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CFATTACH_DECL_NEW(amdpcib, sizeof(struct amdpcib_softc), amdpcib_match,
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amdpcib_attach, NULL, NULL);
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@ -1,4 +1,4 @@
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/* $NetBSD: ichlpcib.c,v 1.11 2008/04/28 20:23:40 martin Exp $ */
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/* $NetBSD: ichlpcib.c,v 1.12 2008/07/20 17:18:21 martin Exp $ */
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/*-
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* Copyright (c) 2004 The NetBSD Foundation, Inc.
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@ -39,7 +39,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ichlpcib.c,v 1.11 2008/04/28 20:23:40 martin Exp $");
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__KERNEL_RCSID(0, "$NetBSD: ichlpcib.c,v 1.12 2008/07/20 17:18:21 martin Exp $");
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#include <sys/types.h>
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#include <sys/param.h>
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@ -61,10 +61,11 @@ __KERNEL_RCSID(0, "$NetBSD: ichlpcib.c,v 1.11 2008/04/28 20:23:40 martin Exp $")
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#include <dev/ic/hpetvar.h>
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#include "hpet.h"
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#include "pcibvar.h"
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struct lpcib_softc {
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pci_chipset_tag_t sc_pc;
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pcitag_t sc_pcitag;
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/* we call pcibattach() which assumes this starts like this: */
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struct pcib_softc sc_pcib;
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struct pci_attach_args sc_pa;
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int sc_has_rcba;
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@ -115,9 +116,6 @@ static void lpcib_hpet_configure(device_t);
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struct lpcib_softc *speedstep_cookie; /* XXX */
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/* Defined in arch/.../pci/pcib.c. */
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extern void pcibattach(device_t, device_t, void *);
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CFATTACH_DECL_NEW(ichlpcib, sizeof(struct lpcib_softc),
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lpcibmatch, lpcibattach, NULL, NULL);
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@ -181,8 +179,6 @@ lpcibattach(device_t parent, device_t self, void *aux)
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struct lpcib_softc *sc = device_private(self);
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struct lpcib_device *lpcib_dev;
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sc->sc_pc = pa->pa_pc;
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sc->sc_pcitag = pa->pa_tag;
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sc->sc_pa = *pa;
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for (lpcib_dev = lpcib_devices; lpcib_dev->vendor; ++lpcib_dev) {
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@ -213,7 +209,8 @@ lpcibattach(device_t parent, device_t self, void *aux)
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sc->sc_rcbat = sc->sc_pa.pa_memt;
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rcba = pci_conf_read(sc->sc_pc, sc->sc_pcitag, LPCIB_RCBA);
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rcba = pci_conf_read(sc->sc_pcib.sc_pc, sc->sc_pcib.sc_tag,
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LPCIB_RCBA);
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if ((rcba & LPCIB_RCBA_EN) == 0) {
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aprint_error_dev(self, "RCBA is not enabled");
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return;
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@ -250,8 +247,8 @@ static bool
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lpcib_suspend(device_t dv PMF_FN_ARGS)
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{
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struct lpcib_softc *sc = device_private(dv);
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pci_chipset_tag_t pc = sc->sc_pc;
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pcitag_t tag = sc->sc_pcitag;
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pci_chipset_tag_t pc = sc->sc_pcib.sc_pc;
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pcitag_t tag = sc->sc_pcib.sc_tag;
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/* capture PIRQ routing control registers */
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sc->sc_pirq[0] = pci_conf_read(pc, tag, LPCIB_PCI_PIRQA_ROUT);
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@ -279,8 +276,8 @@ static bool
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lpcib_resume(device_t dv PMF_FN_ARGS)
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{
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struct lpcib_softc *sc = device_private(dv);
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pci_chipset_tag_t pc = sc->sc_pc;
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pcitag_t tag = sc->sc_pcitag;
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pci_chipset_tag_t pc = sc->sc_pcib.sc_pc;
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pcitag_t tag = sc->sc_pcib.sc_tag;
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/* restore PIRQ routing control registers */
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pci_conf_write(pc, tag, LPCIB_PCI_PIRQA_ROUT, sc->sc_pirq[0]);
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@ -317,11 +314,12 @@ pmtimer_configure(device_t self)
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* Check if power management I/O space is enabled and enable the ACPI_EN
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* bit if it's disabled.
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*/
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control = pci_conf_read(sc->sc_pc, sc->sc_pcitag, LPCIB_PCI_ACPI_CNTL);
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control = pci_conf_read(sc->sc_pcib.sc_pc, sc->sc_pcib.sc_tag,
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LPCIB_PCI_ACPI_CNTL);
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if ((control & LPCIB_PCI_ACPI_CNTL_EN) == 0) {
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control |= LPCIB_PCI_ACPI_CNTL_EN;
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pci_conf_write(sc->sc_pc, sc->sc_pcitag, LPCIB_PCI_ACPI_CNTL,
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control);
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pci_conf_write(sc->sc_pcib.sc_pc, sc->sc_pcib.sc_tag,
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LPCIB_PCI_ACPI_CNTL, control);
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}
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/* Attach our PM timer with the generic acpipmtimer function */
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@ -503,12 +501,12 @@ tcotimer_disable_noreboot(device_t self)
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} else {
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pcireg_t pcireg;
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pcireg = pci_conf_read(sc->sc_pc, sc->sc_pcitag,
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pcireg = pci_conf_read(sc->sc_pcib.sc_pc, sc->sc_pcib.sc_tag,
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LPCIB_PCI_GEN_STA);
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if (pcireg & LPCIB_PCI_GEN_STA_NO_REBOOT) {
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/* TCO timeout reset is disabled; try to enable it */
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pcireg &= ~LPCIB_PCI_GEN_STA_NO_REBOOT;
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pci_conf_write(sc->sc_pc, sc->sc_pcitag,
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pci_conf_write(sc->sc_pcib.sc_pc, sc->sc_pcib.sc_tag,
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LPCIB_PCI_GEN_STA, pcireg);
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if (pcireg & LPCIB_PCI_GEN_STA_NO_REBOOT)
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goto error;
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@ -561,10 +559,10 @@ speedstep_configure(device_t self)
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uint8_t pmcon;
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/* Enable SpeedStep if it isn't already enabled. */
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pmcon = pci_conf_read(sc->sc_pc, sc->sc_pcitag,
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pmcon = pci_conf_read(sc->sc_pcib.sc_pc, sc->sc_pcib.sc_tag,
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LPCIB_PCI_GEN_PMCON_1);
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if ((pmcon & LPCIB_PCI_GEN_PMCON_1_SS_EN) == 0)
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pci_conf_write(sc->sc_pc, sc->sc_pcitag,
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pci_conf_write(sc->sc_pcib.sc_pc, sc->sc_pcib.sc_tag,
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LPCIB_PCI_GEN_PMCON_1,
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pmcon | LPCIB_PCI_GEN_PMCON_1_SS_EN);
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@ -713,7 +711,7 @@ lpcib_hpet_configure(device_t self)
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uint32_t hpet_reg, val;
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if (sc->sc_has_ich5_hpet) {
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val = pci_conf_read(sc->sc_pc, sc->sc_pcitag,
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val = pci_conf_read(sc->sc_pcib.sc_pc, sc->sc_pcib.sc_tag,
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LPCIB_PCI_GEN_CNTL);
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switch (val & LPCIB_ICH5_HPTC_WIN_MASK) {
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case LPCIB_ICH5_HPTC_0000:
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@ -732,7 +730,7 @@ lpcib_hpet_configure(device_t self)
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return;
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}
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val |= sc->sc_hpet_reg | LPCIB_ICH5_HPTC_EN;
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pci_conf_write(sc->sc_pc, sc->sc_pcitag,
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pci_conf_write(sc->sc_pcib.sc_pc, sc->sc_pcib.sc_tag,
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LPCIB_PCI_GEN_CNTL, val);
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} else if (sc->sc_has_rcba) {
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val = bus_space_read_4(sc->sc_rcbat, sc->sc_rcbah,
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