Add minimal support for vr4122/vrc4173 pci.
This commit is contained in:
enami
parent
6b358ba879
commit
4553af4ee5
438
sys/arch/hpcmips/conf/MPC303
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438
sys/arch/hpcmips/conf/MPC303
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@ -0,0 +1,438 @@
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#
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# $NetBSD: MPC303,v 1.1 2001/06/13 07:32:48 enami Exp $
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# From: NetBSD: GENERIC,v 1.91 2001/05/06 14:25:16 takemura Exp
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#
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# Kernel configuration file for Victor MP-C303; enami's test machine.
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#
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include "arch/hpcmips/conf/std.hpcmips"
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#ident "GENERIC-$Revision: 1.1 $"
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maxusers 10
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options MIPS3 # R4000/R4400/R4600 CPUs
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# Support for specific models of H/PC MIPS
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options MIPS3_4100 # VR4100 core
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options VR41XX # NEC VR41xx series
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options VR4122 # NEC VR4122
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options NOFPU # No FPU
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options SOFTFLOAT # emulate FPU insn
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options MIPS3_L2CACHE_ABSENT
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# Standard system options
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options DDB # in-kernel debugger
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#options DDB_ONPANIC=0 # don't enter debugger on panic
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#options KGDB # remote debugger
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options DIAGNOSTIC # extra kernel debugging checks
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#options DEBUG # extra kernel debugging support
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options KTRACE # system call tracing support
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options MSGBUFSIZE=16384 # dmesg buffer size
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## UVM options.
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#options UVM_PAGE_TRKOWN
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#options UVMHIST
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#options UVMHIST_PRINT # Loud!
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#options SCSIVERBOSE # human readable SCSI error messages
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#options PCMCIAVERBOSE # verbose PCMCIA configuration messages
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#options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT
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options RTC_OFFSET=-540 # JST-9
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#options RTC_OFFSET=480 # PST8
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# In NO RTC_OFFSET , inherit RTC_OFFSET
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# from Windows CE.
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options NTP # network time protocol
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#options UCONSOLE # users can redirect console (unsafe)
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#options WINCE_DEFAULT_SETTING # Debugging use
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#options DUMP_GIU_LEVEL2_INTR # Debugging use
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#options DEBUG_FIND_PCIC # Debugging use XXX harmful don't define until read source.
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#options SYSCALL_DEBUG # for debug
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#options HPCMIPS_L1CACHE_DISABLE # disable L1 cache for debug
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#options HPCMIPS_FLUSHCACHE_XXX # for debug
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# Filesystem options
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file-system FFS # fast filesystem with user and group quotas
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file-system MFS # memory-based filesystem
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file-system NFS # Sun NFS-compatible filesystem (client)
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#file-system LFS # Log-based filesystem (still experimental)
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file-system CD9660 # ISO 9660 + Rock Ridge file system
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file-system MSDOSFS # MS-DOS file system
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#file-system FDESC # /dev/fd
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file-system KERNFS # /kern (kernel informational filesystem)
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#file-system NULLFS # loopback file system
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#file-system OVERLAY # overlay file system
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#file-system PORTAL # portal filesystem (still experimental)
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file-system PROCFS # /proc
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#file-system UMAPFS # NULLFS + uid and gid remapping
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file-system UNION
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#options NFSSERVER # Sun NFS-compatible filesystem (server)
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options SOFTDEP # FFS soft updates support.
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#options QUOTA # UFS quotas
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options VNODE_OP_NOINLINE # don't inline vnode op calls
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# Networking options
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#options GATEWAY # IP packet forwarding
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options INET # IP + ICMP + TCP + UDP
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options INET6 # IPV6
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#options IPSEC # IP security
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#options IPSEC_ESP # IP security (encryption part; define w/ IPSEC)
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#options IPSEC_DEBUG # debug for IP security
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#options MROUTING # Multicast routing support
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#options ISO # OSI networking
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#options TPIP # TPIP
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#options EON # OSI tunneling over IP
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#options CCITT,LLC,HDLC # X.25
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# NetBSD backwards compatibility
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options COMPAT_43
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#options NFS_BOOT_DHCP
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options NFS_BOOT_BOOTPARAM
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options VR_FIND_DRAMLIM=0x03800000
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#config netbsd root on ? type ?
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config netbsd root on aue0 type nfs
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# WS console uses SUN or VT100 terminal emulation
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options WSEMUL_VT100
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#options WSDISPLAY_DEFAULTSCREENS=4
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#options FONT_VT220L8x8
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options FONT_VT220L8x10
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# compatibility to other console drivers
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options WSDISPLAY_COMPAT_PCVT # emulate some ioctls
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options WSDISPLAY_COMPAT_SYSCONS # emulate some ioctls
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options WSDISPLAY_COMPAT_USL # VT handling
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options WSDISPLAY_COMPAT_RAWKBD # can get raw scancodes
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#
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# Hpckbd will set key board layout appropriately. You can use option
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# 'PCKBD_LAYOUT' to overrite the default layout.
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#
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#options PCKBD_LAYOUT="(KB_US | KB_SWAPCTRLCAPS | KB_MACHDEP)"
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# temporally power management
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hpcapm0 at mainbus0 # power management
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apmdev0 at hpcapm0 # APM
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vrip* at mainbus0
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vrbcu* at vrip? addr 0x0f000000 size 0x20
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vrcmu* at vrip? addr 0x0f000060 size 0x20
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vrrtc* at vrip? addr 0x0f000100 size 0x20 intr 2
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#vrkiu* at vrip? addr 0x0b000180 size 0x20 intr 7
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#hpckbd* at vrkiu?
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options CONSPEED=19200
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com* at vrip? addr 0x0f000800 size 0x20 intr 9 pwctl PWCTL_COM0
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vrgiu* at vrip? addr 0x0f000140 size 0x20 intr 8
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vrpmu* at vrip? addr 0x0f0000c0 size 0x20 intr 1 # power switch
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#vrdsu* at vrip? addr 0x0b0000e0 size 0x08
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#vrpiu* at vrip? addr 0x0b000120 size 0x1a0 intr 5
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vrled* at vrip? addr 0x0f000180 size 0x10 intr 17
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vrpciu* at vrip? addr 0x0f000c00 size 0x200 intr 22
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# PCI bus support
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options PCIVERBOSE
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pci* at vrpciu?
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# MQ200
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#mqvideo0 at pci? dev ? function ?
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#hpcfb* at mqvideo?
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# VRC4173
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vrc4173bcu* at pci? dev ? function ? # VRC4173 BCU
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#vrc4173cmu* at vrc4173bcu? # VRC4173 CMU
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#vrc4173piu* at vrc4173bcu? # VRC4173 PIU
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#vrc4173kiu* at vrc4173bcu? # VRC4173 KIU
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#vrc4173cardu* at pci? dev ? function ? # VRC4173 CARDU
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#pcmcia* at vrc4173cardu?
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# PCI USB controllers
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ohci* at pci? dev ? function ? # Open Host Controller
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options OHCI_DEBUG, USB_DEBUG, UHUB_DEBUG
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# USB bus support
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usb* at ohci?
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# USB Hubs
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uhub* at usb?
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uhub* at uhub? port ? configuration ? interface ?
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# USB Generic driver
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ugen* at uhub? port ?
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# USB Ethernet adapters
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aue* at uhub? port ? # ADMtek AN986 Pegasus based adapters
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# MII/PHY support
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ukphy* at mii? phy ? # generic unknown PHYs
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options MQ200_DEBUG
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#options MQ200_USECRT
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#mqvideo0 at vrip? addr 0x0a000000 size 0x800000 # MQ200 video controller
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#hpcfb* at mqvideo?
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#ite8181video0 at vrip? addr 0x0a000000 size 0x800000 # ITE8181 video controller
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#hpcfb* at ite8181video?
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#vrc4172pwm* at vrip? addr 0x15003880 size 0x6 platform NEC_MCR_430
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#vrc4172pwm* at vrip? addr 0x15003880 size 0x6 platform NEC_MCR_510
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#vrc4172pwm* at vrip? addr 0x15003880 size 0x6 platform NEC_MCR_520
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#vrc4172pwm* at vrip? addr 0x15003880 size 0x6 platform NEC_MCR_520A
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#vrc4172pwm* at vrip? addr 0x15003880 size 0x6 platform NEC_MCR_530
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#vrc4172pwm* at vrip? addr 0x15003880 size 0x6 platform NEC_MCR_SIGMARION
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#vrc4172pwm* at vrip? addr 0x15003880 size 0x6 platform NEC_MCR_530A
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#vrc4172pwm* at vrip? addr 0x15003880 size 0x6 platform NEC_MCR_700
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# Workstation Console attachments
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bivideo0 at mainbus0
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hpcfb* at bivideo0
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wsdisplay* at hpcfb?
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#wskbd* at hpckbd? mux 1
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#wsmouse* at vrpiu? mux 0
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btnmgr0 at mainbus0
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wskbd* at btnmgr0 mux 1
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#
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# hpcmips isa? bus irq locator means:
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#
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# 0x0000000f ISA IRQ#
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# 0x00ff0000 GPIO port#
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# 0x01000000 interrupt signal hold/through (1:hold/0:though)
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# 0x02000000 interrupt detection level (1:low /0:high )
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# 0x04000000 interrupt detection trigger (1:edge/0:level )
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#
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# MC-R300, MC-R500
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# Button to GPIO port # mapping
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# + REC button : 4
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# + Open/Close button: 6
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# (PCIC-ISA : 9)
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# (COM power:14)
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#
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# MC-R510
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# Button to GPIO port # mapping
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# + Open/Close button: 3
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# (PCIC-ISA : 9)
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# (COM power:14)
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#
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# MC-R530
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# Button to GPIO port # mapping
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# + Open/Close button: 3
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# + Application button: 2
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# (PCIC-ISA : 9)
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# (COM power:46)
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#
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# MC-R700
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# Button to GPIO port # mapping
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# + Open/Close button: 3
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# (PCIC-ISA : 9)
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# (COM power:46)
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#
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# MC-CS
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# Button to GPIO port # mapping
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# (PCIC-ISA : 9)
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# (COM power:14)
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#
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# IBM WorkPad z50
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# Button to GPIO port # mapping
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# + REC button : 1
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# + Application button? : 2
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# (PCIC-ISA : 9)
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#
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button0 at vrgiu? platform NEC_MCR_3XX id BTN_REC port 4
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button0 at vrgiu? platform NEC_MCR_500 id BTN_REC port 4
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button0 at vrgiu? platform IBM_WORKPAD id BTN_REC port 1 active 0
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button1 at vrgiu? platform NEC_MCR_430 id BTN_COVER port 3
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button1 at vrgiu? platform NEC_MCR_510 id BTN_COVER port 3
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button1 at vrgiu? platform NEC_MCR_520 id BTN_COVER port 3
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#button1 at vrgiu? platform NEC_MCR_520A id BTN_COVER port 3
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button1 at vrgiu? platform NEC_MCR_530 id BTN_COVER port 3
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#button1 at vrgiu? platform NEC_MCR_530A id BTN_COVER port 3
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button1 at vrgiu? platform NEC_MCR_SIGMARION id BTN_COVER port 3
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button1 at vrgiu? platform NEC_MCR_7XX id BTN_COVER port 3
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button1 at vrgiu? platform NEC_MCR_3XX id BTN_COVER port 6
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button1 at vrgiu? platform NEC_MCR_500 id BTN_COVER port 6
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button2 at vrgiu? platform NEC_MCR_530 id BTN_APP0 port 2
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button2 at vrgiu? platform IBM_WORKPAD id BTN_APP0 port 2 active 0
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button3 at vrgiu? platform NEC_MCCS id BTN_LIGHT port 8
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pwctl0 at vrgiu? platform NEC_MCR_3XX id PWCTL_COM0 port 14
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pwctl0 at vrgiu? platform NEC_MCR_430 id PWCTL_COM0 port 46
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pwctl0 at vrgiu? platform NEC_MCR_500 id PWCTL_COM0 port 14
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pwctl0 at vrgiu? platform NEC_MCR_530 id PWCTL_COM0 port 46
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pwctl0 at vrgiu? platform NEC_MCR_530A id PWCTL_COM0 port 46
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#pwctl0 at vrgiu? platform NEC_MCR_SIGMARION id PWCTL_COM0 port 46
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pwctl0 at vrgiu? platform NEC_MCR_7XX id PWCTL_COM0 port 46
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pwctl0 at vrgiu? platform NEC_MCCS id PWCTL_COM0 port 14
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pwctl1 at vrgiu? platform NEC_MCR_300 id PWCTL_LCDLIGHT port 45
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pwctl1 at vrgiu? platform NEC_MCR_FORDOCOMO id PWCTL_LCDLIGHT port 45
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pwctl1 at vrgiu? platform NEC_MCR_500 id PWCTL_LCDLIGHT port 45
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pwctl1 at vrgiu? platform NEC_MCCS id PWCTL_LCDLIGHT port 45
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pwctl2 at vrgiu? platform NEC_MCR_300 id PWCTL_LCD port 10
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pwctl2 at vrgiu? platform NEC_MCR_FORDOCOMO id PWCTL_LCD port 10
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pwctl2 at vrgiu? platform NEC_MCR_500 id PWCTL_LCD port 10
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pwctl2 at vrgiu? platform NEC_MCCS id PWCTL_LCD port 10
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pwctl3 at vrgiu? platform NEC_MCR_3XX id PWCTL_SPEAKER port 12
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pwctl3 at vrgiu? platform NEC_MCR_430 id PWCTL_SPEAKER port 44
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pwctl3 at vrgiu? platform NEC_MCR_500 id PWCTL_SPEAKER port 12
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pwctl3 at vrgiu? platform NEC_MCR_510 id PWCTL_SPEAKER port 44
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pwctl3 at vrgiu? platform NEC_MCR_520 id PWCTL_SPEAKER port 44
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#pwctl3 at vrgiu? platform NEC_MCR_520A id PWCTL_SPEAKER port 44
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pwctl3 at vrgiu? platform NEC_MCR_530 id PWCTL_SPEAKER port 44
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#pwctl3 at vrgiu? platform NEC_MCR_530A id PWCTL_SPEAKER port 44
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#pwctl3 at vrgiu? platform NEC_MCR_SIGMARION id PWCTL_SPEAKER port 44
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pwctl3 at vrgiu? platform IBM_WORKPAD id PWCTL_SPEAKER port 49
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#pwctl4 at vrgiu? platform NEC_MCR_430 id PWCTL_COM1 port 47
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#pwctl4 at vrgiu? platform NEC_MCR_530 id PWCTL_COM1 port 47
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#pwctl4 at vrgiu? platform NEC_MCR_SIGMARION id PWCTL_COM1 port 47
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vrisab0 at vrgiu? platform NEC_MCR
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vrisab0 at vrgiu? platform NEC_MCCS
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vrisab0 at vrgiu? platform IBM_WORKPAD isaportoffset 0x1000000
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isa0 at vrisab0
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pcic0 at isa0 port 0x3e0 iomem 0x70000 iosiz 0x4000 irq 0x00090003
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#
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# Freestyle
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# Button to GPIO port # mapping
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# +---------+
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# 1 +| |
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# | |+ 7
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# | |
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#20 +| LCD |+ 4
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# | | + 6
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# 8 +| |+ 5
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# | |
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# | |+----Power On/Off (connected to PMU)
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# +---------+
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# +9
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# +12 +10
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# +11
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# (PCIC-ISA : 23)
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button0 at vrgiu? platform EVEREX_FREESTYLE id BTN_APP0 port 9
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button1 at vrgiu? platform EVEREX_FREESTYLE id BTN_APP1 port 10
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button2 at vrgiu? platform EVEREX_FREESTYLE id BTN_APP2 port 11
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button3 at vrgiu? platform EVEREX_FREESTYLE id BTN_APP3 port 12
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button4 at vrgiu? platform EVEREX_FREESTYLE id BTN_CANCEL port 7
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button5 at vrgiu? platform EVEREX_FREESTYLE id BTN_UP port 4
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button6 at vrgiu? platform EVEREX_FREESTYLE id BTN_OK port 6
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button7 at vrgiu? platform EVEREX_FREESTYLE id BTN_DOWN port 5
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button8 at vrgiu? platform EVEREX_FREESTYLE id BTN_REC port 1
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button9 at vrgiu? platform EVEREX_FREESTYLE id BTN_LIGHT port 20
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button10 at vrgiu? platform EVEREX_FREESTYLE id BTN_CONTRAST port 8
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vrisab1 at vrgiu? platform EVEREX_FREESTYLE isaportoffset 0x1000000
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isa1 at vrisab1
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pcic0 at isa1 port 0x3e0 iomem 0x70000 iosiz 0x4000 irq 0x00170003
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options PCIC_ISA_INTR_ALLOC_MASK=0x0008 # IRQ 3 only (MCR/Freestyle)
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#
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# Fujitsu INTERTOP CX300
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#
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pwctl0 at vrgiu? platform FUJITSU_INTERTOP id PWCTL_COM0 port 15
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vrisab2 at vrgiu? platform FUJITSU_INTERTOP isaportoffset 0x1000000
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isa2 at vrisab2
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pcic0 at isa2 port 0x3e0 iomem 0x70000 iosiz 0x4000 irq 0x00060003
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#
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# Vadem Clio and Sharp Tripad
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#
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vrisab3 at vrgiu? platform SHARP_TRIPAD isaportoffset 0x1000000
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vrisab3 at vrgiu? platform VADEM_CLIO_C isaportoffset 0x1000000
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isa3 at vrisab3
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pcic0 at isa3 port 0x3e0 iomem 0x70000 iosiz 0x4000 irq 0x000d0003
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#
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# CASIO CASSIOPEIA E55 and for DoCoMo
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#
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button0 at vrgiu? platform CASIO_CASSIOPEIAE_E55 id BTN_OK active 0 port 6
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button1 at vrgiu? platform CASIO_CASSIOPEIAE_E55 id BTN_CANCEL active 0 port 7
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button2 at vrgiu? platform CASIO_CASSIOPEIAE_E55 id BTN_APP0 active 0 port 8
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button3 at vrgiu? platform CASIO_CASSIOPEIAE_E55 id BTN_APP1 active 0 port 9
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button4 at vrgiu? platform CASIO_CASSIOPEIAE_E55 id BTN_APP2 active 0 port 10
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button5 at vrgiu? platform CASIO_CASSIOPEIAE_E55 id BTN_APP3 active 0 port 11
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button6 at vrgiu? platform CASIO_CASSIOPEIAE_E55 id BTN_DOWN active 0 port 12
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button7 at vrgiu? platform CASIO_CASSIOPEIAE_E55 id BTN_UP active 0 port 13
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pwctl0 at vrgiu? platform CASIO_CASSIOPEIAE_E55 id PWCTL_COM0 port 38
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pwctl1 at vrgiu? platform CASIO_CASSIOPEIAE_E55 id PWCTL_LCDLIGHT port 26
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# 'CF hack' for all CASSIOPEIA E series
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vrisab4 at vrgiu? platform CASIO_CASSIOPEIAE_EXX isaportoffset 0xc000
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vrisab4 at vrgiu? platform CASIO_CASSIOPEIAE_EXXX isaportoffset 0xc000
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isa4 at vrisab4
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wdc0 at isa4 port 0x170 irq 0x02000003 flags 0x0002 # single drive
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#
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# Fujitsu PenCentra 130
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#
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vrc4172gpio0 at vrgiu? platform FUJITSU_PENCENTRA_130 addr 0x15001080 size 0x4a port 10
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vrisab5 at vrc4172gpio0 isaportoffset 0x1000000
|
||||
isa5 at vrisab5
|
||||
pcic0 at isa5 port 0x3e0 iomem 0x70000 iosiz 0x4000 irq 0x00010003
|
||||
|
||||
# PCMCIA bus support
|
||||
pcmcia* at pcic? controller 0 socket ?
|
||||
|
||||
# PCMCIA IDE disk
|
||||
wdc* at pcmcia? function ?
|
||||
wd* at wdc? channel ? drive ? flags 0x0000
|
||||
|
||||
# PCMCIA network interfaces
|
||||
ep* at pcmcia? function ? # 3Com 3c589 and 3c562 Ethernet
|
||||
mbe* at pcmcia? function ? # MB8696x based Ethernet
|
||||
ne* at pcmcia? function ? # NE2000-compatible Ethernet
|
||||
ray* at pcmcia? function ? # Raytheon Raylink (802.11)
|
||||
sm* at pcmcia? function ? # Megahertz Ethernet
|
||||
wi* at pcmcia? function ? # Lucent WaveLan IEEE (802.11)
|
||||
awi* at pcmcia? function ? # WLI-PCM
|
||||
an* at pcmcia? function ? # Aironet PC4500/PC4800 (802.11)
|
||||
|
||||
# PCMCIA Serial interfaces
|
||||
com* at pcmcia? function ? # Modems and serial cards
|
||||
|
||||
# PCMCIA SCSI interfaces
|
||||
aic* at pcmcia? function ?
|
||||
esp* at pcmcia? function ? # NCR53c406 SCSI
|
||||
|
||||
# ATAPI bus support
|
||||
atapibus* at wdc? channel ?
|
||||
cd* at atapibus? drive ? flags 0x0000 # ATAPI CD-ROM drives
|
||||
sd* at atapibus? drive ? flags 0x0000 # ATAPI disk drives
|
||||
|
||||
# SCSI bus support
|
||||
scsibus* at aic?
|
||||
scsibus* at esp?
|
||||
sd* at scsibus? target ? lun ? # SCSI disk drives
|
||||
cd* at scsibus? target ? lun ? # SCSI CD-ROM drives
|
||||
|
||||
pseudo-device loop 1 # network loopback
|
||||
pseudo-device ppp 2 # serial-line IP ports
|
||||
pseudo-device pty # pseudo-terminals
|
||||
pseudo-device bpfilter 16 # packet filter ports
|
||||
pseudo-device ipfilter # IP filter, NAT
|
||||
|
||||
pseudo-device vnd 4 # virtual disk ick
|
||||
#pseudo-device ccd 4 # concatenated disks
|
||||
pseudo-device rnd # /dev/random and in-kernel generator
|
||||
|
||||
pseudo-device biconsdev 1 # build-in console device
|
||||
pseudo-device wsmux 2 # mouse & keyboard multiplexor
|
||||
options MEMORY_DISK_HOOKS
|
||||
options MEMORY_DISK_IS_ROOT # force root on memory disk
|
||||
options MEMORY_DISK_SERVER=0 # no userspace memory disk support
|
||||
options MEMORY_DISK_DYNAMIC # fs image don't exist in data section.
|
||||
pseudo-device md 1 # memory disk device (ramdisk)
|
||||
|
||||
#pseudo-device raid 4 # RAIDframe disk driver
|
||||
#options RAID_AUTOCONFIG # auto-configuration of RAID components
|
||||
|
||||
# for IPv6
|
||||
pseudo-device gif 4 # IPv[46] over IPv[46] tunnel (RFC1933)
|
||||
#pseudo-device faith 1 # IPv[46] tcp relay translation i/f
|
||||
#pseudo-device stf 1 # 6to4 IPv6 over IPv4 encapsulation
|
||||
|
||||
## IEEE 802.1Q Virtual LAN encapsulation, see vlan(4).
|
||||
pseudo-device vlan
|
||||
@ -1,10 +1,16 @@
|
||||
# $NetBSD: files.hpcmips,v 1.57 2001/06/13 06:03:10 enami Exp $
|
||||
# $NetBSD: files.hpcmips,v 1.58 2001/06/13 07:32:48 enami Exp $
|
||||
|
||||
# maxpartitions must be first item in files.${ARCH}.
|
||||
maxpartitions 8
|
||||
|
||||
maxusers 2 8 64
|
||||
|
||||
#
|
||||
# Machine-independent I2O drivers.
|
||||
#
|
||||
|
||||
include "dev/i2o/files.i2o"
|
||||
|
||||
#
|
||||
# Machine-independent SCSI drivers
|
||||
#
|
||||
@ -45,12 +51,12 @@ file arch/hpcmips/tx/tx39.c tx39xx # TOSHIBA TX3900 series
|
||||
file arch/mips/mips/fp.S softfloat
|
||||
|
||||
file arch/hpcmips/hpcmips/autoconf.c
|
||||
file arch/hpcmips/hpcmips/bus_dma.c
|
||||
file arch/hpcmips/hpcmips/bus_space.c
|
||||
file arch/hpcmips/hpcmips/conf.c
|
||||
file arch/hpcmips/hpcmips/interrupt.c
|
||||
file arch/hpcmips/hpcmips/machdep.c
|
||||
file arch/hpcmips/hpcmips/mainbus.c
|
||||
file arch/hpcmips/hpcmips/bus_space.c
|
||||
file arch/hpcmips/hpcmips/bus_dma.c
|
||||
file arch/hpcmips/hpcmips/procfs_machdep.c procfs
|
||||
|
||||
#
|
||||
@ -82,6 +88,7 @@ file arch/hpcmips/dev/hpcapm.c hpcapm
|
||||
#
|
||||
# ISA bus support
|
||||
#
|
||||
include "dev/pci/files.pci" # XXX some ISA devs are 'at pci' too.
|
||||
include "dev/isa/files.isa"
|
||||
|
||||
#
|
||||
@ -137,6 +144,10 @@ file arch/hpcmips/vr/vrpiu.c vrpiu
|
||||
attach ohci at vrip with ohci_vrip
|
||||
file arch/hpcmips/dev/ohci_vrip.c ohci_vrip
|
||||
|
||||
device vrpciu: pcibus
|
||||
attach vrpciu at vrip
|
||||
file arch/hpcmips/vr/vrpciu.c vrpciu needs-flag
|
||||
|
||||
defopt opt_mq200.h MQ200_DEBUG MQ200_USECRT
|
||||
device mqvideo: hpcfbif
|
||||
attach mqvideo at vrip with mqvideo_vrip
|
||||
@ -146,6 +157,9 @@ file arch/hpcmips/dev/mq200subr.c mqvideo
|
||||
file arch/hpcmips/dev/mq200debug.c mqvideo
|
||||
file arch/hpcmips/dev/mq200machdep.c mqvideo
|
||||
|
||||
attach mqvideo at pci with mqvideo_pci
|
||||
file arch/hpcmips/pci/mq200_pci.c mqvideo_pci
|
||||
|
||||
device ite8181video: hpcfbif
|
||||
attach ite8181video at vrip with ite8181video_vrip
|
||||
file arch/hpcmips/vr/ite8181_vrip.c ite8181video_vrip
|
||||
@ -159,6 +173,28 @@ device vrc4172gpio: hpcioif, vrisabif
|
||||
attach vrc4172gpio at hpcioif
|
||||
file arch/hpcmips/vr/vrc4172gpio.c vrc4172gpio
|
||||
|
||||
device vrc4173cardu: pcmciabus
|
||||
attach vrc4173cardu at pci
|
||||
file arch/hpcmips/pci/vrc4173cardu.c vrc4173cardu
|
||||
|
||||
device vrc4173if {}
|
||||
|
||||
device vrc4173bcu: vrc4173if
|
||||
attach vrc4173bcu at pci
|
||||
file arch/hpcmips/vr/vrc4173bcu.c vrc4173bcu
|
||||
|
||||
device vrc4173cmu
|
||||
attach vrc4173cmu at vrc4173if
|
||||
file arch/hpcmips/vr/vrc4173cmu.c vrc4173cmu
|
||||
|
||||
device vrc4173piu
|
||||
attach vrc4173piu at vrc4173if
|
||||
file arch/hpcmips/vr/vrc4173piu.c vrc4173piu
|
||||
|
||||
device vrc4173kiu
|
||||
attach vrc4173kiu at vrc4173if
|
||||
file arch/hpcmips/vr/vrc4173kiu.c vrc4173kiu
|
||||
|
||||
#
|
||||
# TOSHIBA TX3912/3922
|
||||
#
|
||||
|
||||
114
sys/arch/hpcmips/include/pci_machdep.h
Normal file
114
sys/arch/hpcmips/include/pci_machdep.h
Normal file
@ -0,0 +1,114 @@
|
||||
/* $NetBSD: pci_machdep.h,v 1.1 2001/06/13 07:32:47 enami Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2001 Enami Tsugutomo.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Machine-specific definitions for PCI autoconfiguration.
|
||||
*/
|
||||
|
||||
/*
|
||||
* We want to contro both device probe order.
|
||||
*/
|
||||
#define __PCI_BUS_DEVORDER
|
||||
|
||||
/*
|
||||
* Types provided to machine-independent PCI code
|
||||
*/
|
||||
typedef struct hpcmips_pci_chipset *pci_chipset_tag_t;
|
||||
typedef u_long pcitag_t;
|
||||
typedef u_long pci_intr_handle_t;
|
||||
|
||||
/*
|
||||
* Forward declarations.
|
||||
*/
|
||||
struct pci_attach_args;
|
||||
|
||||
/*
|
||||
* hpcmips-specific PCI structure and type definitions.
|
||||
* NOT TO BE USED DIRECTLY BY MACHINE INDEPENDENT CODE.
|
||||
*/
|
||||
struct hpcmips_pci_chipset {
|
||||
struct device *pc_dev;
|
||||
|
||||
void (*pc_attach_hook)(struct device *, struct device *,
|
||||
struct pcibus_attach_args *);
|
||||
int (*pc_bus_maxdevs)(pci_chipset_tag_t, int);
|
||||
int (*pc_bus_devorder)(pci_chipset_tag_t, int, char *);
|
||||
pcitag_t (*pc_make_tag)(pci_chipset_tag_t, int, int, int);
|
||||
void (*pc_decompose_tag)(pci_chipset_tag_t, pcitag_t, int *, int *,
|
||||
int *);
|
||||
pcireg_t (*pc_conf_read)(pci_chipset_tag_t, pcitag_t, int);
|
||||
void (*pc_conf_write)(pci_chipset_tag_t, pcitag_t, int, pcireg_t);
|
||||
int (*pc_intr_map)(struct pci_attach_args *, pci_intr_handle_t *);
|
||||
const char *(*pc_intr_string)(pci_chipset_tag_t, pci_intr_handle_t);
|
||||
const struct evcnt *(*pc_intr_evcnt)(pci_chipset_tag_t,
|
||||
pci_intr_handle_t);
|
||||
void *(*pc_intr_establish)(pci_chipset_tag_t, pci_intr_handle_t, int,
|
||||
int (*)(void *), void *);
|
||||
void (*pc_intr_disestablish)(pci_chipset_tag_t, void *);
|
||||
|
||||
/* hpcmips specific */
|
||||
void *(*pc_vrcintr_establish)(pci_chipset_tag_t, int,
|
||||
int (*)(void *), void *);
|
||||
void (*pc_vrcintr_disestablish)(pci_chipset_tag_t, void *);
|
||||
};
|
||||
|
||||
/*
|
||||
* Functions provided to machine-independent PCI code.
|
||||
*/
|
||||
#define pci_attach_hook(p, s, pba) \
|
||||
(*(pba)->pba_pc->pc_attach_hook)((p), (s), (pba))
|
||||
#define pci_bus_maxdevs(c, b) \
|
||||
(*(c)->pc_bus_maxdevs)((c), (b))
|
||||
#ifdef __PCI_BUS_DEVORDER
|
||||
#define pci_bus_devorder(c, b, d) \
|
||||
(*(c)->pc_bus_devorder)((c), (b), (d))
|
||||
#endif
|
||||
#define pci_make_tag(c, b, d, f) \
|
||||
(*(c)->pc_make_tag)((c), (b), (d), (f))
|
||||
#define pci_decompose_tag(c, t, bp, dp, fp) \
|
||||
(*(c)->pc_decompose_tag)((c), (t), (bp), (dp), (fp))
|
||||
#define pci_conf_read(c, t, r) \
|
||||
(*(c)->pc_conf_read)((c), (t), (r))
|
||||
#define pci_conf_write(c, t, r, v) \
|
||||
(*(c)->pc_conf_write)((c), (t), (r), (v))
|
||||
#define pci_intr_map(pa, ihp) \
|
||||
(*(pa)->pa_pc->pc_intr_map)((pa), (ihp))
|
||||
#define pci_intr_string(c, ih) \
|
||||
(*(c)->pc_intr_string)((c), (ih))
|
||||
#define pci_intr_evcnt(c, ih) \
|
||||
(*(c)->pc_intr_evcnt)((c), (ih))
|
||||
#define pci_intr_establish(c, ih, l, h, a) \
|
||||
(*(c)->pc_intr_establish)((c), (ih), (l), (h), (a))
|
||||
#define pci_intr_disestablish(c, iv) \
|
||||
(*(c)->pc_intr_disestablish)((c), (iv))
|
||||
|
||||
/* XXX */
|
||||
#define pci_vrcintr_establish(c, p, func, arg) \
|
||||
(*(c)->pc_vrcintr_establish)((c), (p), (func), (arg))
|
||||
#define pci_vrcintr_disestablish(c, iv) \
|
||||
(*(c)->pc_vrcintr_disestablish)((c), (iv))
|
||||
327
sys/arch/hpcmips/vr/vrc4173bcu.c
Normal file
327
sys/arch/hpcmips/vr/vrc4173bcu.c
Normal file
@ -0,0 +1,327 @@
|
||||
/* $NetBSD: vrc4173bcu.c,v 1.1 2001/06/13 07:32:48 enami Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2001 Enami Tsugutomo.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/device.h>
|
||||
|
||||
#include <machine/bus.h>
|
||||
|
||||
#include <dev/pci/pcivar.h>
|
||||
#include <dev/pci/pcidevs.h>
|
||||
|
||||
#include <hpcmips/vr/vrc4173bcuvar.h>
|
||||
#include <hpcmips/vr/vrc4173icureg.h>
|
||||
|
||||
#define VRC4173BCU_BADR 0x10
|
||||
#ifdef DEBUG
|
||||
#define DPRINTF(args) printf args
|
||||
#else
|
||||
#define DPRINTF(args)
|
||||
#endif
|
||||
|
||||
static int vrc4173bcu_match(struct device *, struct cfdata *, void *);
|
||||
static void vrc4173bcu_attach(struct device *, struct device *, void *);
|
||||
static int vrc4173bcu_print(void *, const char *);
|
||||
|
||||
int vrcintr_port = 1; /* GPIO port to which VRCINT is
|
||||
connected to. XXX. */
|
||||
|
||||
struct cfattach vrc4173bcu_ca = {
|
||||
sizeof(struct vrc4173bcu_softc), vrc4173bcu_match, vrc4173bcu_attach,
|
||||
};
|
||||
|
||||
int
|
||||
vrc4173bcu_match(struct device *parent, struct cfdata *match, void *aux)
|
||||
{
|
||||
struct pci_attach_args *pa = (struct pci_attach_args *)aux;
|
||||
|
||||
if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NEC &&
|
||||
PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NEC_VRC4173_BCU)
|
||||
return (1);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
void
|
||||
vrc4173bcu_attach(struct device *parent, struct device *self, void *aux)
|
||||
{
|
||||
struct vrc4173bcu_softc *sc = (struct vrc4173bcu_softc *)self;
|
||||
struct pci_attach_args *pa = (struct pci_attach_args *)aux;
|
||||
pci_chipset_tag_t pc = pa->pa_pc;
|
||||
pcitag_t tag = pa->pa_tag;
|
||||
pcireg_t csr;
|
||||
char devinfo[256];
|
||||
int i;
|
||||
#ifdef DEBUG
|
||||
char buf[80];
|
||||
u_int16_t reg;
|
||||
#endif
|
||||
|
||||
pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
|
||||
printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class));
|
||||
|
||||
#if 0
|
||||
printf("%s: ", sc->sc_dev.dv_xname);
|
||||
pci_conf_print(pa->pa_pc, pa->pa_tag, NULL);
|
||||
#endif
|
||||
|
||||
csr = pci_conf_read(pc, tag, VRC4173BCU_BADR);
|
||||
DPRINTF(("%s: base addr = 0x%08x\n", sc->sc_dev.dv_xname, csr));
|
||||
|
||||
/* Map I/O registers */
|
||||
if (pci_mapreg_map(pa, VRC4173BCU_BADR, PCI_MAPREG_TYPE_IO, 0,
|
||||
&sc->sc_iot, &sc->sc_ioh, NULL, &sc->sc_size)) {
|
||||
printf("%s: can't map mem space\n", sc->sc_dev.dv_xname);
|
||||
return;
|
||||
}
|
||||
|
||||
sc->sc_pc = pc;
|
||||
|
||||
/* Enable the device. */
|
||||
csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
|
||||
DPRINTF(("%s: csr = 0x%08x", sc->sc_dev.dv_xname, csr));
|
||||
pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
|
||||
csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE);
|
||||
csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
|
||||
DPRINTF((" -> 0x%08x\n", csr));
|
||||
|
||||
csr = pci_conf_read(pc, tag, VRC4173BCU_BADR);
|
||||
DPRINTF(("%s: base addr = %x@0x%08x\n", sc->sc_dev.dv_xname,
|
||||
(int)sc->sc_size, csr));
|
||||
DPRINTF(("%s: iot = 0x%08x, ioh = 0x%08x\n", sc->sc_dev.dv_xname,
|
||||
(int)sc->sc_iot, sc->sc_ioh));
|
||||
|
||||
/*
|
||||
* Map I/O space for ICU.
|
||||
*/
|
||||
if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
|
||||
VRC4173ICU_IOBASE, VRC4173ICU_IOSIZE, &sc->sc_icuh)) {
|
||||
printf(": can't map ICU i/o space\n");
|
||||
return;
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_SYSINT1);
|
||||
bitmask_snprintf(reg,
|
||||
"\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU"
|
||||
"\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15",
|
||||
buf, sizeof(buf));
|
||||
printf("%s: SYSINT1 = 0x%s\n", sc->sc_dev.dv_xname, buf);
|
||||
|
||||
reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MKIUINT);
|
||||
bitmask_snprintf(reg,
|
||||
"\20\1SCANINT\2KDATRDY\3KDATLOST\4B3\5B4\6B5\7B6\10B7"
|
||||
"\11B8\12B9\13B10\14B11\15B12\16B13\17B14\20B15",
|
||||
buf, sizeof(buf));
|
||||
printf("%s: MKIUINT = 0x%s\n", sc->sc_dev.dv_xname, buf);
|
||||
|
||||
reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1);
|
||||
bitmask_snprintf(reg,
|
||||
"\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU"
|
||||
"\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15",
|
||||
buf, sizeof(buf));
|
||||
printf("%s: MSYSINT1 = 0x%s\n", sc->sc_dev.dv_xname, buf);
|
||||
|
||||
#if 1
|
||||
reg = VRC4173ICU_USBINTR | VRC4173ICU_PIUINTR | VRC4173ICU_KIUINTR |
|
||||
VRC4173ICU_DOZEPIUINTR;
|
||||
bus_space_write_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1, reg);
|
||||
|
||||
reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1);
|
||||
bitmask_snprintf(reg,
|
||||
"\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU"
|
||||
"\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15",
|
||||
buf, sizeof(buf));
|
||||
printf("%s: MSYSINT1 = 0x%s\n", sc->sc_dev.dv_xname, buf);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
for (i = 0; i < VRC4173BCU_NINTRHAND; i++)
|
||||
sc->sc_intrhand[i].ih_func = NULL;
|
||||
|
||||
/*
|
||||
* Attach sub units found in vrc4173. XXX.
|
||||
*/
|
||||
config_found(self, "vrc4173cmu", vrc4173bcu_print);
|
||||
config_found(self, "vrc4173giu", vrc4173bcu_print);
|
||||
config_found(self, "vrc4173piu", vrc4173bcu_print);
|
||||
config_found(self, "vrc4173kiu", vrc4173bcu_print);
|
||||
config_found(self, "vrc4173aiu", vrc4173bcu_print);
|
||||
config_found(self, "vrc4173ps2u", vrc4173bcu_print);
|
||||
|
||||
/*
|
||||
* Establish VRCINT interrupt. Normally connected to one of
|
||||
* GPIO pin in VR41xx. XXX.
|
||||
*/
|
||||
sc->sc_ih = pci_vrcintr_establish(pc, vrcintr_port,
|
||||
vrc4173bcu_intr, sc);
|
||||
if (sc->sc_ih != NULL)
|
||||
printf("%s: interrupting at %p\n", sc->sc_dev.dv_xname,
|
||||
sc->sc_ih);
|
||||
}
|
||||
|
||||
int
|
||||
vrc4173bcu_print(void *aux, const char *pnp)
|
||||
{
|
||||
const char *name = aux;
|
||||
|
||||
if (pnp)
|
||||
printf("%s at %s", name, pnp);
|
||||
|
||||
return (UNCONF);
|
||||
}
|
||||
|
||||
int
|
||||
vrc4173bcu_intr(void *arg)
|
||||
{
|
||||
struct vrc4173bcu_softc *sc = (struct vrc4173bcu_softc *)arg;
|
||||
struct intrhand *ih;
|
||||
u_int16_t reg;
|
||||
int i, handled;
|
||||
|
||||
reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_SYSINT1);
|
||||
if (reg == 0)
|
||||
return (0);
|
||||
|
||||
#if 0
|
||||
{
|
||||
char buf[80];
|
||||
bitmask_snprintf(reg,
|
||||
"\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU"
|
||||
"\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15",
|
||||
buf, sizeof(buf));
|
||||
printf("%s: %s\n", sc->sc_dev.dv_xname, buf);
|
||||
}
|
||||
#endif
|
||||
for (handled = i = 0; i < VRC4173BCU_NINTRHAND; i++) {
|
||||
ih = &sc->sc_intrhand[i];
|
||||
if (ih->ih_func != NULL && (reg & (1 << i)) != 0) {
|
||||
handled = 1;
|
||||
(*ih->ih_func)(ih->ih_arg);
|
||||
}
|
||||
}
|
||||
|
||||
return (handled);
|
||||
}
|
||||
|
||||
void *
|
||||
vrc4173bcu_intr_establish(struct vrc4173bcu_softc *sc, int kind,
|
||||
int (*func)(void *), void *arg)
|
||||
{
|
||||
struct intrhand *ih;
|
||||
|
||||
DPRINTF(("vrc4173bcu_intr_establish: %d, %p, %p\n", kind, func, arg));
|
||||
if (kind < 0 || kind >= VRC4173BCU_NINTRHAND)
|
||||
return (NULL);
|
||||
|
||||
ih = &sc->sc_intrhand[kind];
|
||||
if (ih->ih_func != NULL)
|
||||
return (NULL);
|
||||
|
||||
ih->ih_func = func;
|
||||
ih->ih_arg = arg;
|
||||
return (ih);
|
||||
}
|
||||
|
||||
void
|
||||
vrc4173bcu_intr_disestablish(struct vrc4173bcu_softc *sc, void *ihp)
|
||||
{
|
||||
struct intrhand *ih = ihp;
|
||||
|
||||
if (ih < &sc->sc_intrhand[0] ||
|
||||
ih >= &sc->sc_intrhand[VRC4173BCU_NINTRHAND])
|
||||
return;
|
||||
|
||||
ih->ih_func = NULL;
|
||||
}
|
||||
|
||||
int
|
||||
vrc4173bcu_pci_bus_devorder(pci_chipset_tag_t pc, int busno, char *devs)
|
||||
{
|
||||
int i;
|
||||
|
||||
*devs++ = 19; /* Find BCU (device 19) first. */
|
||||
for (i = 0; i < 32; i++)
|
||||
if (i != 19)
|
||||
*devs++ = i;
|
||||
return (i);
|
||||
}
|
||||
|
||||
int
|
||||
vrc4173bcu_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
|
||||
{
|
||||
pci_chipset_tag_t pc = pa->pa_pc;
|
||||
pcitag_t intrtag = pa->pa_intrtag;
|
||||
int bus, dev, func;
|
||||
#ifdef DEBUG
|
||||
int line = pa->pa_intrline;
|
||||
int pin = pa->pa_intrpin;
|
||||
#endif
|
||||
|
||||
pci_decompose_tag(pc, intrtag, &bus, &dev, &func);
|
||||
DPRINTF(("%s(%d, %d, %d): line = %d, pin = %d\n", pc->pc_dev->dv_xname,
|
||||
bus, dev, func, line, pin));
|
||||
|
||||
*ihp = -1;
|
||||
switch (dev) {
|
||||
case 1: /* CARDU0 */
|
||||
*ihp = VRC4173ICU_PCMCIA1INTR;
|
||||
break;
|
||||
case 2: /* CARDU1 */
|
||||
*ihp = VRC4173ICU_PCMCIA2INTR;
|
||||
break;
|
||||
case 19: /* VRC4173 */
|
||||
switch (func) {
|
||||
case 2:
|
||||
*ihp = VRC4173ICU_USBINTR;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
return (*ihp == -1);
|
||||
}
|
||||
|
||||
const char *
|
||||
vrc4173bcu_pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih)
|
||||
{
|
||||
static char irqstr[8 + sizeof("vrc4173 intr")];
|
||||
|
||||
snprintf(irqstr, sizeof(irqstr), "vrc4173 intr %d", (int)ih);
|
||||
return (irqstr);
|
||||
}
|
||||
|
||||
const struct evcnt *
|
||||
vrc4173bcu_pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih)
|
||||
{
|
||||
|
||||
/* XXX for now, no evcnt parent reported */
|
||||
return (NULL);
|
||||
}
|
||||
|
||||
63
sys/arch/hpcmips/vr/vrc4173bcuvar.h
Normal file
63
sys/arch/hpcmips/vr/vrc4173bcuvar.h
Normal file
@ -0,0 +1,63 @@
|
||||
/* $NetBSD: vrc4173bcuvar.h,v 1.1 2001/06/13 07:32:48 enami Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2001 Enami Tsugutomo.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <dev/pci/pcivar.h>
|
||||
|
||||
struct vrc4173bcu_softc {
|
||||
struct device sc_dev;
|
||||
|
||||
pci_chipset_tag_t sc_pc;
|
||||
bus_space_tag_t sc_iot;
|
||||
bus_space_handle_t sc_ioh;
|
||||
bus_size_t sc_size;
|
||||
|
||||
bus_space_handle_t sc_icuh; /* I/O handle for ICU. */
|
||||
void *sc_ih;
|
||||
|
||||
#define VRC4173BCU_NINTRHAND (16) /* XXX */
|
||||
struct intrhand {
|
||||
int (*ih_func)(void *);
|
||||
void *ih_arg;
|
||||
} sc_intrhand[VRC4173BCU_NINTRHAND];
|
||||
};
|
||||
|
||||
struct vrc4173bcu_attach_args {
|
||||
bus_space_tag_t vaa_iot;
|
||||
bus_space_handle_t vaa_ioh;
|
||||
};
|
||||
|
||||
int vrc4173bcu_intr(void *);
|
||||
void *vrc4173bcu_intr_establish(struct vrc4173bcu_softc *, int,
|
||||
int (*)(void *), void *);
|
||||
void vrc4173bcu_intr_disestablish(struct vrc4173bcu_softc *, void *);
|
||||
int vrc4173bcu_pci_bus_devorder(pci_chipset_tag_t, int, char *);
|
||||
int vrc4173bcu_pci_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
|
||||
const char *
|
||||
vrc4173bcu_pci_intr_string(pci_chipset_tag_t, pci_intr_handle_t);
|
||||
const struct evcnt *
|
||||
vrc4173bcu_pci_intr_evcnt(pci_chipset_tag_t, pci_intr_handle_t);
|
||||
62
sys/arch/hpcmips/vr/vrc4173icureg.h
Normal file
62
sys/arch/hpcmips/vr/vrc4173icureg.h
Normal file
@ -0,0 +1,62 @@
|
||||
/* $NetBSD: vrc4173icureg.h,v 1.1 2001/06/13 07:32:48 enami Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2001 Enami Tsugutomo.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#define VRC4173ICU_IOBASE 0x060
|
||||
#define VRC4173ICU_IOSIZE 0x018
|
||||
|
||||
#define VRC4173ICU_SYSINT1 0x00
|
||||
#define VRC4173ICU_DOZEPIUINTR 13
|
||||
#define VRC4173ICU_AC97INTR1 10
|
||||
#define VRC4173ICU_AC97INTR 9
|
||||
#define VRC4173ICU_GIUINTR 8
|
||||
#define VRC4173ICU_KIUINTR 7
|
||||
#define VRC4173ICU_AIUINTR 6
|
||||
#define VRC4173ICU_PIUINTR 5
|
||||
#define VRC4173ICU_PS2CH1INTR 4
|
||||
#define VRC4173ICU_PS2CH2INTR 3
|
||||
#define VRC4173ICU_PCMCIA1INTR 2
|
||||
#define VRC4173ICU_PCMCIA2INTR 1
|
||||
#define VRC4173ICU_USBINTR 0
|
||||
|
||||
#define VRC4173ICU_PIUINT 0x02
|
||||
#define VRC4173ICU_AIUINT 0x04
|
||||
|
||||
#define VRC4173ICU_KIUINT 0x06
|
||||
#define VRC4173ICU_KDATLOST (1<<2)
|
||||
#define VRC4173ICU_KDATRDY (1<<1)
|
||||
#define VRC4173ICU_SCANINT (1<<0)
|
||||
|
||||
#define VRC4173ICU_GIULINT 0x08
|
||||
#define VRC4173ICU_GIUHINT 0x0a
|
||||
|
||||
#define VRC4173ICU_MSYSINT1 0x0c
|
||||
#define VRC4173ICU_MPIUINT 0x0e
|
||||
#define VRC4173ICU_MAIUINT 0x10
|
||||
#define VRC4173ICU_MKIUINT 0x12
|
||||
#define VRC4173ICU_MGIULINT 0x14
|
||||
#define VRC4173ICU_MGIUHINT 0x16
|
||||
458
sys/arch/hpcmips/vr/vrpciu.c
Normal file
458
sys/arch/hpcmips/vr/vrpciu.c
Normal file
@ -0,0 +1,458 @@
|
||||
/* $NetBSD: vrpciu.c,v 1.1 2001/06/13 07:32:48 enami Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2001 Enami Tsugutomo.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/device.h>
|
||||
|
||||
#define _HPCMIPS_BUS_DMA_PRIVATE /* XXX */
|
||||
#include <machine/bus.h>
|
||||
|
||||
#include <dev/pci/pcivar.h>
|
||||
|
||||
#include <hpcmips/vr/icureg.h>
|
||||
#include <hpcmips/vr/vripvar.h>
|
||||
#include <hpcmips/vr/vrpciureg.h>
|
||||
#include <hpcmips/vr/vrc4173bcuvar.h>
|
||||
|
||||
#include "pci.h"
|
||||
|
||||
#ifdef DEBUG
|
||||
#define DPRINTF(args) printf args
|
||||
#else
|
||||
#define DPRINTF(args)
|
||||
#endif
|
||||
|
||||
struct vrpciu_softc {
|
||||
struct device sc_dev;
|
||||
|
||||
vrip_chipset_tag_t sc_vc;
|
||||
bus_space_tag_t sc_iot;
|
||||
bus_space_handle_t sc_ioh;
|
||||
void *sc_ih;
|
||||
|
||||
struct vrc4173bcu_softc *sc_bcu; /* vrc4173bcu */
|
||||
|
||||
struct hpcmips_pci_chipset sc_pc;
|
||||
};
|
||||
|
||||
static void vrpciu_write(struct vrpciu_softc *, int, u_int32_t);
|
||||
static u_int32_t
|
||||
vrpciu_read(struct vrpciu_softc *, int);
|
||||
#ifdef DEBUG
|
||||
static void vrpciu_write_2(struct vrpciu_softc *, int, u_int16_t)
|
||||
__attribute__((unused));
|
||||
static u_int16_t
|
||||
vrpciu_read_2(struct vrpciu_softc *, int);
|
||||
#endif
|
||||
static int vrpciu_match(struct device *, struct cfdata *, void *);
|
||||
static void vrpciu_attach(struct device *, struct device *, void *);
|
||||
#if NPCI > 0
|
||||
static int vrpciu_print(void *, const char *);
|
||||
#endif
|
||||
static int vrpciu_intr(void *);
|
||||
static void vrpciu_attach_hook(struct device *, struct device *,
|
||||
struct pcibus_attach_args *);
|
||||
static int vrpciu_bus_maxdevs(pci_chipset_tag_t, int);
|
||||
static pcitag_t vrpciu_make_tag(pci_chipset_tag_t, int, int, int);
|
||||
static void vrpciu_decompose_tag(pci_chipset_tag_t, pcitag_t, int *, int *,
|
||||
int *);
|
||||
static pcireg_t vrpciu_conf_read(pci_chipset_tag_t, pcitag_t, int);
|
||||
static void vrpciu_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t);
|
||||
static void *vrpciu_intr_establish(pci_chipset_tag_t, pci_intr_handle_t,
|
||||
int, int (*)(void *), void *);
|
||||
static void vrpciu_intr_disestablish(pci_chipset_tag_t, void *);
|
||||
static void *vrpciu_vrcintr_establish(pci_chipset_tag_t, int,
|
||||
int (*)(void *), void *);
|
||||
static void vrpciu_vrcintr_disestablish(pci_chipset_tag_t, void *);
|
||||
|
||||
struct cfattach vrpciu_ca = {
|
||||
sizeof(struct vrpciu_softc), vrpciu_match, vrpciu_attach
|
||||
};
|
||||
|
||||
static void
|
||||
vrpciu_write(struct vrpciu_softc *sc, int offset, u_int32_t val)
|
||||
{
|
||||
|
||||
bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, val);
|
||||
}
|
||||
|
||||
static u_int32_t
|
||||
vrpciu_read(struct vrpciu_softc *sc, int offset)
|
||||
{
|
||||
|
||||
return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset));
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
static void
|
||||
vrpciu_write_2(struct vrpciu_softc *sc, int offset, u_int16_t val)
|
||||
{
|
||||
|
||||
bus_space_write_2(sc->sc_iot, sc->sc_ioh, offset, val);
|
||||
}
|
||||
|
||||
static u_int16_t
|
||||
vrpciu_read_2(struct vrpciu_softc *sc, int offset)
|
||||
{
|
||||
|
||||
return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, offset));
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
vrpciu_match(struct device *parent, struct cfdata *match, void *aux)
|
||||
{
|
||||
|
||||
return (1);
|
||||
}
|
||||
|
||||
static void
|
||||
vrpciu_attach(struct device *parent, struct device *self, void *aux)
|
||||
{
|
||||
struct vrpciu_softc *sc = (struct vrpciu_softc *)self;
|
||||
pci_chipset_tag_t pc = &sc->sc_pc;
|
||||
struct vrip_attach_args *va = aux;
|
||||
bus_space_tag_t iot;
|
||||
u_int32_t reg;
|
||||
#if NPCI > 0
|
||||
struct pcibus_attach_args pba;
|
||||
#endif
|
||||
|
||||
sc->sc_vc = va->va_vc;
|
||||
sc->sc_iot = va->va_iot;
|
||||
if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size, 0,
|
||||
&sc->sc_ioh)) {
|
||||
printf(": couldn't map io space\n");
|
||||
return;
|
||||
}
|
||||
|
||||
sc->sc_ih = vrip_intr_establish(va->va_vc, va->va_intr, IPL_TTY,
|
||||
vrpciu_intr, sc);
|
||||
if (sc->sc_ih == NULL) {
|
||||
printf(": couldn't establish interrupt\n");
|
||||
return;
|
||||
}
|
||||
|
||||
/* Enable level 2 interrupt */
|
||||
vrip_intr_setmask2(va->va_vc, sc->sc_ih, PCIINT_INT0, 1);
|
||||
|
||||
printf("\n");
|
||||
|
||||
#ifdef DEBUG
|
||||
#define DUMP_MAW(sc, name, reg) do { \
|
||||
printf("%s: %s =\t0x%08x\n", (sc)->sc_dev.dv_xname, \
|
||||
(name), (reg)); \
|
||||
printf("%s:\tIBA/MASK =\t0x%08x/0x%08x (0x%08x - 0x%08x)\n", \
|
||||
(sc)->sc_dev.dv_xname, \
|
||||
reg & VRPCIU_MAW_IBAMASK, VRPCIU_MAW_ADDRMASK(reg), \
|
||||
VRPCIU_MAW_ADDR(reg), \
|
||||
VRPCIU_MAW_ADDR(reg) + VRPCIU_MAW_SIZE(reg)); \
|
||||
printf("%s:\tWINEN =\t0x%08x\n", (sc)->sc_dev.dv_xname, \
|
||||
reg & VRPCIU_MAW_WINEN); \
|
||||
printf("%s:\tPCIADR =\t0x%08x\n", (sc)->sc_dev.dv_xname, \
|
||||
VRPCIU_MAW_PCIADDR(reg)); \
|
||||
} while (0)
|
||||
#define DUMP_TAW(sc, name, reg) do { \
|
||||
printf("%s: %s =\t\t0x%08x\n", (sc)->sc_dev.dv_xname, \
|
||||
(name), (reg)); \
|
||||
printf("%s:\tMASK =\t0x%08x\n", (sc)->sc_dev.dv_xname, \
|
||||
VRPCIU_TAW_ADDRMASK(reg)); \
|
||||
printf("%s:\tWINEN =\t0x%08x\n", (sc)->sc_dev.dv_xname, \
|
||||
reg & VRPCIU_TAW_WINEN); \
|
||||
printf("%s:\tIBA =\t0x%08x\n", (sc)->sc_dev.dv_xname, \
|
||||
VRPCIU_TAW_IBA(reg)); \
|
||||
} while (0)
|
||||
reg = vrpciu_read(sc, VRPCIU_MMAW1REG);
|
||||
DUMP_MAW(sc, "MMAW1", reg);
|
||||
reg = vrpciu_read(sc, VRPCIU_MMAW2REG);
|
||||
DUMP_MAW(sc, "MMAW2", reg);
|
||||
reg = vrpciu_read(sc, VRPCIU_TAW1REG);
|
||||
DUMP_TAW(sc, "TAW1", reg);
|
||||
reg = vrpciu_read(sc, VRPCIU_TAW2REG);
|
||||
DUMP_TAW(sc, "TAW2", reg);
|
||||
reg = vrpciu_read(sc, VRPCIU_MIOAWREG);
|
||||
DUMP_MAW(sc, "MIOAW", reg);
|
||||
printf("%s: BUSERRAD =\t0x%08x\n", sc->sc_dev.dv_xname,
|
||||
vrpciu_read(sc, VRPCIU_BUSERRADREG));
|
||||
printf("%s: INTCNTSTA =\t0x%08x\n", sc->sc_dev.dv_xname,
|
||||
vrpciu_read(sc, VRPCIU_INTCNTSTAREG));
|
||||
printf("%s: EXACC =\t0x%08x\n", sc->sc_dev.dv_xname,
|
||||
vrpciu_read(sc, VRPCIU_EXACCREG));
|
||||
printf("%s: RECONT =\t0x%08x\n", sc->sc_dev.dv_xname,
|
||||
vrpciu_read(sc, VRPCIU_RECONTREG));
|
||||
printf("%s: PCIEN =\t0x%08x\n", sc->sc_dev.dv_xname,
|
||||
vrpciu_read(sc, VRPCIU_ENREG));
|
||||
printf("%s: CLOCKSEL =\t0x%08x\n", sc->sc_dev.dv_xname,
|
||||
vrpciu_read(sc, VRPCIU_CLKSELREG));
|
||||
printf("%s: TRDYV =\t0x%08x\n", sc->sc_dev.dv_xname,
|
||||
vrpciu_read(sc, VRPCIU_TRDYVREG));
|
||||
printf("%s: CLKRUN =\t0x%08x\n", sc->sc_dev.dv_xname,
|
||||
vrpciu_read_2(sc, VRPCIU_CLKRUNREG));
|
||||
printf("%s: IDREG =\t0x%08x\n", sc->sc_dev.dv_xname,
|
||||
vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_ID_REG));
|
||||
reg = vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG);
|
||||
printf("%s: CSR =\t\t0x%08x\n", sc->sc_dev.dv_xname, reg);
|
||||
vrpciu_write(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG, reg);
|
||||
printf("%s: CSR =\t\t0x%08x\n", sc->sc_dev.dv_xname,
|
||||
vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG));
|
||||
printf("%s: CLASS =\t0x%08x\n", sc->sc_dev.dv_xname,
|
||||
vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_CLASS_REG));
|
||||
printf("%s: BHLC =\t\t0x%08x\n", sc->sc_dev.dv_xname,
|
||||
vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_BHLC_REG));
|
||||
printf("%s: MAIL =\t\t0x%08x\n", sc->sc_dev.dv_xname,
|
||||
vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MAILREG));
|
||||
printf("%s: MBA1 =\t\t0x%08x\n", sc->sc_dev.dv_xname,
|
||||
vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MBA1REG));
|
||||
printf("%s: MBA2 =\t\t0x%08x\n", sc->sc_dev.dv_xname,
|
||||
vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MBA2REG));
|
||||
printf("%s: INTR =\t\t0x%08x\n", sc->sc_dev.dv_xname,
|
||||
vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG));
|
||||
#if 0
|
||||
vrpciu_write(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG,
|
||||
vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG) | 0x01);
|
||||
printf("%s: INTR =\t\t0x%08x\n", sc->sc_dev.dv_xname,
|
||||
vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG));
|
||||
#endif
|
||||
#endif
|
||||
|
||||
pc->pc_dev = &sc->sc_dev;
|
||||
pc->pc_attach_hook = vrpciu_attach_hook;
|
||||
pc->pc_bus_maxdevs = vrpciu_bus_maxdevs;
|
||||
pc->pc_bus_devorder = vrc4173bcu_pci_bus_devorder;
|
||||
pc->pc_make_tag = vrpciu_make_tag;
|
||||
pc->pc_decompose_tag = vrpciu_decompose_tag;
|
||||
pc->pc_conf_read = vrpciu_conf_read;
|
||||
pc->pc_conf_write = vrpciu_conf_write;
|
||||
pc->pc_intr_map = vrc4173bcu_pci_intr_map;
|
||||
pc->pc_intr_string = vrc4173bcu_pci_intr_string;
|
||||
pc->pc_intr_evcnt = vrc4173bcu_pci_intr_evcnt;
|
||||
pc->pc_intr_establish = vrpciu_intr_establish;
|
||||
pc->pc_intr_disestablish = vrpciu_intr_disestablish;
|
||||
pc->pc_vrcintr_establish = vrpciu_vrcintr_establish;
|
||||
pc->pc_vrcintr_disestablish = vrpciu_vrcintr_disestablish;
|
||||
|
||||
#if 0
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < 8; i++)
|
||||
printf("%s: ID_REG(0, 0, %d) = 0x%08x\n",
|
||||
sc->sc_dev.dv_xname, i,
|
||||
pci_conf_read(pc, pci_make_tag(pc, 0, 0, i),
|
||||
PCI_ID_REG));
|
||||
}
|
||||
#endif
|
||||
|
||||
#if NPCI > 0
|
||||
memset(&pba, 0, sizeof(pba));
|
||||
pba.pba_busname = "pci";
|
||||
|
||||
/* For now, just inherit window mappings set by WinCE. XXX. */
|
||||
|
||||
pba.pba_iot = iot = hpcmips_alloc_bus_space_tag();
|
||||
reg = vrpciu_read(sc, VRPCIU_MIOAWREG);
|
||||
iot->t_base = VRPCIU_MAW_ADDR(reg);
|
||||
iot->t_size = VRPCIU_MAW_SIZE(reg);
|
||||
snprintf(iot->t_name, sizeof(iot->t_name), "%s/iot",
|
||||
sc->sc_dev.dv_xname);
|
||||
hpcmips_init_bus_space_extent(iot);
|
||||
|
||||
/*
|
||||
* Just use system bus space tag. It works since WinCE maps
|
||||
* PCI bus space at same offset. But this isn't right thing
|
||||
* of course. XXX.
|
||||
*/
|
||||
pba.pba_memt = sc->sc_iot;
|
||||
pba.pba_dmat = &hpcmips_default_bus_dma_tag;
|
||||
pba.pba_bus = 0;
|
||||
pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
|
||||
PCI_FLAGS_MRL_OKAY;
|
||||
pba.pba_pc = pc;
|
||||
|
||||
config_found(self, &pba, vrpciu_print);
|
||||
#endif
|
||||
}
|
||||
|
||||
#if NPCI > 0
|
||||
static int
|
||||
vrpciu_print(void *aux, const char *pnp)
|
||||
{
|
||||
struct pcibus_attach_args *pba = aux;
|
||||
|
||||
if (pnp != NULL)
|
||||
printf("%s at %s", pba->pba_busname, pnp);
|
||||
else
|
||||
printf(" bus %d", pba->pba_bus);
|
||||
|
||||
return (UNCONF);
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Handle PCI error interrupts.
|
||||
*/
|
||||
int
|
||||
vrpciu_intr(void *arg)
|
||||
{
|
||||
struct vrpciu_softc *sc = (struct vrpciu_softc *)arg;
|
||||
u_int32_t isr;
|
||||
|
||||
isr = vrpciu_read(sc, VRPCIU_INTCNTSTAREG);
|
||||
printf("%s: vrpciu_intr 0x%08x\n", sc->sc_dev.dv_xname, isr);
|
||||
return ((isr & 0x0f) ? 1 : 0);
|
||||
}
|
||||
|
||||
void
|
||||
vrpciu_attach_hook(struct device *parent, struct device *self,
|
||||
struct pcibus_attach_args *pba)
|
||||
{
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
int
|
||||
vrpciu_bus_maxdevs(pci_chipset_tag_t pc, int busno)
|
||||
{
|
||||
|
||||
return (32);
|
||||
}
|
||||
|
||||
pcitag_t
|
||||
vrpciu_make_tag(pci_chipset_tag_t pc, int bus, int device, int function)
|
||||
{
|
||||
|
||||
return ((bus << 16) | (device << 11) | (function << 8));
|
||||
}
|
||||
|
||||
void
|
||||
vrpciu_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp,
|
||||
int *fp)
|
||||
{
|
||||
|
||||
if (bp != NULL)
|
||||
*bp = (tag >> 16) & 0xff;
|
||||
if (dp != NULL)
|
||||
*dp = (tag >> 11) & 0x1f;
|
||||
if (fp != NULL)
|
||||
*fp = (tag >> 8) & 0x07;
|
||||
}
|
||||
|
||||
pcireg_t
|
||||
vrpciu_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
|
||||
{
|
||||
struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev;
|
||||
u_int32_t val;
|
||||
int bus, device, function;
|
||||
|
||||
pci_decompose_tag(pc, tag, &bus, &device, &function);
|
||||
if (bus == 0) {
|
||||
if (device > 21)
|
||||
return ((pcitag_t)-1);
|
||||
tag = (1 << (device + 11)) | (function << 8); /* Type 0 */
|
||||
} else
|
||||
tag |= VRPCIU_CONF_TYPE1;
|
||||
|
||||
vrpciu_write(sc, VRPCIU_CONFAREG, tag | reg);
|
||||
val = vrpciu_read(sc, VRPCIU_CONFDREG);
|
||||
#if 0
|
||||
printf("%s: conf_read: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n",
|
||||
sc->sc_dev.dv_xname, (u_int32_t)tag, reg, val);
|
||||
#endif
|
||||
return (val);
|
||||
}
|
||||
|
||||
void
|
||||
vrpciu_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg,
|
||||
pcireg_t data)
|
||||
{
|
||||
struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev;
|
||||
int bus, device, function;
|
||||
|
||||
#if 0
|
||||
printf("%s: conf_write: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n",
|
||||
sc->sc_dev.dv_xname, (u_int32_t)tag, reg, (u_int32_t)data);
|
||||
#endif
|
||||
vrpciu_decompose_tag(pc, tag, &bus, &device, &function);
|
||||
if (bus == 0) {
|
||||
if (device > 21)
|
||||
return;
|
||||
tag = (1 << (device + 11)) | (function << 8); /* Type 0 */
|
||||
} else
|
||||
tag |= VRPCIU_CONF_TYPE1;
|
||||
|
||||
vrpciu_write(sc, VRPCIU_CONFAREG, tag | reg);
|
||||
vrpciu_write(sc, VRPCIU_CONFDREG, data);
|
||||
}
|
||||
|
||||
void *
|
||||
vrpciu_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
|
||||
int (*func)(void *), void *arg)
|
||||
{
|
||||
struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev;
|
||||
|
||||
if (ih == -1)
|
||||
return (NULL);
|
||||
DPRINTF(("vrpciu_intr_establish: %p\n", sc));
|
||||
return (vrc4173bcu_intr_establish(sc->sc_bcu, ih, func, arg));
|
||||
}
|
||||
|
||||
void
|
||||
vrpciu_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
|
||||
{
|
||||
struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev;
|
||||
|
||||
DPRINTF(("vrpciu_intr_disestablish: %p\n", sc));
|
||||
vrc4173bcu_intr_disestablish(sc->sc_bcu, cookie);
|
||||
}
|
||||
|
||||
void *
|
||||
vrpciu_vrcintr_establish(pci_chipset_tag_t pc, int port,
|
||||
int (*func)(void *), void *arg)
|
||||
{
|
||||
struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev;
|
||||
struct vrip_softc *vsc = (struct vrip_softc *)sc->sc_vc;
|
||||
void *ih;
|
||||
|
||||
sc->sc_bcu = arg;
|
||||
ih = hpcio_intr_establish(vsc->sc_gpio_chips[VRIP_IOCHIP_VRGIU],
|
||||
port, HPCIO_INTR_LEVEL | HPCIO_INTR_LOW | HPCIO_INTR_HOLD,
|
||||
func, arg);
|
||||
|
||||
return (ih);
|
||||
}
|
||||
|
||||
void
|
||||
vrpciu_vrcintr_disestablish(pci_chipset_tag_t pc, void *ih)
|
||||
{
|
||||
struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev;
|
||||
struct vrip_softc *vsc = (struct vrip_softc *)sc->sc_vc;
|
||||
|
||||
return (vrip_intr_disestablish(vsc->sc_gpio_chips[VRIP_IOCHIP_VRGIU],
|
||||
ih));
|
||||
}
|
||||
74
sys/arch/hpcmips/vr/vrpciureg.h
Normal file
74
sys/arch/hpcmips/vr/vrpciureg.h
Normal file
@ -0,0 +1,74 @@
|
||||
/* $NetBSD: vrpciureg.h,v 1.1 2001/06/13 07:32:48 enami Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2001 Enami Tsugutomo.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#define VRPCIU_BASE 0x0f000c00 /* vr4122 */
|
||||
|
||||
/*
|
||||
* Master Memory/IO Address Window.
|
||||
*/
|
||||
#define VRPCIU_MMAW1REG 0x0000
|
||||
#define VRPCIU_MMAW2REG 0x0004
|
||||
#define VRPCIU_MIOAWREG 0x0010
|
||||
|
||||
#define VRPCIU_MAW_IBAMASK 0xff000000 /* Internal Bus Base Address */
|
||||
#define VRPCIU_MAW_ADDRMASK(reg) \
|
||||
((((reg) >> 13) & 0x7f) << 24) /* Address Mask */
|
||||
#define VRPCIU_MAW_ADDR(reg) \
|
||||
(((reg) & VRPCIU_MAW_IBAMASK) & VRPCIU_MAW_ADDRMASK(reg))
|
||||
#define VRPCIU_MAW_SIZE(reg) (~(VRPCIU_MAW_ADDRMASK(reg) | 0x80000000))
|
||||
#define VRPCIU_MAW_WINEN (1 << 12) /* PCI access is enabled */
|
||||
#define VRPCIU_MAW_PCIADDR(reg) (((reg) & 0xff) << 24) /* PCI Address */
|
||||
#define VRPCIU_MAW(start, size) /* XXX */
|
||||
|
||||
/*
|
||||
* Target Address Window.
|
||||
*/
|
||||
#define VRPCIU_TAW1REG 0x0008
|
||||
#define VRPCIU_TAW2REG 0x000c
|
||||
#define VRPCIU_TAW_ADDRMASK(reg) \
|
||||
((((reg) >> 13) & 0x7f) << 21) /* Address Mask */
|
||||
#define VRPCIU_TAW_WINEN (1 << 12) /* PCI access is enabled */
|
||||
#define VRPCIU_TAW_IBA(reg) (((reg) & 0x7ff) << 21) /* Internal Bus Address */
|
||||
|
||||
#define VRPCIU_CONFDREG 0x0014
|
||||
#define VRPCIU_CONFAREG 0x0018
|
||||
#define VRPCIU_MAILREG 0x001c
|
||||
#define VRPCIU_BUSERRADREG 0x0024
|
||||
#define VRPCIU_INTCNTSTAREG 0x0028
|
||||
#define VRPCIU_EXACCREG 0x002c
|
||||
#define VRPCIU_RECONTREG 0x0030
|
||||
#define VRPCIU_ENREG 0x0034
|
||||
#define VRPCIU_CLKSELREG 0x0038
|
||||
#define VRPCIU_TRDYVREG 0x003c
|
||||
#define VRPCIU_CLKRUNREG 0x0060
|
||||
|
||||
#define VRPCIU_CONF_TYPE1 0x1
|
||||
#define VRPCIU_CONF_BASE (0x0f000d00 - VRPCIU_BASE)
|
||||
#define VRPCIU_CONF_MAILREG 0x10
|
||||
#define VRPCIU_CONF_MBA1REG 0x14
|
||||
#define VRPCIU_CONF_MBA2REG 0x18
|
||||
Loading…
Reference in New Issue
Block a user