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Initial commit of SoftFloat 2a import. This should provide a sensible 

mostly-MI floating-point implementation for use by gcc -msoft-float.
It's currently only used by arm26, but should be usable by other ports
without too much hacking, assuming doubles and u_int64_ts are passed and
returned the same way, and FP formats are IEEEish.
This commit is contained in:
bjh21 2000-06-06 08:14:49 +00:00
parent b5321a5a5c
commit 4472dbe5e3
53 changed files with 12150 additions and 4009 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/libc/arch/arm26/Makefile.inc
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@ -1,4 +1,4 @@
# $NetBSD: Makefile.inc,v 1.1 2000/05/09 21:55:45 bjh21 Exp $
# $NetBSD: Makefile.inc,v 1.2 2000/06/06 08:14:49 bjh21 Exp $
KMINCLUDES=
KMSRCS=arch/arm26/gen/divsi3.S arch/arm26/string/memmove.S \
@ -6,4 +6,4 @@ KMSRCS=arch/arm26/gen/divsi3.S arch/arm26/string/memmove.S \
# __APCS_26__ required for SYS.h stuff
CPPFLAGS+=-DSOFTFLOAT -D__APCS_26__
.include <fplib/Makefile.inc>
.include <softfloat/Makefile.inc>

23
lib/libc/arch/arm26/fplib/Makefile.inc
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@ -1,23 +0,0 @@
# $NetBSD: Makefile.inc,v 1.1 2000/05/09 21:55:46 bjh21 Exp $
.PATH: ${.CURDIR}/arch/arm26/fplib
SRCS+=fplib_glue.S fplib_libc.c softfloat.c
softfloat.o: softfloat.c
@echo ${COMPILE.c:Q} -freg-struct-return ${.IMPSRC}
@${COMPILE.c} -freg-struct-return ${.IMPSRC} -o ${.TARGET}.o
@${LD} -x -r ${.TARGET}.o -o ${.TARGET}
@rm -f ${.TARGET}.o
softfloat.po: softfloat.c
@echo ${COMPILE.c:Q} -pg -freg-struct-return ${.IMPSRC} -o ${.TARGET}
@${COMPILE.c} -pg -freg-struct-return ${.IMPSRC} -o ${.TARGET}.o
@${LD} -X -r ${.TARGET}.o -o ${.TARGET}
@rm -f ${.TARGET}.o
softfloat.so: softfloat.c
@echo ${COMPILE.c:Q} ${CPICFLAGS} -freg-struct-return ${.IMPSRC} -o ${.TARGET}
@${COMPILE.c} ${CPICFLAGS} -freg-struct-return ${.IMPSRC} -o ${.TARGET}.o
@${LD} -x -r ${.TARGET}.o -o ${.TARGET}
@rm -f ${.TARGET}.o

63
lib/libc/arch/arm26/fplib/environment.h
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@ -1,63 +0,0 @@
/* $NetBSD: environment.h,v 1.1 2000/05/09 21:55:46 bjh21 Exp $ */
/*
===============================================================================
This C header file is part of the SoftFloat IEC/IEEE Floating-point
Arithmetic Package, Release 1a.
Written by John R. Hauser. This work was made possible by the International
Computer Science Institute, located at Suite 600, 1947 Center Street,
Berkeley, California 94704. Funding was provided in part by the National
Science Foundation under grant MIP-9311980. The original version of
this code was written as part of a project to build a fixed-point vector
processor in collaboration with the University of California at Berkeley,
overseen by Profs. Nelson Morgan and John Wawrzynek. More information
is available through the web page `http://www.cs.berkeley.edu/~jhauser/
softfloat.html'.
THIS PACKAGE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
been made to avoid it, THIS PACKAGE MAY CONTAIN FAULTS THAT WILL AT TIMES
RESULT IN INCORRECT BEHAVIOR. USE OF THIS PACKAGE IS RESTRICTED TO PERSONS
AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY AND ALL
LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
Derivative works are acceptable, even for commercial purposes, so long as
(1) they include prominent notice that the work is derivative, and (2) they
include prominent notice akin to these three paragraphs for those parts of
this code that are retained.
===============================================================================
*/
/*
-------------------------------------------------------------------------------
Include common integer types and flags.
-------------------------------------------------------------------------------
*/
#include "arm-gcc.h"
/*
-------------------------------------------------------------------------------
The word `INLINE' appears before all routines that should be inlined. If
a compiler does not support inlining, this macro should be defined to be
`static'.
-------------------------------------------------------------------------------
*/
#define INLINE static __inline
/*
-------------------------------------------------------------------------------
Move private identifiers with external linkage into implementation namespace.
-- Klaus Klein <kleink@netbsd.org>, May 5, 1999
-------------------------------------------------------------------------------
*/
#define float_exception_flags _arm_float_exception_flags
#define float_rounding_mode _arm_float_rounding_mode
#define float32_eq _arm_float32_eq
#define float32_le _arm_float32_le
#define float32_lt _arm_float32_lt
#define float64_eq _arm_float64_eq
#define float64_le _arm_float64_le
#define float64_lt _arm_float64_lt
#define float_raise _arm_float_raise

211
lib/libc/arch/arm26/fplib/fplib_glue.S
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@ -1,211 +0,0 @@
/* $NetBSD: fplib_glue.S,v 1.1 2000/05/09 21:55:46 bjh21 Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Neil A. Carson and Mark Brinicombe
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <machine/asm.h>
#define SIGN_BIT_TWIDDLE 0x80000000
/********************************* COMPARISONS ********************************/
/*
* 'Equal' wrapper. This returns 0 if the numbers are equal, or (1 | -1)
* otherwise. So we need to invert the output.
*/
ENTRY(__eqsf2)
stmfd sp!, {lr}
bl _C_LABEL(_arm_float32_eq)
eor r0, r0, #1
#ifdef __APCS_26__
ldmfd sp!, {pc}^
#else
ldmfd sp!, {pc}
#endif
ENTRY(__eqdf2)
stmfd sp!, {lr}
bl _C_LABEL(_arm_float64_eq)
eor r0, r0, #1
#ifdef __APCS_26__
ldmfd sp!, {pc}^
#else
ldmfd sp!, {pc}
#endif
/*
* 'Not Equal' wrapper. This returns -1 or 1 (say, 1!) if the numbers are
* not equal, 0 otherwise. However no not equal call is provided, so we have
* to use an 'equal' call and invert the result. The result is already
* inverted though! Confusing?!
*/
ENTRY(__nesf2)
stmfd sp!, {lr}
bl _C_LABEL(_arm_float32_eq)
eor r0, r0, #1
#ifdef __APCS_26__
ldmfd sp!, {pc}^
#else
ldmfd sp!, {pc}
#endif
ENTRY(__nedf2)
stmfd sp!, {lr}
bl _C_LABEL(_arm_float64_eq)
eor r0, r0, #1
#ifdef __APCS_26__
ldmfd sp!, {pc}^
#else
ldmfd sp!, {pc}
#endif
/*
* 'Greater Than' wrapper. This returns 1 if the number is greater, 0
* or -1 otherwise. Unfortunately, no such function exists. We have to
* instead compare the numbers using the 'less than' calls in order to
* make up our mind. This means that we can call 'less than or equal' and
* invert the result.
*/
ENTRY(__gtsf2)
stmfd sp!, {lr}
bl _C_LABEL(_arm_float32_le)
eor r0, r0, #1
#ifdef __APCS_26__
ldmfd sp!, {pc}^
#else
ldmfd sp!, {pc}
#endif
ENTRY(__gtdf2)
stmfd sp!, {lr}
bl _C_LABEL(_arm_float64_le)
eor r0, r0, #1
#ifdef __APCS_26__
ldmfd sp!, {pc}^
#else
ldmfd sp!, {pc}
#endif
/*
* 'Greater Than or Equal' wrapper. We emulate this by inverting the result
* of a 'less than' call.
*/
ENTRY(__gesf2)
stmfd sp!, {lr}
bl _C_LABEL(_arm_float32_lt)
eor r0, r0, #1
cmp r0, #0
mvneq r0, #0
#ifdef __APCS_26__
ldmfd sp!, {pc}^
#else
ldmfd sp!, {pc}
#endif
ENTRY(__gedf2)
stmfd sp!, {lr}
bl _C_LABEL(_arm_float64_lt)
eor r0, r0, #1
cmp r0, #0
mvneq r0, #0
#ifdef __APCS_26__
ldmfd sp!, {pc}^
#else
ldmfd sp!, {pc}
#endif
/*
* 'Less Than' wrapper. A 1 from the ARM code needs to be turned into -1.
*/
ENTRY(__ltsf2)
stmfd sp!, {lr}
bl _C_LABEL(_arm_float32_lt)
cmp r0, #1
mvneq r0, #0
#ifdef __APCS_26__
ldmfd sp!, {pc}^
#else
ldmfd sp!, {pc}
#endif
ENTRY(__ltdf2)
stmfd sp!, {lr}
bl _C_LABEL(_arm_float64_lt)
cmp r0, #1
mvneq r0, #0
#ifdef __APCS_26__
ldmfd sp!, {pc}^
#else
ldmfd sp!, {pc}
#endif
/*
* 'Less Than or Equal' wrapper. A 0 must turn into a 1, and a 1 into a 0.
*/
ENTRY(__lesf2)
stmfd sp!, {lr}
bl _C_LABEL(_arm_float32_le)
eor r0, r0, #1
#ifdef __APCS_26__
ldmfd sp!, {pc}^
#else
ldmfd sp!, {pc}
#endif
ENTRY(__ledf2)
stmfd sp!, {lr}
bl _C_LABEL(_arm_float64_le)
eor r0, r0, #1
#ifdef __APCS_26__
ldmfd sp!, {pc}^
#else
ldmfd sp!, {pc}
#endif
/*
* Float negate... This isn't provided by the library, but it's hardly the
* hardest function in the world to write... :) In fact, because of the
* position in the registers of arguments, the double precision version can
* go here too ;-)
*/
ENTRY(__negsf2)
ENTRY(__negdf2)
eor r0, r0, #SIGN_BIT_TWIDDLE
#ifdef __APCS_26__
movs pc, lr
#else
mov pc, lr
#endif

754
lib/libc/arch/arm26/fplib/softfloat-macros.h
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@ -1,754 +0,0 @@
/* $NetBSD: softfloat-macros.h,v 1.1 2000/05/09 21:55:46 bjh21 Exp $ */
/*
===============================================================================
This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
Arithmetic Package, Release 1a.
Written by John R. Hauser. This work was made possible by the International
Computer Science Institute, located at Suite 600, 1947 Center Street,
Berkeley, California 94704. Funding was provided in part by the National
Science Foundation under grant MIP-9311980. The original version of
this code was written as part of a project to build a fixed-point vector
processor in collaboration with the University of California at Berkeley,
overseen by Profs. Nelson Morgan and John Wawrzynek. More information
is available through the web page `http://www.cs.berkeley.edu/~jhauser/
softfloat.html'.
THIS PACKAGE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
been made to avoid it, THIS PACKAGE MAY CONTAIN FAULTS THAT WILL AT TIMES
RESULT IN INCORRECT BEHAVIOR. USE OF THIS PACKAGE IS RESTRICTED TO PERSONS
AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY AND ALL
LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
Derivative works are acceptable, even for commercial purposes, so long as
(1) they include prominent notice that the work is derivative, and (2) they
include prominent notice akin to these three paragraphs for those parts of
this code that are retained.
===============================================================================
*/
INLINE void shiftDown32Jamming( bits32 a, uint16 count, bits32 *zPtr );
INLINE void shiftDown64ExtraJamming(
bits32 a0,
bits32 a1,
bits32 a2,
uint16 count,
bits32 *z0Ptr,
bits32 *z1Ptr,
bits32 *z2Ptr
);
INLINE void shiftDown64Jamming(
bits32 a0, bits32 a1, uint16 count, bits32 *z0Ptr, bits32 *z1Ptr );
INLINE void shiftDown64(
bits32 a0, bits32 a1, uint16 count, bits32 *z0Ptr, bits32 *z1Ptr );
INLINE void shortShiftUp64(
bits32 a0, bits32 a1, uint16 count, bits32 *z0Ptr, bits32 *z1Ptr );
INLINE void shortShiftUp96(
bits32 a0,
bits32 a1,
bits32 a2,
uint16 count,
bits32 *z0Ptr,
bits32 *z1Ptr,
bits32 *z2Ptr
);
INLINE void add64(
bits32 a0, bits32 a1, bits32 b0, bits32 b1, bits32 *z0Ptr, bits32 *z1Ptr );
INLINE void add96(
bits32 a0,
bits32 a1,
bits32 a2,
bits32 b0,
bits32 b1,
bits32 b2,
bits32 *z0Ptr,
bits32 *z1Ptr,
bits32 *z2Ptr
);
INLINE void sub64(
bits32 a0, bits32 a1, bits32 b0, bits32 b1, bits32 *z0Ptr, bits32 *z1Ptr );
INLINE void sub96(
bits32 a0,
bits32 a1,
bits32 a2,
bits32 b0,
bits32 b1,
bits32 b2,
bits32 *z0Ptr,
bits32 *z1Ptr,
bits32 *z2Ptr
);
INLINE void mul32To64( bits32 a, bits32 b, bits32 *z0Ptr, bits32 *z1Ptr );
INLINE void mul64By32To96(
bits32 a0,
bits32 a1,
bits32 b,
bits32 *z0Ptr,
bits32 *z1Ptr,
bits32 *z2Ptr
);
INLINE void mul64To128(
bits32 a0,
bits32 a1,
bits32 b0,
bits32 b1,
bits32 *z0Ptr,
bits32 *z1Ptr,
bits32 *z2Ptr,
bits32 *z3Ptr
);
static bits32 estimateDiv64To32( bits32 a0, bits32 a1, bits32 b );
#if 0 /* unused */
static bits32 estimateSqrt32( int16 aExp, bits32 a );
#endif
static int8 countLeadingZeros( bits32 a );
INLINE flag eq64( bits32 a0, bits32 a1, bits32 b0, bits32 b1 );
INLINE flag le64( bits32 a0, bits32 a1, bits32 b0, bits32 b1 );
INLINE flag lt64( bits32 a0, bits32 a1, bits32 b0, bits32 b1 );
#if 0 /* XXX not used */
INLINE flag ne64( bits32 a0, bits32 a1, bits32 b0, bits32 b1 );
#endif
/*
-------------------------------------------------------------------------------
Shifts `a' down by the number of bits given in `count'. If any nonzero bits
are shifted off, they are ``jammed'' into the least significant bit of the
result by setting the least significant bit to 1. The value of `count' can
be arbitrarily large; in particular, if `count' is greater than 32, the
result will be either 0 or 1, depending on whether `a' is zero or nonzero.
The result is stored in the location pointed to by `zPtr'.
-------------------------------------------------------------------------------
*/
INLINE void shiftDown32Jamming( bits32 a, uint16 count, bits32 *zPtr )
{
bits32 z;
if ( count == 0 ) {
z = a;
}
else if ( count < 32 ) {
z = ( a>>count ) | ( 0 < ( a<<( ( - count ) & 31 ) ) );
}
else {
z = ( 0 < a );
}
*zPtr = z;
}
/*
-------------------------------------------------------------------------------
Shifts the 96-bit value formed by concatenating `a0', `a1', and `a2' down by
32 _plus_ the number of bits given in `count'. The shifted-down result is
at most 64 nonzero bits; these are broken into two 32-bit pieces which are
stored at the locations pointed to by `z0Ptr' and `z1Ptr'. The bits shifted
off form a third 32-bit result as follows: The _last_ bit shifted off is
the most-significant bit of the extra result, and the other 31 bits of the
extra result are all zero if and only if _all_but_the_last_ bits shifted off
were all zero. This extra result is stored in the location pointed to by
`z2Ptr'. The value of `count' can be arbitrarily large.
(This routine makes more sense if `a0', `a1', and `a2' are considered
to form a fixed-point value with binary point between `a1' and `a2'. This
fixed-point value is shifted down by the number of bits given in `count',
and the integer part of the result is returned at the locations pointed to
by `z0Ptr' and `z1Ptr'. The fractional part of the result may be slightly
corrupted as described above, and is returned at the location pointed to by
`z2Ptr'.)
-------------------------------------------------------------------------------
*/
INLINE void
shiftDown64ExtraJamming(
bits32 a0,
bits32 a1,
bits32 a2,
uint16 count,
bits32 *z0Ptr,
bits32 *z1Ptr,
bits32 *z2Ptr
)
{
bits32 z0, z1, z2;
int8 negCount = ( - count ) & 31;
if ( count == 0 ) {
z2 = a2;
z1 = a1;
z0 = a0;
}
else {
if ( count < 32 ) {
z2 = a1<<negCount;
z1 = ( a0<<negCount ) | ( a1>>count );
z0 = a0>>count;
}
else {
if ( count == 32 ) {
z2 = a1;
z1 = a0;
}
else {
a2 |= a1;
if ( count < 64 ) {
z2 = a0<<negCount;
z1 = a0>>( count & 31 );
}
else {
z2 = ( count == 64 ) ? a0 : ( 0 < a0 );
z1 = 0;
}
}
z0 = 0;
}
z2 |= ( 0 < a2 );
}
*z2Ptr = z2;
*z1Ptr = z1;
*z0Ptr = z0;
}
/*
-------------------------------------------------------------------------------
Shifts the 64-bit value formed by concatenating `a0' and `a1' down by the
number of bits given in `count'. If any nonzero bits are shifted off, they
are ``jammed'' into the least significant bit of the result by setting the
least significant bit to 1. The value of `count' can be arbitrarily large;
in particular, if `count' is greater than 64, the result will be either 0
or 1, depending on whether the concatenation of `a0' and `a1' is zero or
nonzero. The result is broken into two 32-bit pieces which are stored at
the locations pointed to by `z0Ptr' and `z1Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void
shiftDown64Jamming(
bits32 a0, bits32 a1, uint16 count, bits32 *z0Ptr, bits32 *z1Ptr )
{
bits32 z0, z1;
int8 negCount = ( - count ) & 31;
if ( count == 0 ) {
z1 = a1;
z0 = a0;
}
else if ( count < 32 ) {
z1 = ( a0<<negCount ) | ( a1>>count ) | ( 0 < ( a1<<negCount ) );
z0 = a0>>count;
}
else {
if ( count == 32 ) {
z1 = a0 | ( 0 < a1 );
}
else if ( count < 64 ) {
z1 = ( a0>>( count & 31 ) ) | ( 0 < ( ( a0<<negCount ) | a1 ) );
}
else {
z1 = ( 0 < ( a0 | a1 ) );
}
z0 = 0;
}
*z1Ptr = z1;
*z0Ptr = z0;
}
/*
-------------------------------------------------------------------------------
Shifts the 64-bit value formed by concatenating `a0' and `a1' down by the
number of bits given in `count'. Any bits shifted off are lost. The value
of `count' can be arbitrarily large; in particular, if `count' is greater
than 64, the result will be 0. The result is broken into two 32-bit pieces
which are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void
shiftDown64(
bits32 a0, bits32 a1, uint16 count, bits32 *z0Ptr, bits32 *z1Ptr )
{
bits32 z0, z1;
int8 negCount = ( - count ) & 31;
if ( count == 0 ) {
z1 = a1;
z0 = a0;
}
else if ( count < 32 ) {
z1 = ( a0<<negCount ) | ( a1>>count );
z0 = a0>>count;
}
else {
z1 = ( count < 64 ) ? ( a0>>( count & 31 ) ) : 0;
z0 = 0;
}
*z1Ptr = z1;
*z0Ptr = z0;
}
/*
-------------------------------------------------------------------------------
Shifts the 64-bit value formed by concatenating `a0' and `a1' up by the
number of bits given in `count'. Any bits shifted off are lost. The value
of `count' must be less than 32. The result is broken into two 32-bit
pieces which are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void
shortShiftUp64(
bits32 a0, bits32 a1, uint16 count, bits32 *z0Ptr, bits32 *z1Ptr )
{
*z1Ptr = a1<<count;
*z0Ptr =
( count == 0 ) ? a0 : ( a0<<count ) | ( a1>>( ( - count ) & 31 ) );
}
/*
-------------------------------------------------------------------------------
Shifts the 96-bit value formed by concatenating `a0', `a1', and `a2' up by
the number of bits given in `count'. Any bits shifted off are lost. The
value of `count' must be less than 32. The result is broken into three
32-bit pieces which are stored at the locations pointed to by `z0Ptr',
`z1Ptr', and `z2Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void
shortShiftUp96(
bits32 a0,
bits32 a1,
bits32 a2,
uint16 count,
bits32 *z0Ptr,
bits32 *z1Ptr,
bits32 *z2Ptr
)
{
bits32 z0, z1, z2;
int8 negCount;
z2 = a2<<count;
z1 = a1<<count;
z0 = a0<<count;
if ( 0 < count ) {
negCount = ( ( - count ) & 31 );
z1 |= a2>>negCount;
z0 |= a1>>negCount;
}
*z2Ptr = z2;
*z1Ptr = z1;
*z0Ptr = z0;
}
/*
-------------------------------------------------------------------------------
Adds the 64-bit value formed by concatenating `a0' and `a1' to the 64-bit
value formed by concatenating `b0' and `b1'. Addition is modulo 2^64, so
any carry out is lost. The result is broken into two 32-bit pieces which
are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void
add64(
bits32 a0, bits32 a1, bits32 b0, bits32 b1, bits32 *z0Ptr, bits32 *z1Ptr )
{
bits32 z1;
z1 = a1 + b1;
*z1Ptr = z1;
*z0Ptr = a0 + b0 + ( z1 < a1 );
}
/*
-------------------------------------------------------------------------------
Adds the 96-bit value formed by concatenating `a0', `a1', and `a2' to the
96-bit value formed by concatenating `b0', `b1', and `b2'. Addition is
modulo 2^96, so any carry out is lost. The result is broken into three
32-bit pieces which are stored at the locations pointed to by `z0Ptr',
`z1Ptr', and `z2Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void
add96(
bits32 a0,
bits32 a1,
bits32 a2,
bits32 b0,
bits32 b1,
bits32 b2,
bits32 *z0Ptr,
bits32 *z1Ptr,
bits32 *z2Ptr
)
{
bits32 z0, z1, z2;
int8 carry0, carry1;
z2 = a2 + b2;
carry1 = ( z2 < a2 );
z1 = a1 + b1;
carry0 = ( z1 < a1 );
z0 = a0 + b0;
z1 += carry1;
z0 += ( z1 < carry1 );
z0 += carry0;
*z2Ptr = z2;
*z1Ptr = z1;
*z0Ptr = z0;
}
/*
-------------------------------------------------------------------------------
Subtracts the 64-bit value formed by concatenating `b0' and `b1' from the
64-bit value formed by concatenating `a0' and `a1'. Subtraction is modulo
2^64, so any borrow out (carry out) is lost. The result is broken into two
32-bit pieces which are stored at the locations pointed to by `z0Ptr' and
`z1Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void
sub64(
bits32 a0, bits32 a1, bits32 b0, bits32 b1, bits32 *z0Ptr, bits32 *z1Ptr )
{
*z1Ptr = a1 - b1;
*z0Ptr = a0 - b0 - ( a1 < b1 );
}
/*
-------------------------------------------------------------------------------
Subtracts the 96-bit value formed by concatenating `b0', `b1', and `b2' from
the 96-bit value formed by concatenating `a0', `a1', and `a2'. Subtraction
is modulo 2^96, so any borrow out (carry out) is lost. The result is broken
into three 32-bit pieces which are stored at the locations pointed to by
`z0Ptr', `z1Ptr', and `z2Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void
sub96(
bits32 a0,
bits32 a1,
bits32 a2,
bits32 b0,
bits32 b1,
bits32 b2,
bits32 *z0Ptr,
bits32 *z1Ptr,
bits32 *z2Ptr
)
{
bits32 z0, z1, z2;
int8 borrow0, borrow1;
z2 = a2 - b2;
borrow1 = ( a2 < b2 );
z1 = a1 - b1;
borrow0 = ( a1 < b1 );
z0 = a0 - b0;
z0 -= ( z1 < borrow1 );
z1 -= borrow1;
z0 -= borrow0;
*z2Ptr = z2;
*z1Ptr = z1;
*z0Ptr = z0;
}
/*
-------------------------------------------------------------------------------
Multiplies `a' by `b' to obtain a 64-bit product. The product is broken
into two 32-bit pieces which are stored at the locations pointed to by
`z0Ptr' and `z1Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void mul32To64( bits32 a, bits32 b, bits32 *z0Ptr, bits32 *z1Ptr )
{
bits16 aHigh, aLow, bHigh, bLow;
bits32 z0, zMiddle, zMiddleOther, z1;
aLow = ( a & 0xFFFF );
aHigh = a>>16;
bLow = ( b & 0xFFFF );
bHigh = b>>16;
z1 = aLow * bLow;
zMiddle = aLow * bHigh;
zMiddleOther = aHigh * bLow;
z0 = aHigh * bHigh;
zMiddle += zMiddleOther;
z0 += ( ( zMiddle < zMiddleOther )<<16 ) + ( zMiddle>>16 );
zMiddle = zMiddle<<16;
z1 += zMiddle;
z0 += ( z1 < zMiddle );
*z1Ptr = z1;
*z0Ptr = z0;
}
/*
-------------------------------------------------------------------------------
Multiplies the 64-bit value formed by concatenating `a0' and `a1' by `b' to
obtain a 96-bit product. The product is broken into three 32-bit pieces
which are stored at the locations pointed to by `z0Ptr', `z1Ptr', and
`z2Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void
mul64By32To96(
bits32 a0,
bits32 a1,
bits32 b,
bits32 *z0Ptr,
bits32 *z1Ptr,
bits32 *z2Ptr
)
{
bits32 z0, z1, z2, more1;
mul32To64( a1, b, &z1, &z2 );
mul32To64( a0, b, &z0, &more1 );
add64( z0, more1, 0, z1, &z0, &z1 );
*z2Ptr = z2;
*z1Ptr = z1;
*z0Ptr = z0;
}
/*
-------------------------------------------------------------------------------
Multiplies the 64-bit value formed by concatenating `a0' and `a1' to the
64-bit value formed by concatenating `b0' and `b1' to obtain a 128-bit
product. The product is broken into four 32-bit pieces which are stored at
the locations pointed to by `z0Ptr', `z1Ptr', `z2Ptr', and `z3Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void
mul64To128(
bits32 a0,
bits32 a1,
bits32 b0,
bits32 b1,
bits32 *z0Ptr,
bits32 *z1Ptr,
bits32 *z2Ptr,
bits32 *z3Ptr
)
{
bits32 z0, z1, z2, z3;
bits32 more1, more2;
mul32To64( a1, b1, &z2, &z3 );
mul32To64( a1, b0, &z1, &more2 );
add64( z1, more2, 0, z2, &z1, &z2 );
mul32To64( a0, b0, &z0, &more1 );
add64( z0, more1, 0, z1, &z0, &z1 );
mul32To64( a0, b1, &more1, &more2 );
add64( more1, more2, 0, z2, &more1, &z2 );
add64( z0, z1, 0, more1, &z0, &z1 );
*z3Ptr = z3;
*z2Ptr = z2;
*z1Ptr = z1;
*z0Ptr = z0;
}
/*
-------------------------------------------------------------------------------
Returns an approximation to the 32-bit integer quotient obtained by dividing
the 64-bit value formed by concatenating `a0' and `a1' by `b'. The divisor
`b' must be at least 2^31. If q is the exact quotient truncated toward
zero, the approximation returned lies between q and q + 2 inclusive. If
the exact quotient q is larger than 32 bits, the maximum positive 32-bit
unsigned integer is returned.
-------------------------------------------------------------------------------
*/
static bits32 estimateDiv64To32( bits32 a0, bits32 a1, bits32 b )
{
bits32 z;
bits32 rem0, rem1;
bits32 term0, term1;
bits32 b0, b1;
if ( b <= a0 ) return 0xFFFFFFFF;
b0 = b>>16;
z = ( b0<<16 <= a0 ) ? 0xFFFF0000 : ( a0 / b0 )<<16;
mul32To64( b, z, &term0, &term1 );
sub64( a0, a1, term0, term1, &rem0, &rem1 );
while ( ( (sbits32) rem0 ) < 0 ) {
z -= 0x10000;
b1 = b<<16;
add64( rem0, rem1, b0, b1, &rem0, &rem1 );
}
rem0 = ( rem0<<16 ) | ( rem1>>16 );
z |= ( b0<<16 <= rem0 ) ? 0xFFFF : rem0 / b0;
return z;
}
#if 0 /* unused */
/*
-------------------------------------------------------------------------------
Returns an approximation to the square root of the 32-bit significand given
by `a'. Considered as an integer, `a' must be at least 2^31. If bit 0 of
`aExp' (the least significant bit) is 1, the integer returned approximates
2^31*sqrt(`a'/2^31), where `a' is considered an integer. If bit 0 of `aExp'
is 0, the integer returned approximates 2^31*sqrt(`a'/2^30). In either
case, the approximation returned lies strictly within +/-2 of the exact
value.
-------------------------------------------------------------------------------
*/
static bits32 estimateSqrt32( int16 aExp, bits32 a )
{
static const bits16 sqrtOddAdjustments[] = {
0x0004, 0x0022, 0x005D, 0x00B1, 0x011D, 0x019F, 0x0236, 0x02E0,
0x039C, 0x0468, 0x0545, 0x0631, 0x072B, 0x0832, 0x0946, 0x0A67
};
static const bits16 sqrtEvenAdjustments[] = {
0x0A2D, 0x08AF, 0x075A, 0x0629, 0x051A, 0x0429, 0x0356, 0x029E,
0x0200, 0x0179, 0x0109, 0x00AF, 0x0068, 0x0034, 0x0012, 0x0002
};
int8 index;
bits32 z;
index = ( a>>27 ) & 15;
if ( aExp & 1 ) {
z = 0x4000 + ( a>>17 ) - sqrtOddAdjustments[ index ];
z = ( ( a / z )<<14 ) + ( z<<15 );
a = a>>1;
}
else {
z = 0x8000 + ( a>>17 ) - sqrtEvenAdjustments[ index ];
z = ( ( a / z ) + z );
z = ( 0x20000 <= z ) ? 0xFFFF8000 : ( z<<15 );
if ( z <= a ) return (bits32) ( ( (sbits32) a )>>1 );
}
return ( ( estimateDiv64To32( a, 0, z ) )>>1 ) + ( z>>1 );
}
#endif /* unused */
/*
-------------------------------------------------------------------------------
Returns the number of leading 0 bits before the most-significant 1 bit
of `a'. If `a' is zero, 32 is returned.
-------------------------------------------------------------------------------
*/
static int8 countLeadingZeros( bits32 a )
{
static const int8 countLeadingZerosHigh[] = {
8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};
int8 shiftCount;
shiftCount = 0;
if ( a < 0x10000 ) {
shiftCount += 16;
a = a<<16;
}
if ( a < 0x1000000 ) {
shiftCount += 8;
a = a<<8;
}
shiftCount += countLeadingZerosHigh[ a>>24 ];
return shiftCount;
}
/*
-------------------------------------------------------------------------------
Returns 1 if the 64-bit value formed by concatenating `a0' and `a1' is equal
to the 64-bit value formed by concatenating `b0' and `b1'. Otherwise,
returns 0.
-------------------------------------------------------------------------------
*/
INLINE flag eq64( bits32 a0, bits32 a1, bits32 b0, bits32 b1 )
{
return ( a0 == b0 ) && ( a1 == b1 );
}
/*
-------------------------------------------------------------------------------
Returns 1 if the 64-bit value formed by concatenating `a0' and `a1' is less
than or equal to the 64-bit value formed by concatenating `b0' and `b1'.
Otherwise, returns 0.
-------------------------------------------------------------------------------
*/
INLINE flag le64( bits32 a0, bits32 a1, bits32 b0, bits32 b1 )
{
return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 <= b1 ) );
}
/*
-------------------------------------------------------------------------------
Returns 1 if the 64-bit value formed by concatenating `a0' and `a1' is less
than the 64-bit value formed by concatenating `b0' and `b1'. Otherwise,
returns 0.
-------------------------------------------------------------------------------
*/
INLINE flag lt64( bits32 a0, bits32 a1, bits32 b0, bits32 b1 )
{
return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 < b1 ) );
}
/*
-------------------------------------------------------------------------------
Returns 1 if the 64-bit value formed by concatenating `a0' and `a1' is not
equal to the 64-bit value formed by concatenating `b0' and `b1'. Otherwise,
returns 0.
-------------------------------------------------------------------------------
*/
#if 0 /* XXX not used */
INLINE flag ne64( bits32 a0, bits32 a1, bits32 b0, bits32 b1 )
{
return ( a0 != b0 ) || ( a1 != b1 );
}
#endif

173
lib/libc/arch/arm26/fplib/softfloat-specialize.h
View File

@ -1,173 +0,0 @@
/* $NetBSD: softfloat-specialize.h,v 1.1 2000/05/09 21:55:46 bjh21 Exp $ */
/*
===============================================================================
This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
Arithmetic Package, Release 1a.
Written by John R. Hauser. This work was made possible by the International
Computer Science Institute, located at Suite 600, 1947 Center Street,
Berkeley, California 94704. Funding was provided in part by the National
Science Foundation under grant MIP-9311980. The original version of
this code was written as part of a project to build a fixed-point vector
processor in collaboration with the University of California at Berkeley,
overseen by Profs. Nelson Morgan and John Wawrzynek. More information
is available through the web page `http://www.cs.berkeley.edu/~jhauser/
softfloat.html'.
THIS PACKAGE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
been made to avoid it, THIS PACKAGE MAY CONTAIN FAULTS THAT WILL AT TIMES
RESULT IN INCORRECT BEHAVIOR. USE OF THIS PACKAGE IS RESTRICTED TO PERSONS
AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY AND ALL
LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
Derivative works are acceptable, even for commercial purposes, so long as
(1) they include prominent notice that the work is derivative, and (2) they
include prominent notice akin to these three paragraphs for those parts of
this code that are retained.
===============================================================================
*/
static flag float32_is_signaling_nan( float32 a );
static flag float64_is_signaling_nan( float64 a );
/*
-------------------------------------------------------------------------------
Underflow tininess-detection mode. (Statically initialized to default.)
-------------------------------------------------------------------------------
*/
static flag float_detect_tininess = float_tininess_after_rounding;
/*
-------------------------------------------------------------------------------
Raises the exceptions specified by `flags'. Floating-point traps can be
defined here if desired. It is currently not possible for such a trap to
substitute a result value. If traps are not implemented, this routine
should be simply `float_exception_flags |= flags;'.
-------------------------------------------------------------------------------
*/
void float_raise( uint8 flags )
{
float_exception_flags |= flags;
}
/*
-------------------------------------------------------------------------------
The pattern for a default generated single-precision NaN.
-------------------------------------------------------------------------------
*/
enum {
float32_default_nan = 0xFFC00000
};
/*
-------------------------------------------------------------------------------
The pattern for a default generated double-precision NaN. The `high' and
`low' words hold the most- and least-significant bits, respectively.
-------------------------------------------------------------------------------
*/
enum {
float64_default_nan_high = 0xFFF80000,
float64_default_nan_low = 0x00000000
};
/*
-------------------------------------------------------------------------------
Returns true if the single-precision floating-point value `a' is a signaling
NaN; otherwise returns false.
-------------------------------------------------------------------------------
*/
static flag float32_is_signaling_nan( float32 a )
{
return ( ( a & 0x7FC00000 ) == 0x7F800000 ) && ( a & 0x003FFFFF );
}
/*
-------------------------------------------------------------------------------
Returns true if the double-precision floating-point value `a' is a signaling
NaN; otherwise returns false.
-------------------------------------------------------------------------------
*/
static flag float64_is_signaling_nan( float64 a )
{
return
( ( a.high & 0x7FF80000 ) == 0x7FF00000 )
&& ( ( a.high & 0x0007FFFF ) || a.low );
}
/*
-------------------------------------------------------------------------------
Converts a single-precision NaN `a' to a double-precision quiet NaN. If `a'
is a signaling NaN, the invalid exception is raised.
-------------------------------------------------------------------------------
*/
static float64 float32ToFloat64NaN( float32 a )
{
float64 z;
if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
z.low = float64_default_nan_low;
z.high = float64_default_nan_high;
return z;
}
/*
-------------------------------------------------------------------------------
Converts a double-precision NaN `a' to a single-precision quiet NaN. If `a'
is a signaling NaN, the invalid exception is raised.
-------------------------------------------------------------------------------
*/
static float32 float64ToFloat32NaN( float64 a )
{
if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
return float32_default_nan;
}
/*
-------------------------------------------------------------------------------
Takes two single-precision floating-point values `a' and `b', one of which
is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
signaling NaN, the invalid exception is raised.
-------------------------------------------------------------------------------
*/
static float32 propagateFloat32NaN( float32 a, float32 b )
{
if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {
float_raise( float_flag_invalid );
}
return float32_default_nan;
}
/*
-------------------------------------------------------------------------------
Takes two double-precision floating-point values `a' and `b', one of which
is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
signaling NaN, the invalid exception is raised.
-------------------------------------------------------------------------------
*/
static float64 propagateFloat64NaN( float64 a, float64 b )
{
float64 z;
if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {
float_raise( float_flag_invalid );
}
z.low = float64_default_nan_low;
z.high = float64_default_nan_high;
return z;
}

2509
lib/libc/arch/arm26/fplib/softfloat.c
View File

File diff suppressed because it is too large Load Diff

166
lib/libc/arch/arm26/fplib/softfloat.h
View File

@ -1,166 +0,0 @@
/* $NetBSD: softfloat.h,v 1.1 2000/05/09 21:55:46 bjh21 Exp $ */
/*
===============================================================================
This C header file is part of the SoftFloat IEC/IEEE Floating-point
Arithmetic Package, Release 1a.
Written by John R. Hauser. This work was made possible by the International
Computer Science Institute, located at Suite 600, 1947 Center Street,
Berkeley, California 94704. Funding was provided in part by the National
Science Foundation under grant MIP-9311980. The original version of
this code was written as part of a project to build a fixed-point vector
processor in collaboration with the University of California at Berkeley,
overseen by Profs. Nelson Morgan and John Wawrzynek. More information
is available through the web page `http://www.cs.berkeley.edu/~jhauser/
softfloat.html'.
THIS PACKAGE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
been made to avoid it, THIS PACKAGE MAY CONTAIN FAULTS THAT WILL AT TIMES
RESULT IN INCORRECT BEHAVIOR. USE OF THIS PACKAGE IS RESTRICTED TO PERSONS
AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY AND ALL
LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
Derivative works are acceptable, even for commercial purposes, so long as
(1) they include prominent notice that the work is derivative, and (2) they
include prominent notice akin to these three paragraphs for those parts of
this code that are retained.
===============================================================================
*/
#include <machine/ieeefp.h>
/*
-------------------------------------------------------------------------------
Software IEC/IEEE floating-point types.
-------------------------------------------------------------------------------
*/
typedef unsigned int float32;
typedef struct {
unsigned int high;
unsigned int low;
} float64;
/*
-------------------------------------------------------------------------------
Software IEC/IEEE floating-point rounding mode and exception flags.
-------------------------------------------------------------------------------
*/
extern unsigned char float_rounding_mode;
extern unsigned char float_exception_flags;
/*
-------------------------------------------------------------------------------
Floating-point rounding mode codes.
-------------------------------------------------------------------------------
*/
enum {
float_round_nearest_even = FP_RN,
float_round_up = FP_RP,
float_round_down = FP_RM,
float_round_to_zero = FP_RZ
};
/*
-------------------------------------------------------------------------------
Floating-point exception flag masks.
-------------------------------------------------------------------------------
*/
enum {
float_flag_invalid = FP_X_INV,
float_flag_divbyzero = FP_X_DZ,
float_flag_overflow = FP_X_OFL,
float_flag_underflow = FP_X_UFL,
float_flag_inexact = FP_X_IMP
};
/*
-------------------------------------------------------------------------------
Floating-point underflow tininess-detection mode.
-------------------------------------------------------------------------------
*/
extern char float_detect_tininess;
enum {
float_tininess_before_rounding = 0,
float_tininess_after_rounding = 1
};
/*
-------------------------------------------------------------------------------
Routine to raise any or all of the software IEC/IEEE floating-point
exception flags.
-------------------------------------------------------------------------------
*/
void float_raise( unsigned char );
/*
-------------------------------------------------------------------------------
Software IEC/IEEE floating-point conversion routines.
-------------------------------------------------------------------------------
*/
float32 int32_to_float32( int );
float64 int32_to_float64( int );
#if 0 /* unused */
static int float32_to_int32( float32 );
#endif
int float32_to_int32_round_to_zero( float32 );
float64 float32_to_float64( float32 );
#if 0 /* unused */
static int float64_to_int32( float64 );
#endif
int float64_to_int32_round_to_zero( float64 );
float32 float64_to_float32( float64 );
unsigned int float64_to_uint32_round_to_zero( float64 a );
unsigned int float32_to_uint32_round_to_zero( float32 a );
/*
-------------------------------------------------------------------------------
Software IEC/IEEE single-precision operations.
-------------------------------------------------------------------------------
*/
#if 0 /* unused */
static float32 float32_round_to_int( float32 );
#endif
float32 float32_add( float32, float32 );
float32 float32_sub( float32, float32 );
float32 float32_mul( float32, float32 );
float32 float32_div( float32, float32 );
#if 0 /* unused */
static float32 float32_rem( float32, float32 );
static float32 float32_sqrt( float32 );
#endif
char float32_eq( float32, float32 );
char float32_le( float32, float32 );
char float32_lt( float32, float32 );
#if 0 /* unused */
static char float32_eq_signaling( float32, float32 );
static char float32_le_quiet( float32, float32 );
static char float32_lt_quiet( float32, float32 );
#endif
/*
-------------------------------------------------------------------------------
Software IEC/IEEE double-precision operations.
-------------------------------------------------------------------------------
*/
#if 0 /* unused */
static float64 float64_round_to_int( float64 );
#endif
float64 float64_add( float64, float64 );
float64 float64_sub( float64, float64 );
float64 float64_mul( float64, float64 );
float64 float64_div( float64, float64 );
#if 0 /* unused */
static float64 float64_rem( float64, float64 );
static float64 float64_sqrt( float64 );
#endif
char float64_eq( float64, float64 );
char float64_le( float64, float64 );
char float64_lt( float64, float64 );
#if 0 /* unused */
char float64_eq_signaling( float64, float64 );
#endif
char float64_le_quiet( float64, float64 );
char float64_lt_quiet( float64, float64 );

5
lib/libc/arch/arm26/gen/Makefile.inc
View File

@ -1,8 +1,7 @@
# $NetBSD: Makefile.inc,v 1.1 2000/05/09 21:55:47 bjh21 Exp $
# $NetBSD: Makefile.inc,v 1.2 2000/06/06 08:14:54 bjh21 Exp $
SRCS+= alloca.S byte_swap_2.S byte_swap_4.S bswap64.c divsi3.S \
fabs.c flt_rounds.c fpgetround.c fpsetround.c \
fpgetmask.S fpsetmask.S fpgetsticky.S fpsetsticky.S \
fabs.c flt_rounds.c \
infinity.c isinf.c isnan.c frexp.c ldexp.c modf.c nanf.c
SRCS+= setjmp.S __setjmp14.S

6
lib/libc/arch/arm26/gen/fpgetmask.S → lib/libc/arch/arm26/hardfloat/fpgetmask.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: fpgetmask.S,v 1.1 2000/05/09 21:55:48 bjh21 Exp $ */
/* $NetBSD: fpgetmask.S,v 1.1 2000/06/06 08:14:59 bjh21 Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe
@ -40,9 +40,6 @@
*/
ENTRY(fpgetmask)
#ifdef SOFTFLOAT
b _C_FUNC(sfp_getmask)
#else
rfs r0
mov r0, r0, lsr #16
and r0, r0, #0x1f
@ -51,4 +48,3 @@ ENTRY(fpgetmask)
#else
mov r15, r14 /* return */
#endif
#endif /* SOFTFLOAT */

7
lib/libc/arch/arm26/gen/fpgetround.c → lib/libc/arch/arm26/hardfloat/fpgetround.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: fpgetround.c,v 1.1 2000/05/09 21:55:48 bjh21 Exp $ */
/* $NetBSD: fpgetround.c,v 1.1 2000/06/06 08:15:00 bjh21 Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe
@ -56,9 +56,6 @@
fp_rnd
fpgetround()
{
#ifdef SOFT_FLOAT
return(sfp_getround());
#else
return(FP_RN);
#endif
}

6
lib/libc/arch/arm26/gen/fpgetsticky.S → lib/libc/arch/arm26/hardfloat/fpgetsticky.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: fpgetsticky.S,v 1.1 2000/05/09 21:55:48 bjh21 Exp $ */
/* $NetBSD: fpgetsticky.S,v 1.1 2000/06/06 08:15:00 bjh21 Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe
@ -40,9 +40,6 @@
*/
ENTRY(fpgetsticky)
#ifdef SOFTFLOAT
b _C_FUNC(sfp_getsticky)
#else
rfs r0
and r0, r0, #0x1f
#ifdef __APCS_26__
@ -50,4 +47,3 @@ ENTRY(fpgetsticky)
#else
mov r15, r14 /* return */
#endif
#endif /* SOFTFLOAT */

6
lib/libc/arch/arm26/gen/fpsetmask.S → lib/libc/arch/arm26/hardfloat/fpsetmask.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: fpsetmask.S,v 1.1 2000/05/09 21:55:48 bjh21 Exp $ */
/* $NetBSD: fpsetmask.S,v 1.1 2000/06/06 08:15:00 bjh21 Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe
@ -40,9 +40,6 @@
*/
ENTRY(fpsetmask)
#ifdef SOFTFLOAT
b _C_FUNC(sfp_setmask)
#else
rfs r1
bic r1, r1, #0x001f0000
and r0, r0, #0x0000001f
@ -54,4 +51,3 @@ ENTRY(fpsetmask)
#else
mov r15, r14 /* return */
#endif
#endif /* SOFTFLOAT */

8
lib/libc/arch/arm26/gen/fpsetround.c → lib/libc/arch/arm26/hardfloat/fpsetround.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: fpsetround.c,v 1.1 2000/05/09 21:55:48 bjh21 Exp $ */
/* $NetBSD: fpsetround.c,v 1.1 2000/06/06 08:15:00 bjh21 Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe
@ -34,8 +34,6 @@
#include <sys/types.h>
#include <ieeefp.h>
void sfp_setround __P((fp_rnd));
/*
* Return the current FP rounding mode
*
@ -62,10 +60,6 @@ fpsetround(rnd_dir)
old_rnd = fpgetround();
#ifdef SOFTFLOAT
sfp_setround(rnd_dir);
#else
abort();
#endif
return(old_rnd);
}

6
lib/libc/arch/arm26/gen/fpsetsticky.S → lib/libc/arch/arm26/hardfloat/fpsetsticky.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: fpsetsticky.S,v 1.1 2000/05/09 21:55:48 bjh21 Exp $ */
/* $NetBSD: fpsetsticky.S,v 1.1 2000/06/06 08:15:00 bjh21 Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe
@ -40,9 +40,6 @@
*/
ENTRY(fpsetsticky)
#ifdef SOFTFLOAT
b _C_FUNC(sfp_setsticky)
#else
rfs r1
bic r1, r1, #0x1f
and r0, r0, #0x1f
@ -54,4 +51,3 @@ ENTRY(fpsetsticky)
#else
mov r15, r14 /* return */
#endif
#endif /* SOFTFLOAT */

69
lib/libc/arch/arm26/fplib/arm-gcc.h → lib/libc/arch/arm26/softfloat/arm-gcc.h
View File

@ -1,16 +1,16 @@
/* $NetBSD: arm-gcc.h,v 1.1 2000/05/09 21:55:46 bjh21 Exp $ */
/* $NetBSD: arm-gcc.h,v 1.1 2000/06/06 08:15:00 bjh21 Exp $ */
/*
-------------------------------------------------------------------------------
One of either `BIGENDIAN' or `LITTLEENDIAN' must be defined.
One of the macros `BIGENDIAN' or `LITTLEENDIAN' must be defined.
-------------------------------------------------------------------------------
*/
#define LITTLEENDIAN
/*
-------------------------------------------------------------------------------
`BIT64' can be defined to indicate that 64-bit integer types are supported
by the compiler.
The macro `BITS64' can be defined to indicate that 64-bit integer types are
supported by the compiler.
-------------------------------------------------------------------------------
*/
#define BITS64
@ -25,16 +25,16 @@ implementations of C, `flag', `uint8', and `int8' should all be `typedef'ed
to the same as `int'.
-------------------------------------------------------------------------------
*/
typedef char flag;
typedef unsigned char uint8;
typedef signed char int8;
typedef int flag;
typedef int uint8;
typedef int int8;
typedef int uint16;
typedef int int16;
typedef unsigned int uint32;
typedef signed int int32;
#ifdef BITS64
typedef unsigned long long int bits64;
typedef signed long long int sbits64;
typedef unsigned long long int uint64;
typedef signed long long int int64;
#endif
/*
@ -52,28 +52,39 @@ typedef signed short int sbits16;
typedef unsigned int bits32;
typedef signed int sbits32;
#ifdef BITS64
typedef unsigned long long int uint64;
typedef signed long long int int64;
typedef unsigned long long int bits64;
typedef signed long long int sbits64;
#endif
#ifdef BITS64
/*
-------------------------------------------------------------------------------
The `LIT64' macro takes as its argument a textual integer literal and
if necessary ``marks'' the literal as having a 64-bit integer type.
For example, the GNU C Compiler (`gcc') requires that 64-bit literals be
appended with the letters `LL' standing for `long long', which is `gcc's
name for the 64-bit integer type. Some compilers may allow `LIT64' to be
defined as the identity macro: `#define LIT64( a ) a'.
-------------------------------------------------------------------------------
*/
#define LIT64( a ) a##LL
#endif
/*
* Macros to define functions with the GCC expected names
*/
-------------------------------------------------------------------------------
The macro `INLINE' can be used before functions that should be inlined. If
a compiler does not support explicit inlining, this macro should be defined
to be `static'.
-------------------------------------------------------------------------------
*/
#define INLINE static __inline
#define float32_add __addsf3
#define float64_add __adddf3
#define float32_sub __subsf3
#define float64_sub __subdf3
#define float32_mul __mulsf3
#define float64_mul __muldf3
#define float32_div __divsf3
#define float64_div __divdf3
#define int32_to_float32 __floatsisf
#define int32_to_float64 __floatsidf
#define float32_to_int32_round_to_zero __fixsfsi
#define float64_to_int32_round_to_zero __fixdfsi
#define float32_to_uint32_round_to_zero __fixunssfsi
#define float64_to_uint32_round_to_zero __fixunsdfsi
#define float32_to_float64 __extendsfdf2
#define float64_to_float32 __truncdfsf2
/*
-------------------------------------------------------------------------------
The ARM is odd in that it stores doubles high-order word first.
-------------------------------------------------------------------------------
*/
#ifdef SOFTFLOAT_FOR_GCC
#define FLOAT64_DEMANGLE(a) (((a) << 32) | ((a) >> 32))
#define FLOAT64_MANGLE(a) FLOAT64_DEMANGLE(a)
#endif

48
lib/libc/arch/arm26/softfloat/milieu.h Normal file
View File

@ -0,0 +1,48 @@
/* $NetBSD: milieu.h,v 1.1 2000/06/06 08:15:01 bjh21 Exp $ */
/*
===============================================================================
This C header file is part of the SoftFloat IEC/IEEE Floating-point
Arithmetic Package, Release 2a.
Written by John R. Hauser. This work was made possible in part by the
International Computer Science Institute, located at Suite 600, 1947 Center
Street, Berkeley, California 94704. Funding was partially provided by the
National Science Foundation under grant MIP-9311980. The original version
of this code was written as part of a project to build a fixed-point vector
processor in collaboration with the University of California at Berkeley,
overseen by Profs. Nelson Morgan and John Wawrzynek. More information
is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
arithmetic/SoftFloat.html'.
THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
Derivative works are acceptable, even for commercial purposes, so long as
(1) they include prominent notice that the work is derivative, and (2) they
include prominent notice akin to these four paragraphs for those parts of
this code that are retained.
===============================================================================
*/
/*
-------------------------------------------------------------------------------
Include common integer types and flags.
-------------------------------------------------------------------------------
*/
#include "arm-gcc.h"
/*
-------------------------------------------------------------------------------
Symbolic Boolean literals.
-------------------------------------------------------------------------------
*/
enum {
FALSE = 0,
TRUE = 1
};

480
lib/libc/arch/arm26/softfloat/softfloat-specialize Normal file
View File

@ -0,0 +1,480 @@
/*
===============================================================================
This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
Arithmetic Package, Release 2a.
Written by John R. Hauser. This work was made possible in part by the
International Computer Science Institute, located at Suite 600, 1947 Center
Street, Berkeley, California 94704. Funding was partially provided by the
National Science Foundation under grant MIP-9311980. The original version
of this code was written as part of a project to build a fixed-point vector
processor in collaboration with the University of California at Berkeley,
overseen by Profs. Nelson Morgan and John Wawrzynek. More information
is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
arithmetic/SoftFloat.html'.
THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
Derivative works are acceptable, even for commercial purposes, so long as
(1) they include prominent notice that the work is derivative, and (2) they
include prominent notice akin to these four paragraphs for those parts of
this code that are retained.
===============================================================================
*/
/*
-------------------------------------------------------------------------------
Underflow tininess-detection mode, statically initialized to default value.
(The declaration in `softfloat.h' must match the `int8' type here.)
-------------------------------------------------------------------------------
*/
#ifdef SOFTFLOAT_FOR_GCC
static
#endif
int8 float_detect_tininess = float_tininess_after_rounding;
/*
-------------------------------------------------------------------------------
Raises the exceptions specified by `flags'. Floating-point traps can be
defined here if desired. It is currently not possible for such a trap to
substitute a result value. If traps are not implemented, this routine
should be simply `float_exception_flags |= flags;'.
-------------------------------------------------------------------------------
*/
void float_raise( int8 flags )
{
float_exception_flags |= flags;
}
/*
-------------------------------------------------------------------------------
Internal canonical NaN format.
-------------------------------------------------------------------------------
*/
typedef struct {
flag sign;
bits64 high, low;
} commonNaNT;
/*
-------------------------------------------------------------------------------
The pattern for a default generated single-precision NaN.
-------------------------------------------------------------------------------
*/
#define float32_default_nan 0xFFFFFFFF
/*
-------------------------------------------------------------------------------
Returns 1 if the single-precision floating-point value `a' is a NaN;
otherwise returns 0.
-------------------------------------------------------------------------------
*/
#ifdef SOFTFLOAT_FOR_GCC
static
#endif
flag float32_is_nan( float32 a )
{
return ( 0xFF000000 < (bits32) ( a<<1 ) );
}
/*
-------------------------------------------------------------------------------
Returns 1 if the single-precision floating-point value `a' is a signaling
NaN; otherwise returns 0.
-------------------------------------------------------------------------------
*/
#ifdef SOFTFLOAT_FOR_GCC
static
#endif
flag float32_is_signaling_nan( float32 a )
{
return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
}
/*
-------------------------------------------------------------------------------
Returns the result of converting the single-precision floating-point NaN
`a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
exception is raised.
-------------------------------------------------------------------------------
*/
static commonNaNT float32ToCommonNaN( float32 a )
{
commonNaNT z;
if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
z.sign = a>>31;
z.low = 0;
z.high = ( (bits64) a )<<41;
return z;
}
/*
-------------------------------------------------------------------------------
Returns the result of converting the canonical NaN `a' to the single-
precision floating-point format.
-------------------------------------------------------------------------------
*/
static float32 commonNaNToFloat32( commonNaNT a )
{
return ( ( (bits32) a.sign )<<31 ) | 0x7FC00000 | ( a.high>>41 );
}
/*
-------------------------------------------------------------------------------
Takes two single-precision floating-point values `a' and `b', one of which
is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
signaling NaN, the invalid exception is raised.
-------------------------------------------------------------------------------
*/
static float32 propagateFloat32NaN( float32 a, float32 b )
{
flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
aIsNaN = float32_is_nan( a );
aIsSignalingNaN = float32_is_signaling_nan( a );
bIsNaN = float32_is_nan( b );
bIsSignalingNaN = float32_is_signaling_nan( b );
a |= 0x00400000;
b |= 0x00400000;
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
if ( aIsNaN ) {
return ( aIsSignalingNaN & bIsNaN ) ? b : a;
}
else {
return b;
}
}
/*
-------------------------------------------------------------------------------
The pattern for a default generated double-precision NaN.
-------------------------------------------------------------------------------
*/
#define float64_default_nan LIT64( 0xFFFFFFFFFFFFFFFF )
/*
-------------------------------------------------------------------------------
Returns 1 if the double-precision floating-point value `a' is a NaN;
otherwise returns 0.
-------------------------------------------------------------------------------
*/
#ifdef SOFTFLOAT_FOR_GCC
static
#endif
flag float64_is_nan( float64 a )
{
return ( LIT64( 0xFFE0000000000000 ) <
(bits64) ( FLOAT64_DEMANGLE(a)<<1 ) );
}
/*
-------------------------------------------------------------------------------
Returns 1 if the double-precision floating-point value `a' is a signaling
NaN; otherwise returns 0.
-------------------------------------------------------------------------------
*/
#ifdef SOFTFLOAT_FOR_GCC
static
#endif
flag float64_is_signaling_nan( float64 a )
{
return
( ( ( FLOAT64_DEMANGLE(a)>>51 ) & 0xFFF ) == 0xFFE )
&& ( FLOAT64_DEMANGLE(a) & LIT64( 0x0007FFFFFFFFFFFF ) );
}
/*
-------------------------------------------------------------------------------
Returns the result of converting the double-precision floating-point NaN
`a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
exception is raised.
-------------------------------------------------------------------------------
*/
static commonNaNT float64ToCommonNaN( float64 a )
{
commonNaNT z;
if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
z.sign = FLOAT64_DEMANGLE(a)>>63;
z.low = 0;
z.high = FLOAT64_DEMANGLE(a)<<12;
return z;
}
/*
-------------------------------------------------------------------------------
Returns the result of converting the canonical NaN `a' to the double-
precision floating-point format.
-------------------------------------------------------------------------------
*/
static float64 commonNaNToFloat64( commonNaNT a )
{
return FLOAT64_MANGLE(
( ( (bits64) a.sign )<<63 )
| LIT64( 0x7FF8000000000000 )
| ( a.high>>12 ) );
}
/*
-------------------------------------------------------------------------------
Takes two double-precision floating-point values `a' and `b', one of which
is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
signaling NaN, the invalid exception is raised.
-------------------------------------------------------------------------------
*/
static float64 propagateFloat64NaN( float64 a, float64 b )
{
flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
aIsNaN = float64_is_nan( a );
aIsSignalingNaN = float64_is_signaling_nan( a );
bIsNaN = float64_is_nan( b );
bIsSignalingNaN = float64_is_signaling_nan( b );
a |= FLOAT64_MANGLE(LIT64( 0x0008000000000000 ));
b |= FLOAT64_MANGLE(LIT64( 0x0008000000000000 ));
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
if ( aIsNaN ) {
return ( aIsSignalingNaN & bIsNaN ) ? b : a;
}
else {
return b;
}
}
#ifdef FLOATX80
/*
-------------------------------------------------------------------------------
The pattern for a default generated extended double-precision NaN. The
`high' and `low' values hold the most- and least-significant bits,
respectively.
-------------------------------------------------------------------------------
*/
#define floatx80_default_nan_high 0xFFFF
#define floatx80_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF )
/*
-------------------------------------------------------------------------------
Returns 1 if the extended double-precision floating-point value `a' is a
NaN; otherwise returns 0.
-------------------------------------------------------------------------------
*/
flag floatx80_is_nan( floatx80 a )
{
return ( ( a.high & 0x7FFF ) == 0x7FFF ) && (bits64) ( a.low<<1 );
}
/*
-------------------------------------------------------------------------------
Returns 1 if the extended double-precision floating-point value `a' is a
signaling NaN; otherwise returns 0.
-------------------------------------------------------------------------------
*/
flag floatx80_is_signaling_nan( floatx80 a )
{
bits64 aLow;
aLow = a.low & ~ LIT64( 0x4000000000000000 );
return
( ( a.high & 0x7FFF ) == 0x7FFF )
&& (bits64) ( aLow<<1 )
&& ( a.low == aLow );
}
/*
-------------------------------------------------------------------------------
Returns the result of converting the extended double-precision floating-
point NaN `a' to the canonical NaN format. If `a' is a signaling NaN, the
invalid exception is raised.
-------------------------------------------------------------------------------
*/
static commonNaNT floatx80ToCommonNaN( floatx80 a )
{
commonNaNT z;
if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
z.sign = a.high>>15;
z.low = 0;
z.high = a.low<<1;
return z;
}
/*
-------------------------------------------------------------------------------
Returns the result of converting the canonical NaN `a' to the extended
double-precision floating-point format.
-------------------------------------------------------------------------------
*/
static floatx80 commonNaNToFloatx80( commonNaNT a )
{
floatx80 z;
z.low = LIT64( 0xC000000000000000 ) | ( a.high>>1 );
z.high = ( ( (bits16) a.sign )<<15 ) | 0x7FFF;
return z;
}
/*
-------------------------------------------------------------------------------
Takes two extended double-precision floating-point values `a' and `b', one
of which is a NaN, and returns the appropriate NaN result. If either `a' or
`b' is a signaling NaN, the invalid exception is raised.
-------------------------------------------------------------------------------
*/
static floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b )
{
flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
aIsNaN = floatx80_is_nan( a );
aIsSignalingNaN = floatx80_is_signaling_nan( a );
bIsNaN = floatx80_is_nan( b );
bIsSignalingNaN = floatx80_is_signaling_nan( b );
a.low |= LIT64( 0xC000000000000000 );
b.low |= LIT64( 0xC000000000000000 );
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
if ( aIsNaN ) {
return ( aIsSignalingNaN & bIsNaN ) ? b : a;
}
else {
return b;
}
}
#endif
#ifdef FLOAT128
/*
-------------------------------------------------------------------------------
The pattern for a default generated quadruple-precision NaN. The `high' and
`low' values hold the most- and least-significant bits, respectively.
-------------------------------------------------------------------------------
*/
#define float128_default_nan_high LIT64( 0xFFFFFFFFFFFFFFFF )
#define float128_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF )
/*
-------------------------------------------------------------------------------
Returns 1 if the quadruple-precision floating-point value `a' is a NaN;
otherwise returns 0.
-------------------------------------------------------------------------------
*/
flag float128_is_nan( float128 a )
{
return
( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) )
&& ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
}
/*
-------------------------------------------------------------------------------
Returns 1 if the quadruple-precision floating-point value `a' is a
signaling NaN; otherwise returns 0.
-------------------------------------------------------------------------------
*/
flag float128_is_signaling_nan( float128 a )
{
return
( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
&& ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
}
/*
-------------------------------------------------------------------------------
Returns the result of converting the quadruple-precision floating-point NaN
`a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
exception is raised.
-------------------------------------------------------------------------------
*/
static commonNaNT float128ToCommonNaN( float128 a )
{
commonNaNT z;
if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
z.sign = a.high>>63;
shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
return z;
}
/*
-------------------------------------------------------------------------------
Returns the result of converting the canonical NaN `a' to the quadruple-
precision floating-point format.
-------------------------------------------------------------------------------
*/
static float128 commonNaNToFloat128( commonNaNT a )
{
float128 z;
shift128Right( a.high, a.low, 16, &z.high, &z.low );
z.high |= ( ( (bits64) a.sign )<<63 ) | LIT64( 0x7FFF800000000000 );
return z;
}
/*
-------------------------------------------------------------------------------
Takes two quadruple-precision floating-point values `a' and `b', one of
which is a NaN, and returns the appropriate NaN result. If either `a' or
`b' is a signaling NaN, the invalid exception is raised.
-------------------------------------------------------------------------------
*/
static float128 propagateFloat128NaN( float128 a, float128 b )
{
flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
aIsNaN = float128_is_nan( a );
aIsSignalingNaN = float128_is_signaling_nan( a );
bIsNaN = float128_is_nan( b );
bIsSignalingNaN = float128_is_signaling_nan( b );
a.high |= LIT64( 0x0000800000000000 );
b.high |= LIT64( 0x0000800000000000 );
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
if ( aIsNaN ) {
return ( aIsSignalingNaN & bIsNaN ) ? b : a;
}
else {
return b;
}
}
#endif

294
lib/libc/arch/arm26/softfloat/softfloat.h Normal file
View File

@ -0,0 +1,294 @@
/*
===============================================================================
This C header file is part of the SoftFloat IEC/IEEE Floating-point
Arithmetic Package, Release 2a.
Written by John R. Hauser. This work was made possible in part by the
International Computer Science Institute, located at Suite 600, 1947 Center
Street, Berkeley, California 94704. Funding was partially provided by the
National Science Foundation under grant MIP-9311980. The original version
of this code was written as part of a project to build a fixed-point vector
processor in collaboration with the University of California at Berkeley,
overseen by Profs. Nelson Morgan and John Wawrzynek. More information
is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
arithmetic/SoftFloat.html'.
THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
Derivative works are acceptable, even for commercial purposes, so long as
(1) they include prominent notice that the work is derivative, and (2) they
include prominent notice akin to these four paragraphs for those parts of
this code that are retained.
===============================================================================
*/
/*
-------------------------------------------------------------------------------
The macro `FLOATX80' must be defined to enable the extended double-precision
floating-point format `floatx80'. If this macro is not defined, the
`floatx80' type will not be defined, and none of the functions that either
input or output the `floatx80' type will be defined. The same applies to
the `FLOAT128' macro and the quadruple-precision format `float128'.
-------------------------------------------------------------------------------
*/
/* #define FLOATX80 */
/* #define FLOAT128 */
/*
-------------------------------------------------------------------------------
Software IEC/IEEE floating-point types.
-------------------------------------------------------------------------------
*/
typedef unsigned int float32;
typedef unsigned long long float64;
#ifdef FLOATX80
typedef struct {
unsigned short high;
unsigned long long low;
} floatx80;
#endif
#ifdef FLOAT128
typedef struct {
unsigned long long high, low;
} float128;
#endif
/*
-------------------------------------------------------------------------------
Software IEC/IEEE floating-point underflow tininess-detection mode.
-------------------------------------------------------------------------------
*/
extern int float_detect_tininess;
enum {
float_tininess_after_rounding = 0,
float_tininess_before_rounding = 1
};
/*
-------------------------------------------------------------------------------
Software IEC/IEEE floating-point rounding mode.
-------------------------------------------------------------------------------
*/
extern int float_rounding_mode;
enum {
float_round_nearest_even = 0,
float_round_to_zero = 1,
float_round_down = 2,
float_round_up = 3
};
/*
-------------------------------------------------------------------------------
Software IEC/IEEE floating-point exception flags.
-------------------------------------------------------------------------------
*/
extern int float_exception_flags;
enum {
float_flag_inexact = 1,
float_flag_underflow = 2,
float_flag_overflow = 4,
float_flag_divbyzero = 8,
float_flag_invalid = 16
};
/*
-------------------------------------------------------------------------------
Routine to raise any or all of the software IEC/IEEE floating-point
exception flags.
-------------------------------------------------------------------------------
*/
void float_raise( int );
/*
-------------------------------------------------------------------------------
Software IEC/IEEE integer-to-floating-point conversion routines.
-------------------------------------------------------------------------------
*/
float32 int32_to_float32( int );
float64 int32_to_float64( int );
#ifdef FLOATX80
floatx80 int32_to_floatx80( int );
#endif
#ifdef FLOAT128
float128 int32_to_float128( int );
#endif
float32 int64_to_float32( long long );
float64 int64_to_float64( long long );
#ifdef FLOATX80
floatx80 int64_to_floatx80( long long );
#endif
#ifdef FLOAT128
float128 int64_to_float128( long long );
#endif
/*
-------------------------------------------------------------------------------
Software IEC/IEEE single-precision conversion routines.
-------------------------------------------------------------------------------
*/
int float32_to_int32( float32 );
int float32_to_int32_round_to_zero( float32 );
long long float32_to_int64( float32 );
long long float32_to_int64_round_to_zero( float32 );
float64 float32_to_float64( float32 );
#ifdef FLOATX80
floatx80 float32_to_floatx80( float32 );
#endif
#ifdef FLOAT128
float128 float32_to_float128( float32 );
#endif
/*
-------------------------------------------------------------------------------
Software IEC/IEEE single-precision operations.
-------------------------------------------------------------------------------
*/
float32 float32_round_to_int( float32 );
float32 float32_add( float32, float32 );
float32 float32_sub( float32, float32 );
float32 float32_mul( float32, float32 );
float32 float32_div( float32, float32 );
float32 float32_rem( float32, float32 );
float32 float32_sqrt( float32 );
int float32_eq( float32, float32 );
int float32_le( float32, float32 );
int float32_lt( float32, float32 );
int float32_eq_signaling( float32, float32 );
int float32_le_quiet( float32, float32 );
int float32_lt_quiet( float32, float32 );
#ifndef SOFTFLOAT_FOR_GCC
int float32_is_signaling_nan( float32 );
#endif
/*
-------------------------------------------------------------------------------
Software IEC/IEEE double-precision conversion routines.
-------------------------------------------------------------------------------
*/
int float64_to_int32( float64 );
int float64_to_int32_round_to_zero( float64 );
long long float64_to_int64( float64 );
long long float64_to_int64_round_to_zero( float64 );
float32 float64_to_float32( float64 );
#ifdef FLOATX80
floatx80 float64_to_floatx80( float64 );
#endif
#ifdef FLOAT128
float128 float64_to_float128( float64 );
#endif
/*
-------------------------------------------------------------------------------
Software IEC/IEEE double-precision operations.
-------------------------------------------------------------------------------
*/
float64 float64_round_to_int( float64 );
float64 float64_add( float64, float64 );
float64 float64_sub( float64, float64 );
float64 float64_mul( float64, float64 );
float64 float64_div( float64, float64 );
float64 float64_rem( float64, float64 );
float64 float64_sqrt( float64 );
int float64_eq( float64, float64 );
int float64_le( float64, float64 );
int float64_lt( float64, float64 );
int float64_eq_signaling( float64, float64 );
int float64_le_quiet( float64, float64 );
int float64_lt_quiet( float64, float64 );
#ifndef SOFTFLOAT_FOR_GCC
int float64_is_signaling_nan( float64 );
#endif
#ifdef FLOATX80
/*
-------------------------------------------------------------------------------
Software IEC/IEEE extended double-precision conversion routines.
-------------------------------------------------------------------------------
*/
int floatx80_to_int32( floatx80 );
int floatx80_to_int32_round_to_zero( floatx80 );
long long floatx80_to_int64( floatx80 );
long long floatx80_to_int64_round_to_zero( floatx80 );
float32 floatx80_to_float32( floatx80 );
float64 floatx80_to_float64( floatx80 );
#ifdef FLOAT128
float128 floatx80_to_float128( floatx80 );
#endif
/*
-------------------------------------------------------------------------------
Software IEC/IEEE extended double-precision rounding precision. Valid
values are 32, 64, and 80.
-------------------------------------------------------------------------------
*/
extern int floatx80_rounding_precision;
/*
-------------------------------------------------------------------------------
Software IEC/IEEE extended double-precision operations.
-------------------------------------------------------------------------------
*/
floatx80 floatx80_round_to_int( floatx80 );
floatx80 floatx80_add( floatx80, floatx80 );
floatx80 floatx80_sub( floatx80, floatx80 );
floatx80 floatx80_mul( floatx80, floatx80 );
floatx80 floatx80_div( floatx80, floatx80 );
floatx80 floatx80_rem( floatx80, floatx80 );
floatx80 floatx80_sqrt( floatx80 );
int floatx80_eq( floatx80, floatx80 );
int floatx80_le( floatx80, floatx80 );
int floatx80_lt( floatx80, floatx80 );
int floatx80_eq_signaling( floatx80, floatx80 );
int floatx80_le_quiet( floatx80, floatx80 );
int floatx80_lt_quiet( floatx80, floatx80 );
int floatx80_is_signaling_nan( floatx80 );
#endif
#ifdef FLOAT128
/*
-------------------------------------------------------------------------------
Software IEC/IEEE quadruple-precision conversion routines.
-------------------------------------------------------------------------------
*/
int float128_to_int32( float128 );
int float128_to_int32_round_to_zero( float128 );
long long float128_to_int64( float128 );
long long float128_to_int64_round_to_zero( float128 );
float32 float128_to_float32( float128 );
float64 float128_to_float64( float128 );
#ifdef FLOATX80
floatx80 float128_to_floatx80( float128 );
#endif
/*
-------------------------------------------------------------------------------
Software IEC/IEEE quadruple-precision operations.
-------------------------------------------------------------------------------
*/
float128 float128_round_to_int( float128 );
float128 float128_add( float128, float128 );
float128 float128_sub( float128, float128 );
float128 float128_mul( float128, float128 );
float128 float128_div( float128, float128 );
float128 float128_rem( float128, float128 );
float128 float128_sqrt( float128 );
int float128_eq( float128, float128 );
int float128_le( float128, float128 );
int float128_lt( float128, float128 );
int float128_eq_signaling( float128, float128 );
int float128_le_quiet( float128, float128 );
int float128_lt_quiet( float128, float128 );
int float128_is_signaling_nan( float128 );
#endif

14
lib/libc/softfloat/Makefile.inc Normal file
View File

@ -0,0 +1,14 @@
# $NetBSD: Makefile.inc,v 1.1 2000/06/06 08:15:02 bjh21 Exp $
.PATH: ${ARCHDIR}/softfloat ${.CURDIR}/softfloat
CPPFLAGS+= -I${ARCHDIR}/softfloat -I${.CURDIR}/softfloat
CPPFLAGS+= -DSOFTFLOAT_FOR_GCC
SRCS+= softfloat.c
SRCS+= fpgetround.c fpsetround.c fpgetmask.c fpsetmask.c \
fpgetsticky.c fpsetsticky.c
SRCS+= eqsf2.c nesf2.c gtsf2.c gesf2.c ltsf2.c lesf2.c negsf2.c \
eqdf2.c nedf2.c gtdf2.c gedf2.c ltdf2.c ledf2.c negdf2.c

10
lib/libc/softfloat/README.NetBSD Normal file
View File

@ -0,0 +1,10 @@
$NetBSD: README.NetBSD,v 1.1 2000/06/06 08:15:02 bjh21 Exp $
This is a modified version of part of John Hauser's SoftFloat package.
This version only contains the contents of the "softfloat/bits64"
directory of the original release, plus some documentation. This
version has been heavily modified to support its use with GCC to
implement built-in floating-point operations, but compiling
softfloat.c without SOFTFLOAT_FOR_GCC defined should get you the same
results as from the original.

39
lib/libc/softfloat/README.txt Normal file
View File

@ -0,0 +1,39 @@
$NetBSD: README.txt,v 1.1 2000/06/06 08:15:02 bjh21 Exp $
Package Overview for SoftFloat Release 2a
John R. Hauser
1998 December 13
SoftFloat is a software implementation of floating-point that conforms to
the IEC/IEEE Standard for Binary Floating-Point Arithmetic. SoftFloat is
distributed in the form of C source code. Compiling the SoftFloat sources
generates two things:
-- A SoftFloat object file (typically `softfloat.o') containing the complete
set of IEC/IEEE floating-point routines.
-- A `timesoftfloat' program for evaluating the speed of the SoftFloat
routines. (The SoftFloat module is linked into this program.)
The SoftFloat package is documented in four text files:
softfloat.txt Documentation for using the SoftFloat functions.
softfloat-source.txt Documentation for compiling SoftFloat.
softfloat-history.txt History of major changes to SoftFloat.
timesoftfloat.txt Documentation for using `timesoftfloat'.
Other files in the package comprise the source code for SoftFloat.
Please be aware that some work is involved in porting this software to other
targets. It is not just a matter of getting `make' to complete without
error messages. I would have written the code that way if I could, but
there are fundamental differences between systems that I can't make go away.
You should not attempt to compile SoftFloat without first reading both
`softfloat.txt' and `softfloat-source.txt'.
At the time of this writing, the most up-to-date information about
SoftFloat and the latest release can be found at the Web page `http://
HTTP.CS.Berkeley.EDU/~jhauser/arithmetic/SoftFloat.html'.

24
lib/libc/softfloat/eqdf2.c Normal file
View File

@ -0,0 +1,24 @@
/* $NetBSD: eqdf2.c,v 1.1 2000/06/06 08:15:02 bjh21 Exp $ */
/*
* Written by Ben Harris, 2000. This file is in the Public Domain.
*/
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: eqdf2.c,v 1.1 2000/06/06 08:15:02 bjh21 Exp $");
#endif /* LIBC_SCCS and not lint */
#include "softfloat-for-gcc.h"
#include "milieu.h"
#include "softfloat.h"
flag __eqdf2(float64, float64);
flag
__eqdf2(float64 a, float64 b)
{
/* libgcc1.c says !(a == b) */
return !float64_eq(a, b);
}

24
lib/libc/softfloat/eqsf2.c Normal file
View File

@ -0,0 +1,24 @@
/* $NetBSD: eqsf2.c,v 1.1 2000/06/06 08:15:03 bjh21 Exp $ */
/*
* Written by Ben Harris, 2000. This file is in the Public Domain.
*/
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: eqsf2.c,v 1.1 2000/06/06 08:15:03 bjh21 Exp $");
#endif /* LIBC_SCCS and not lint */
#include "softfloat-for-gcc.h"
#include "milieu.h"
#include "softfloat.h"
flag __eqsf2(float32, float32);
flag
__eqsf2(float32 a, float32 b)
{
/* libgcc1.c says !(a == b) */
return !float32_eq(a, b);
}

56
lib/libc/softfloat/fpgetmask.c Normal file
View File

@ -0,0 +1,56 @@
/* $NetBSD: fpgetmask.c,v 1.1 2000/06/06 08:15:03 bjh21 Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Neil A. Carson and Mark Brinicombe
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: fpgetmask.c,v 1.1 2000/06/06 08:15:03 bjh21 Exp $");
#endif /* LIBC_SCCS and not lint */
#include <ieeefp.h>
#ifdef SOFTFLOAT_FOR_GCC
#include "softfloat-for-gcc.h"
#endif
#include "milieu.h"
#include "softfloat.h"
fp_except
fpgetmask(void)
{
return 0;
}

56
lib/libc/softfloat/fpgetround.c Normal file
View File

@ -0,0 +1,56 @@
/* $NetBSD: fpgetround.c,v 1.1 2000/06/06 08:15:03 bjh21 Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Neil A. Carson and Mark Brinicombe
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: fpgetround.c,v 1.1 2000/06/06 08:15:03 bjh21 Exp $");
#endif /* LIBC_SCCS and not lint */
#include <ieeefp.h>
#ifdef SOFTFLOAT_FOR_GCC
#include "softfloat-for-gcc.h"
#endif
#include "milieu.h"
#include "softfloat.h"
fp_rnd
fpgetround(void)
{
return float_rounding_mode;
}

56
lib/libc/softfloat/fpgetsticky.c Normal file
View File

@ -0,0 +1,56 @@
/* $NetBSD: fpgetsticky.c,v 1.1 2000/06/06 08:15:04 bjh21 Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Neil A. Carson and Mark Brinicombe
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: fpgetsticky.c,v 1.1 2000/06/06 08:15:04 bjh21 Exp $");
#endif /* LIBC_SCCS and not lint */
#include <ieeefp.h>
#ifdef SOFTFLOAT_FOR_GCC
#include "softfloat-for-gcc.h"
#endif
#include "milieu.h"
#include "softfloat.h"
fp_except
fpgetsticky(void)
{
return float_exception_flags;
}

56
lib/libc/softfloat/fpsetmask.c Normal file
View File

@ -0,0 +1,56 @@
/* $NetBSD: fpsetmask.c,v 1.1 2000/06/06 08:15:04 bjh21 Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Neil A. Carson and Mark Brinicombe
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: fpsetmask.c,v 1.1 2000/06/06 08:15:04 bjh21 Exp $");
#endif /* LIBC_SCCS and not lint */
#include <ieeefp.h>
#ifdef SOFTFLOAT_FOR_GCC
#include "softfloat-for-gcc.h"
#endif
#include "milieu.h"
#include "softfloat.h"
fp_except
fpsetmask(fp_except mask)
{
return 0;
}

61
lib/libc/arch/arm26/fplib/fplib_libc.c → lib/libc/softfloat/fpsetround.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: fplib_libc.c,v 1.1 2000/05/09 21:55:46 bjh21 Exp $ */
/* $NetBSD: fpsetround.c,v 1.1 2000/06/06 08:15:04 bjh21 Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
@ -36,51 +36,24 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/types.h>
#include "environment.h"
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: fpsetround.c,v 1.1 2000/06/06 08:15:04 bjh21 Exp $");
#endif /* LIBC_SCCS and not lint */
#include <ieeefp.h>
#ifdef SOFTFLOAT_FOR_GCC
#include "softfloat-for-gcc.h"
#endif
#include "milieu.h"
#include "softfloat.h"
void sfp_setround __P((int rnd_dir));
int sfp_getround __P((void));
void sfp_setmask __P((int mask));
int sfp_getmask __P((void));
void sfp_setsticky __P((int except));
int sfp_getsticky __P((void));
void
sfp_setround(rnd_dir)
int rnd_dir;
fp_rnd
fpsetround(fp_rnd rnd_dir)
{
fp_rnd old;
old = float_rounding_mode;
float_rounding_mode = rnd_dir;
}
int
sfp_getround(void)
{
return(float_rounding_mode);
}
void
sfp_setmask(mask)
int mask;
{
}
int
sfp_getmask(void)
{
return(0);
}
void
sfp_setsticky(except)
int except;
{
float_exception_flags = except;
}
int
sfp_getsticky(void)
{
return(float_exception_flags);
return old;
}

59
lib/libc/softfloat/fpsetsticky.c Normal file
View File

@ -0,0 +1,59 @@
/* $NetBSD: fpsetsticky.c,v 1.1 2000/06/06 08:15:04 bjh21 Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Neil A. Carson and Mark Brinicombe
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: fpsetsticky.c,v 1.1 2000/06/06 08:15:04 bjh21 Exp $");
#endif /* LIBC_SCCS and not lint */
#include <ieeefp.h>
#ifdef SOFTFLOAT_FOR_GCC
#include "softfloat-for-gcc.h"
#endif
#include "milieu.h"
#include "softfloat.h"
fp_except
fpsetsticky(fp_except except)
{
fp_except old;
old = float_exception_flags;
float_exception_flags = except;
return old;
}

24
lib/libc/softfloat/gedf2.c Normal file
View File

@ -0,0 +1,24 @@
/* $NetBSD: gedf2.c,v 1.1 2000/06/06 08:15:05 bjh21 Exp $ */
/*
* Written by Ben Harris, 2000. This file is in the Public Domain.
*/
#include "softfloat-for-gcc.h"
#include "milieu.h"
#include "softfloat.h"
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: gedf2.c,v 1.1 2000/06/06 08:15:05 bjh21 Exp $");
#endif /* LIBC_SCCS and not lint */
flag __gedf2(float64, float64);
flag
__gedf2(float64 a, float64 b)
{
/* libgcc1.c says (a >= b) - 1 */
return float64_le(b, a) - 1;
}

24
lib/libc/softfloat/gesf2.c Normal file
View File

@ -0,0 +1,24 @@
/* $NetBSD: gesf2.c,v 1.1 2000/06/06 08:15:05 bjh21 Exp $ */
/*
* Written by Ben Harris, 2000. This file is in the Public Domain.
*/
#include "softfloat-for-gcc.h"
#include "milieu.h"
#include "softfloat.h"
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: gesf2.c,v 1.1 2000/06/06 08:15:05 bjh21 Exp $");
#endif /* LIBC_SCCS and not lint */
flag __gesf2(float32, float32);
flag
__gesf2(float32 a, float32 b)
{
/* libgcc1.c says (a >= b) - 1 */
return float32_le(b, a) - 1;
}

24
lib/libc/softfloat/gtdf2.c Normal file
View File

@ -0,0 +1,24 @@
/* $NetBSD: gtdf2.c,v 1.1 2000/06/06 08:15:05 bjh21 Exp $ */
/*
* Written by Ben Harris, 2000. This file is in the Public Domain.
*/
#include "softfloat-for-gcc.h"
#include "milieu.h"
#include "softfloat.h"
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: gtdf2.c,v 1.1 2000/06/06 08:15:05 bjh21 Exp $");
#endif /* LIBC_SCCS and not lint */
flag __gtdf2(float64, float64);
flag
__gtdf2(float64 a, float64 b)
{
/* libgcc1.c says a > b */
return float64_lt(b, a);
}

24
lib/libc/softfloat/gtsf2.c Normal file
View File

@ -0,0 +1,24 @@
/* $NetBSD: gtsf2.c,v 1.1 2000/06/06 08:15:06 bjh21 Exp $ */
/*
* Written by Ben Harris, 2000. This file is in the Public Domain.
*/
#include "softfloat-for-gcc.h"
#include "milieu.h"
#include "softfloat.h"
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: gtsf2.c,v 1.1 2000/06/06 08:15:06 bjh21 Exp $");
#endif /* LIBC_SCCS and not lint */
flag __gtsf2(float32, float32);
flag
__gtsf2(float32 a, float32 b)
{
/* libgcc1.c says a > b */
return float32_lt(b, a);
}

24
lib/libc/softfloat/ledf2.c Normal file
View File

@ -0,0 +1,24 @@
/* $NetBSD: ledf2.c,v 1.1 2000/06/06 08:15:06 bjh21 Exp $ */
/*
* Written by Ben Harris, 2000. This file is in the Public Domain.
*/
#include "softfloat-for-gcc.h"
#include "milieu.h"
#include "softfloat.h"
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: ledf2.c,v 1.1 2000/06/06 08:15:06 bjh21 Exp $");
#endif /* LIBC_SCCS and not lint */
flag __ledf2(float64, float64);
flag
__ledf2(float64 a, float64 b)
{
/* libgcc1.c says 1 - (a <= b) */
return 1 - float64_le(a, b);
}

24
lib/libc/softfloat/lesf2.c Normal file
View File

@ -0,0 +1,24 @@
/* $NetBSD: lesf2.c,v 1.1 2000/06/06 08:15:06 bjh21 Exp $ */
/*
* Written by Ben Harris, 2000. This file is in the Public Domain.
*/
#include "softfloat-for-gcc.h"
#include "milieu.h"
#include "softfloat.h"
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: lesf2.c,v 1.1 2000/06/06 08:15:06 bjh21 Exp $");
#endif /* LIBC_SCCS and not lint */
flag __lesf2(float32, float32);
flag
__lesf2(float32 a, float32 b)
{
/* libgcc1.c says 1 - (a <= b) */
return 1 - float32_le(a, b);
}

24
lib/libc/softfloat/ltdf2.c Normal file
View File

@ -0,0 +1,24 @@
/* $NetBSD: ltdf2.c,v 1.1 2000/06/06 08:15:06 bjh21 Exp $ */
/*
* Written by Ben Harris, 2000. This file is in the Public Domain.
*/
#include "softfloat-for-gcc.h"
#include "milieu.h"
#include "softfloat.h"
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: ltdf2.c,v 1.1 2000/06/06 08:15:06 bjh21 Exp $");
#endif /* LIBC_SCCS and not lint */
flag __ltdf2(float64, float64);
flag
__ltdf2(float64 a, float64 b)
{
/* libgcc1.c says -(a < b) */
return -float64_lt(a, b);
}

24
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/* $NetBSD: ltsf2.c,v 1.1 2000/06/06 08:15:06 bjh21 Exp $ */
/*
* Written by Ben Harris, 2000. This file is in the Public Domain.
*/
#include "softfloat-for-gcc.h"
#include "milieu.h"
#include "softfloat.h"
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: ltsf2.c,v 1.1 2000/06/06 08:15:06 bjh21 Exp $");
#endif /* LIBC_SCCS and not lint */
flag __ltsf2(float32, float32);
flag
__ltsf2(float32 a, float32 b)
{
/* libgcc1.c says -(a < b) */
return -float32_lt(a, b);
}

24
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/* $NetBSD: nedf2.c,v 1.1 2000/06/06 08:15:07 bjh21 Exp $ */
/*
* Written by Ben Harris, 2000. This file is in the Public Domain.
*/
#include "softfloat-for-gcc.h"
#include "milieu.h"
#include "softfloat.h"
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: nedf2.c,v 1.1 2000/06/06 08:15:07 bjh21 Exp $");
#endif /* LIBC_SCCS and not lint */
flag __nedf2(float64, float64);
flag
__nedf2(float64 a, float64 b)
{
/* libgcc1.c says a != b */
return !float64_eq(a, b);
}

24
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/* $NetBSD: negdf2.c,v 1.1 2000/06/06 08:15:07 bjh21 Exp $ */
/*
* Written by Ben Harris, 2000. This file is in the Public Domain.
*/
#include "softfloat-for-gcc.h"
#include "milieu.h"
#include "softfloat.h"
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: negdf2.c,v 1.1 2000/06/06 08:15:07 bjh21 Exp $");
#endif /* LIBC_SCCS and not lint */
float64 __negdf2(float64);
float64
__negdf2(float64 a)
{
/* libgcc1.c says -a */
return a ^ FLOAT64_MANGLE(0x8000000000000000ULL);
}

24
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/* $NetBSD: negsf2.c,v 1.1 2000/06/06 08:15:07 bjh21 Exp $ */
/*
* Written by Ben Harris, 2000. This file is in the Public Domain.
*/
#include "softfloat-for-gcc.h"
#include "milieu.h"
#include "softfloat.h"
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: negsf2.c,v 1.1 2000/06/06 08:15:07 bjh21 Exp $");
#endif /* LIBC_SCCS and not lint */
float32 __negsf2(float32);
float32
__negsf2(float32 a)
{
/* libgcc1.c says INTIFY(-a) */
return a ^ 0x80000000;
}

24
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/* $NetBSD: nesf2.c,v 1.1 2000/06/06 08:15:07 bjh21 Exp $ */
/*
* Written by Ben Harris, 2000. This file is in the Public Domain.
*/
#include "softfloat-for-gcc.h"
#include "milieu.h"
#include "softfloat.h"
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: nesf2.c,v 1.1 2000/06/06 08:15:07 bjh21 Exp $");
#endif /* LIBC_SCCS and not lint */
flag __nesf2(float32, float32);
flag
__nesf2(float32 a, float32 b)
{
/* libgcc1.c says a != b */
return !float32_eq(a, b);
}

41
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/* $NetBSD: softfloat-for-gcc.h,v 1.1 2000/06/06 08:15:07 bjh21 Exp $ */
/*
* Move private identifiers with external linkage into implementation
* namespace. -- Klaus Klein <kleink@netbsd.org>, May 5, 1999
*/
#define float_exception_flags _softfloat_float_exception_flags
#define float_rounding_mode _softfloat_float_rounding_mode
#define float_raise _softfloat_float_raise
/* The following batch are called by GCC through wrappers */
#define float32_eq _softfloat_float32_eq
#define float32_le _softfloat_float32_le
#define float32_lt _softfloat_float32_lt
#define float64_eq _softfloat_float64_eq
#define float64_le _softfloat_float64_le
#define float64_lt _softfloat_float64_lt
/*
* Macros to define functions with the GCC expected names
*/
#define float32_add __addsf3
#define float64_add __adddf3
#define float32_sub __subsf3
#define float64_sub __subdf3
#define float32_mul __mulsf3
#define float64_mul __muldf3
#define float32_div __divsf3
#define float64_div __divdf3
#define int32_to_float32 __floatsisf
#define int32_to_float64 __floatsidf
#define int64_to_float32 __floatdisf
#define int64_to_float64 __floatdidf
#define float32_to_int32_round_to_zero __fixsfsi
#define float64_to_int32_round_to_zero __fixdfsi
#define float32_to_int64_round_to_zero __fixsfdi
#define float64_to_int64_round_to_zero __fixdfdi
/* #define float32_to_uint32_round_to_zero __fixunssfsi */
/* #define float64_to_uint32_round_to_zero __fixunsdfsi */
#define float32_to_float64 __extendsfdf2
#define float64_to_float32 __truncdfsf2

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$NetBSD: softfloat-history.txt,v 1.1 2000/06/06 08:15:08 bjh21 Exp $
History of Major Changes to SoftFloat, up to Release 2a
John R. Hauser
1998 December 16
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Release 2a (1998 December)
-- Added functions to convert between 64-bit integers (int64) and all
supported floating-point formats.
-- Fixed a bug in all 64-bit-version square root functions except
`float32_sqrt' that caused the result sometimes to be off by 1 unit in
the last place (1 ulp) from what it should be. (Bug discovered by Paul
Donahue.)
-- Improved the makefiles.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Release 2 (1997 June)
-- Created the 64-bit (bits64) version, adding the floatx80 and float128
formats.
-- Changed the source directory structure, splitting the sources into a
`bits32' and a `bits64' version. Renamed `environment.h' to `milieu.h'
(to avoid confusion with environment variables).
-- Fixed a small error that caused `float64_round_to_int' often to round the
wrong way in nearest/even mode when the operand was between 2^20 and 2^21
and halfway between two integers.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Release 1a (1996 July)
-- Corrected a mistake that caused borderline underflow cases not to raise
the underflow flag when they should have. (Problem reported by Doug
Priest.)
-- Added the `float_detect_tininess' variable to control whether tininess is
detected before or after rounding.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Release 1 (1996 July)
-- Original release.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -

745
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/* $NetBSD: softfloat-macros,v 1.1 2000/06/06 08:15:09 bjh21 Exp $ */
/*
===============================================================================
This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
Arithmetic Package, Release 2a.
Written by John R. Hauser. This work was made possible in part by the
International Computer Science Institute, located at Suite 600, 1947 Center
Street, Berkeley, California 94704. Funding was partially provided by the
National Science Foundation under grant MIP-9311980. The original version
of this code was written as part of a project to build a fixed-point vector
processor in collaboration with the University of California at Berkeley,
overseen by Profs. Nelson Morgan and John Wawrzynek. More information
is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
arithmetic/SoftFloat.html'.
THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
Derivative works are acceptable, even for commercial purposes, so long as
(1) they include prominent notice that the work is derivative, and (2) they
include prominent notice akin to these four paragraphs for those parts of
this code that are retained.
===============================================================================
*/
/*
-------------------------------------------------------------------------------
Shifts `a' right by the number of bits given in `count'. If any nonzero
bits are shifted off, they are ``jammed'' into the least significant bit of
the result by setting the least significant bit to 1. The value of `count'
can be arbitrarily large; in particular, if `count' is greater than 32, the
result will be either 0 or 1, depending on whether `a' is zero or nonzero.
The result is stored in the location pointed to by `zPtr'.
-------------------------------------------------------------------------------
*/
INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr )
{
bits32 z;
if ( count == 0 ) {
z = a;
}
else if ( count < 32 ) {
z = ( a>>count ) | ( ( a<<( ( - count ) & 31 ) ) != 0 );
}
else {
z = ( a != 0 );
}
*zPtr = z;
}
/*
-------------------------------------------------------------------------------
Shifts `a' right by the number of bits given in `count'. If any nonzero
bits are shifted off, they are ``jammed'' into the least significant bit of
the result by setting the least significant bit to 1. The value of `count'
can be arbitrarily large; in particular, if `count' is greater than 64, the
result will be either 0 or 1, depending on whether `a' is zero or nonzero.
The result is stored in the location pointed to by `zPtr'.
-------------------------------------------------------------------------------
*/
INLINE void shift64RightJamming( bits64 a, int16 count, bits64 *zPtr )
{
bits64 z;
if ( count == 0 ) {
z = a;
}
else if ( count < 64 ) {
z = ( a>>count ) | ( ( a<<( ( - count ) & 63 ) ) != 0 );
}
else {
z = ( a != 0 );
}
*zPtr = z;
}
/*
-------------------------------------------------------------------------------
Shifts the 128-bit value formed by concatenating `a0' and `a1' right by 64
_plus_ the number of bits given in `count'. The shifted result is at most
64 nonzero bits; this is stored at the location pointed to by `z0Ptr'. The
bits shifted off form a second 64-bit result as follows: The _last_ bit
shifted off is the most-significant bit of the extra result, and the other
63 bits of the extra result are all zero if and only if _all_but_the_last_
bits shifted off were all zero. This extra result is stored in the location
pointed to by `z1Ptr'. The value of `count' can be arbitrarily large.
(This routine makes more sense if `a0' and `a1' are considered to form a
fixed-point value with binary point between `a0' and `a1'. This fixed-point
value is shifted right by the number of bits given in `count', and the
integer part of the result is returned at the location pointed to by
`z0Ptr'. The fractional part of the result may be slightly corrupted as
described above, and is returned at the location pointed to by `z1Ptr'.)
-------------------------------------------------------------------------------
*/
INLINE void
shift64ExtraRightJamming(
bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr )
{
bits64 z0, z1;
int8 negCount = ( - count ) & 63;
if ( count == 0 ) {
z1 = a1;
z0 = a0;
}
else if ( count < 64 ) {
z1 = ( a0<<negCount ) | ( a1 != 0 );
z0 = a0>>count;
}
else {
if ( count == 64 ) {
z1 = a0 | ( a1 != 0 );
}
else {
z1 = ( ( a0 | a1 ) != 0 );
}
z0 = 0;
}
*z1Ptr = z1;
*z0Ptr = z0;
}
/*
-------------------------------------------------------------------------------
Shifts the 128-bit value formed by concatenating `a0' and `a1' right by the
number of bits given in `count'. Any bits shifted off are lost. The value
of `count' can be arbitrarily large; in particular, if `count' is greater
than 128, the result will be 0. The result is broken into two 64-bit pieces
which are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void
shift128Right(
bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr )
{
bits64 z0, z1;
int8 negCount = ( - count ) & 63;
if ( count == 0 ) {
z1 = a1;
z0 = a0;
}
else if ( count < 64 ) {
z1 = ( a0<<negCount ) | ( a1>>count );
z0 = a0>>count;
}
else {
z1 = ( count < 64 ) ? ( a0>>( count & 63 ) ) : 0;
z0 = 0;
}
*z1Ptr = z1;
*z0Ptr = z0;
}
/*
-------------------------------------------------------------------------------
Shifts the 128-bit value formed by concatenating `a0' and `a1' right by the
number of bits given in `count'. If any nonzero bits are shifted off, they
are ``jammed'' into the least significant bit of the result by setting the
least significant bit to 1. The value of `count' can be arbitrarily large;
in particular, if `count' is greater than 128, the result will be either
0 or 1, depending on whether the concatenation of `a0' and `a1' is zero or
nonzero. The result is broken into two 64-bit pieces which are stored at
the locations pointed to by `z0Ptr' and `z1Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void
shift128RightJamming(
bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr )
{
bits64 z0, z1;
int8 negCount = ( - count ) & 63;
if ( count == 0 ) {
z1 = a1;
z0 = a0;
}
else if ( count < 64 ) {
z1 = ( a0<<negCount ) | ( a1>>count ) | ( ( a1<<negCount ) != 0 );
z0 = a0>>count;
}
else {
if ( count == 64 ) {
z1 = a0 | ( a1 != 0 );
}
else if ( count < 128 ) {
z1 = ( a0>>( count & 63 ) ) | ( ( ( a0<<negCount ) | a1 ) != 0 );
}
else {
z1 = ( ( a0 | a1 ) != 0 );
}
z0 = 0;
}
*z1Ptr = z1;
*z0Ptr = z0;
}
/*
-------------------------------------------------------------------------------
Shifts the 192-bit value formed by concatenating `a0', `a1', and `a2' right
by 64 _plus_ the number of bits given in `count'. The shifted result is
at most 128 nonzero bits; these are broken into two 64-bit pieces which are
stored at the locations pointed to by `z0Ptr' and `z1Ptr'. The bits shifted
off form a third 64-bit result as follows: The _last_ bit shifted off is
the most-significant bit of the extra result, and the other 63 bits of the
extra result are all zero if and only if _all_but_the_last_ bits shifted off
were all zero. This extra result is stored in the location pointed to by
`z2Ptr'. The value of `count' can be arbitrarily large.
(This routine makes more sense if `a0', `a1', and `a2' are considered
to form a fixed-point value with binary point between `a1' and `a2'. This
fixed-point value is shifted right by the number of bits given in `count',
and the integer part of the result is returned at the locations pointed to
by `z0Ptr' and `z1Ptr'. The fractional part of the result may be slightly
corrupted as described above, and is returned at the location pointed to by
`z2Ptr'.)
-------------------------------------------------------------------------------
*/
INLINE void
shift128ExtraRightJamming(
bits64 a0,
bits64 a1,
bits64 a2,
int16 count,
bits64 *z0Ptr,
bits64 *z1Ptr,
bits64 *z2Ptr
)
{
bits64 z0, z1, z2;
int8 negCount = ( - count ) & 63;
if ( count == 0 ) {
z2 = a2;
z1 = a1;
z0 = a0;
}
else {
if ( count < 64 ) {
z2 = a1<<negCount;
z1 = ( a0<<negCount ) | ( a1>>count );
z0 = a0>>count;
}
else {
if ( count == 64 ) {
z2 = a1;
z1 = a0;
}
else {
a2 |= a1;
if ( count < 128 ) {
z2 = a0<<negCount;
z1 = a0>>( count & 63 );
}
else {
z2 = ( count == 128 ) ? a0 : ( a0 != 0 );
z1 = 0;
}
}
z0 = 0;
}
z2 |= ( a2 != 0 );
}
*z2Ptr = z2;
*z1Ptr = z1;
*z0Ptr = z0;
}
/*
-------------------------------------------------------------------------------
Shifts the 128-bit value formed by concatenating `a0' and `a1' left by the
number of bits given in `count'. Any bits shifted off are lost. The value
of `count' must be less than 64. The result is broken into two 64-bit
pieces which are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void
shortShift128Left(
bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr )
{
*z1Ptr = a1<<count;
*z0Ptr =
( count == 0 ) ? a0 : ( a0<<count ) | ( a1>>( ( - count ) & 63 ) );
}
/*
-------------------------------------------------------------------------------
Shifts the 192-bit value formed by concatenating `a0', `a1', and `a2' left
by the number of bits given in `count'. Any bits shifted off are lost.
The value of `count' must be less than 64. The result is broken into three
64-bit pieces which are stored at the locations pointed to by `z0Ptr',
`z1Ptr', and `z2Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void
shortShift192Left(
bits64 a0,
bits64 a1,
bits64 a2,
int16 count,
bits64 *z0Ptr,
bits64 *z1Ptr,
bits64 *z2Ptr
)
{
bits64 z0, z1, z2;
int8 negCount;
z2 = a2<<count;
z1 = a1<<count;
z0 = a0<<count;
if ( 0 < count ) {
negCount = ( ( - count ) & 63 );
z1 |= a2>>negCount;
z0 |= a1>>negCount;
}
*z2Ptr = z2;
*z1Ptr = z1;
*z0Ptr = z0;
}
/*
-------------------------------------------------------------------------------
Adds the 128-bit value formed by concatenating `a0' and `a1' to the 128-bit
value formed by concatenating `b0' and `b1'. Addition is modulo 2^128, so
any carry out is lost. The result is broken into two 64-bit pieces which
are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void
add128(
bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 *z0Ptr, bits64 *z1Ptr )
{
bits64 z1;
z1 = a1 + b1;
*z1Ptr = z1;
*z0Ptr = a0 + b0 + ( z1 < a1 );
}
/*
-------------------------------------------------------------------------------
Adds the 192-bit value formed by concatenating `a0', `a1', and `a2' to the
192-bit value formed by concatenating `b0', `b1', and `b2'. Addition is
modulo 2^192, so any carry out is lost. The result is broken into three
64-bit pieces which are stored at the locations pointed to by `z0Ptr',
`z1Ptr', and `z2Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void
add192(
bits64 a0,
bits64 a1,
bits64 a2,
bits64 b0,
bits64 b1,
bits64 b2,
bits64 *z0Ptr,
bits64 *z1Ptr,
bits64 *z2Ptr
)
{
bits64 z0, z1, z2;
int8 carry0, carry1;
z2 = a2 + b2;
carry1 = ( z2 < a2 );
z1 = a1 + b1;
carry0 = ( z1 < a1 );
z0 = a0 + b0;
z1 += carry1;
z0 += ( z1 < carry1 );
z0 += carry0;
*z2Ptr = z2;
*z1Ptr = z1;
*z0Ptr = z0;
}
/*
-------------------------------------------------------------------------------
Subtracts the 128-bit value formed by concatenating `b0' and `b1' from the
128-bit value formed by concatenating `a0' and `a1'. Subtraction is modulo
2^128, so any borrow out (carry out) is lost. The result is broken into two
64-bit pieces which are stored at the locations pointed to by `z0Ptr' and
`z1Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void
sub128(
bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 *z0Ptr, bits64 *z1Ptr )
{
*z1Ptr = a1 - b1;
*z0Ptr = a0 - b0 - ( a1 < b1 );
}
/*
-------------------------------------------------------------------------------
Subtracts the 192-bit value formed by concatenating `b0', `b1', and `b2'
from the 192-bit value formed by concatenating `a0', `a1', and `a2'.
Subtraction is modulo 2^192, so any borrow out (carry out) is lost. The
result is broken into three 64-bit pieces which are stored at the locations
pointed to by `z0Ptr', `z1Ptr', and `z2Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void
sub192(
bits64 a0,
bits64 a1,
bits64 a2,
bits64 b0,
bits64 b1,
bits64 b2,
bits64 *z0Ptr,
bits64 *z1Ptr,
bits64 *z2Ptr
)
{
bits64 z0, z1, z2;
int8 borrow0, borrow1;
z2 = a2 - b2;
borrow1 = ( a2 < b2 );
z1 = a1 - b1;
borrow0 = ( a1 < b1 );
z0 = a0 - b0;
z0 -= ( z1 < borrow1 );
z1 -= borrow1;
z0 -= borrow0;
*z2Ptr = z2;
*z1Ptr = z1;
*z0Ptr = z0;
}
/*
-------------------------------------------------------------------------------
Multiplies `a' by `b' to obtain a 128-bit product. The product is broken
into two 64-bit pieces which are stored at the locations pointed to by
`z0Ptr' and `z1Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void mul64To128( bits64 a, bits64 b, bits64 *z0Ptr, bits64 *z1Ptr )
{
bits32 aHigh, aLow, bHigh, bLow;
bits64 z0, zMiddleA, zMiddleB, z1;
aLow = a;
aHigh = a>>32;
bLow = b;
bHigh = b>>32;
z1 = ( (bits64) aLow ) * bLow;
zMiddleA = ( (bits64) aLow ) * bHigh;
zMiddleB = ( (bits64) aHigh ) * bLow;
z0 = ( (bits64) aHigh ) * bHigh;
zMiddleA += zMiddleB;
z0 += ( ( (bits64) ( zMiddleA < zMiddleB ) )<<32 ) + ( zMiddleA>>32 );
zMiddleA <<= 32;
z1 += zMiddleA;
z0 += ( z1 < zMiddleA );
*z1Ptr = z1;
*z0Ptr = z0;
}
/*
-------------------------------------------------------------------------------
Multiplies the 128-bit value formed by concatenating `a0' and `a1' by
`b' to obtain a 192-bit product. The product is broken into three 64-bit
pieces which are stored at the locations pointed to by `z0Ptr', `z1Ptr', and
`z2Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void
mul128By64To192(
bits64 a0,
bits64 a1,
bits64 b,
bits64 *z0Ptr,
bits64 *z1Ptr,
bits64 *z2Ptr
)
{
bits64 z0, z1, z2, more1;
mul64To128( a1, b, &z1, &z2 );
mul64To128( a0, b, &z0, &more1 );
add128( z0, more1, 0, z1, &z0, &z1 );
*z2Ptr = z2;
*z1Ptr = z1;
*z0Ptr = z0;
}
/*
-------------------------------------------------------------------------------
Multiplies the 128-bit value formed by concatenating `a0' and `a1' to the
128-bit value formed by concatenating `b0' and `b1' to obtain a 256-bit
product. The product is broken into four 64-bit pieces which are stored at
the locations pointed to by `z0Ptr', `z1Ptr', `z2Ptr', and `z3Ptr'.
-------------------------------------------------------------------------------
*/
INLINE void
mul128To256(
bits64 a0,
bits64 a1,
bits64 b0,
bits64 b1,
bits64 *z0Ptr,
bits64 *z1Ptr,
bits64 *z2Ptr,
bits64 *z3Ptr
)
{
bits64 z0, z1, z2, z3;
bits64 more1, more2;
mul64To128( a1, b1, &z2, &z3 );
mul64To128( a1, b0, &z1, &more2 );
add128( z1, more2, 0, z2, &z1, &z2 );
mul64To128( a0, b0, &z0, &more1 );
add128( z0, more1, 0, z1, &z0, &z1 );
mul64To128( a0, b1, &more1, &more2 );
add128( more1, more2, 0, z2, &more1, &z2 );
add128( z0, z1, 0, more1, &z0, &z1 );
*z3Ptr = z3;
*z2Ptr = z2;
*z1Ptr = z1;
*z0Ptr = z0;
}
/*
-------------------------------------------------------------------------------
Returns an approximation to the 64-bit integer quotient obtained by dividing
`b' into the 128-bit value formed by concatenating `a0' and `a1'. The
divisor `b' must be at least 2^63. If q is the exact quotient truncated
toward zero, the approximation returned lies between q and q + 2 inclusive.
If the exact quotient q is larger than 64 bits, the maximum positive 64-bit
unsigned integer is returned.
-------------------------------------------------------------------------------
*/
static bits64 estimateDiv128To64( bits64 a0, bits64 a1, bits64 b )
{
bits64 b0, b1;
bits64 rem0, rem1, term0, term1;
bits64 z;
if ( b <= a0 ) return LIT64( 0xFFFFFFFFFFFFFFFF );
b0 = b>>32;
z = ( b0<<32 <= a0 ) ? LIT64( 0xFFFFFFFF00000000 ) : ( a0 / b0 )<<32;
mul64To128( b, z, &term0, &term1 );
sub128( a0, a1, term0, term1, &rem0, &rem1 );
while ( ( (sbits64) rem0 ) < 0 ) {
z -= LIT64( 0x100000000 );
b1 = b<<32;
add128( rem0, rem1, b0, b1, &rem0, &rem1 );
}
rem0 = ( rem0<<32 ) | ( rem1>>32 );
z |= ( b0<<32 <= rem0 ) ? 0xFFFFFFFF : rem0 / b0;
return z;
}
#ifndef SOFTFLOAT_FOR_GCC /* Not used */
/*
-------------------------------------------------------------------------------
Returns an approximation to the square root of the 32-bit significand given
by `a'. Considered as an integer, `a' must be at least 2^31. If bit 0 of
`aExp' (the least significant bit) is 1, the integer returned approximates
2^31*sqrt(`a'/2^31), where `a' is considered an integer. If bit 0 of `aExp'
is 0, the integer returned approximates 2^31*sqrt(`a'/2^30). In either
case, the approximation returned lies strictly within +/-2 of the exact
value.
-------------------------------------------------------------------------------
*/
static bits32 estimateSqrt32( int16 aExp, bits32 a )
{
static const bits16 sqrtOddAdjustments[] = {
0x0004, 0x0022, 0x005D, 0x00B1, 0x011D, 0x019F, 0x0236, 0x02E0,
0x039C, 0x0468, 0x0545, 0x0631, 0x072B, 0x0832, 0x0946, 0x0A67
};
static const bits16 sqrtEvenAdjustments[] = {
0x0A2D, 0x08AF, 0x075A, 0x0629, 0x051A, 0x0429, 0x0356, 0x029E,
0x0200, 0x0179, 0x0109, 0x00AF, 0x0068, 0x0034, 0x0012, 0x0002
};
int8 index;
bits32 z;
index = ( a>>27 ) & 15;
if ( aExp & 1 ) {
z = 0x4000 + ( a>>17 ) - sqrtOddAdjustments[ index ];
z = ( ( a / z )<<14 ) + ( z<<15 );
a >>= 1;
}
else {
z = 0x8000 + ( a>>17 ) - sqrtEvenAdjustments[ index ];
z = a / z + z;
z = ( 0x20000 <= z ) ? 0xFFFF8000 : ( z<<15 );
if ( z <= a ) return (bits32) ( ( (sbits32) a )>>1 );
}
return ( (bits32) ( ( ( (bits64) a )<<31 ) / z ) ) + ( z>>1 );
}
#endif
/*
-------------------------------------------------------------------------------
Returns the number of leading 0 bits before the most-significant 1 bit of
`a'. If `a' is zero, 32 is returned.
-------------------------------------------------------------------------------
*/
static int8 countLeadingZeros32( bits32 a )
{
static const int8 countLeadingZerosHigh[] = {
8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};
int8 shiftCount;
shiftCount = 0;
if ( a < 0x10000 ) {
shiftCount += 16;
a <<= 16;
}
if ( a < 0x1000000 ) {
shiftCount += 8;
a <<= 8;
}
shiftCount += countLeadingZerosHigh[ a>>24 ];
return shiftCount;
}
/*
-------------------------------------------------------------------------------
Returns the number of leading 0 bits before the most-significant 1 bit of
`a'. If `a' is zero, 64 is returned.
-------------------------------------------------------------------------------
*/
static int8 countLeadingZeros64( bits64 a )
{
int8 shiftCount;
shiftCount = 0;
if ( a < ( (bits64) 1 )<<32 ) {
shiftCount += 32;
}
else {
a >>= 32;
}
shiftCount += countLeadingZeros32( a );
return shiftCount;
}
/*
-------------------------------------------------------------------------------
Returns 1 if the 128-bit value formed by concatenating `a0' and `a1'
is equal to the 128-bit value formed by concatenating `b0' and `b1'.
Otherwise, returns 0.
-------------------------------------------------------------------------------
*/
INLINE flag eq128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
{
return ( a0 == b0 ) && ( a1 == b1 );
}
/*
-------------------------------------------------------------------------------
Returns 1 if the 128-bit value formed by concatenating `a0' and `a1' is less
than or equal to the 128-bit value formed by concatenating `b0' and `b1'.
Otherwise, returns 0.
-------------------------------------------------------------------------------
*/
INLINE flag le128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
{
return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 <= b1 ) );
}
/*
-------------------------------------------------------------------------------
Returns 1 if the 128-bit value formed by concatenating `a0' and `a1' is less
than the 128-bit value formed by concatenating `b0' and `b1'. Otherwise,
returns 0.
-------------------------------------------------------------------------------
*/
INLINE flag lt128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
{
return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 < b1 ) );
}
/*
-------------------------------------------------------------------------------
Returns 1 if the 128-bit value formed by concatenating `a0' and `a1' is
not equal to the 128-bit value formed by concatenating `b0' and `b1'.
Otherwise, returns 0.
-------------------------------------------------------------------------------
*/
INLINE flag ne128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
{
return ( a0 != b0 ) || ( a1 != b1 );
}

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$NetBSD: softfloat-source.txt,v 1.1 2000/06/06 08:15:10 bjh21 Exp $
SoftFloat Release 2a Source Documentation
John R. Hauser
1998 December 14
-------------------------------------------------------------------------------
Introduction
SoftFloat is a software implementation of floating-point that conforms to
the IEC/IEEE Standard for Binary Floating-Point Arithmetic. SoftFloat can
support four floating-point formats: single precision, double precision,
extended double precision, and quadruple precision. All operations required
by the IEEE Standard are implemented, except for conversions to and from
decimal. SoftFloat is distributed in the form of C source code, so a
C compiler is needed to compile the code. Support for the extended double-
precision and quadruple-precision formats is dependent on the C compiler
implementing a 64-bit integer type.
This document gives information needed for compiling and/or porting
SoftFloat.
The source code for SoftFloat is intended to be relatively machine-
independent and should be compilable using any ISO/ANSI C compiler. At the
time of this writing, SoftFloat has been successfully compiled with the GNU
C Compiler (`gcc') for several platforms.
-------------------------------------------------------------------------------
Limitations
SoftFloat as written requires an ISO/ANSI-style C compiler. No attempt has
been made to accomodate compilers that are not ISO-conformant. Older ``K&R-
style'' compilers are not adequate for compiling SoftFloat. All testing I
have done so far has been with the GNU C Compiler. Compilation with other
compilers should be possible but has not been tested.
The SoftFloat sources assume that source code file names can be longer than
8 characters. In order to compile under an MS-DOS-type system, many of the
source files will need to be renamed, and the source and makefiles edited
appropriately. Once compiled, the SoftFloat binary does not depend on the
existence of long file names.
The underlying machine is assumed to be binary with a word size that is a
power of 2. Bytes are 8 bits. Support for the extended double-precision
and quadruple-precision formats depends on the C compiler implementing
a 64-bit integer type. If the largest integer type supported by the
C compiler is 32 bits, SoftFloat is limited to the single- and double-
precision formats.
-------------------------------------------------------------------------------
Contents
Introduction
Limitations
Contents
Legal Notice
SoftFloat Source Directory Structure
SoftFloat Source Files
processors/*.h
softfloat/bits*/*/softfloat.h
softfloat/bits*/*/milieu.h
softfloat/bits*/*/softfloat-specialize
softfloat/bits*/softfloat-macros
softfloat/bits*/softfloat.c
Steps to Creating a `softfloat.o'
Making `softfloat.o' a Library
Testing SoftFloat
Timing SoftFloat
Compiler Options and Efficiency
Processor-Specific Optimization of `softfloat.c' Using `softfloat-macros'
Contact Information
-------------------------------------------------------------------------------
Legal Notice
SoftFloat was written by John R. Hauser. This work was made possible in
part by the International Computer Science Institute, located at Suite 600,
1947 Center Street, Berkeley, California 94704. Funding was partially
provided by the National Science Foundation under grant MIP-9311980. The
original version of this code was written as part of a project to build
a fixed-point vector processor in collaboration with the University of
California at Berkeley, overseen by Profs. Nelson Morgan and John Wawrzynek.
THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
-------------------------------------------------------------------------------
SoftFloat Source Directory Structure
Because SoftFloat is targeted to multiple platforms, its source code
is slightly scattered between target-specific and target-independent
directories and files. The directory structure is as follows:
processors
softfloat
bits64
templates
386-Win32-gcc
SPARC-Solaris-gcc
bits32
templates
386-Win32-gcc
SPARC-Solaris-gcc
The two topmost directories and their contents are:
softfloat - Most of the source code needed for SoftFloat.
processors - Target-specific header files that are not specific to
SoftFloat.
The `softfloat' directory is further split into two parts:
bits64 - SoftFloat implementation using 64-bit integers.
bits32 - SoftFloat implementation using only 32-bit integers.
Within these directories are subdirectories for each of the targeted
platforms. The SoftFloat source code is distributed with targets
`386-Win32-gcc' and `SPARC-Solaris-gcc' (and perhaps others) already
prepared for both the 32-bit and 64-bit implementations. Source files that
are not within these target-specific subdirectories are intended to be
target-independent.
The naming convention used for the target-specific directories is
`<processor>-<executable-type>-<compiler>'. The names of the supplied
target directories should be interpreted as follows:
<processor>:
386 - Intel 386-compatible processor.
SPARC - SPARC processor (as used by Sun machines).
<executable-type>:
Win32 - Microsoft Win32 executable.
Solaris - Sun Solaris executable.
<compiler>:
gcc - GNU C Compiler.
You do not need to maintain this convention if you do not want to.
Alongside the supplied target-specific directories is a `templates'
directory containing a set of ``generic'' target-specific source files. A
new target directory can be created by copying the `templates' directory and
editing the files inside. (Complete instructions for porting SoftFloat to a
new target are in the section _Steps_to_Creating_a_`softfloat.o'_.) Note
that the `templates' directory will not work as a target directory without
some editing. To avoid confusion, it would be wise to refrain from editing
the files inside `templates' directly.
-------------------------------------------------------------------------------
SoftFloat Source Files
The purpose of each source file is described below. In the following,
the `*' symbol is used in place of the name of a specific target, such as
`386-Win32-gcc' or `SPARC-Solaris-gcc', or in place of some other text, as
in `bits*' for either `bits32' or `bits64'.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
processors/*.h
The target-specific `processors' header file defines integer types
of various sizes, and also defines certain C preprocessor macros that
characterize the target. The two examples supplied are `386-gcc.h' and
`SPARC-gcc.h'. The naming convention used for processor header files is
`<processor>-<compiler>.h'.
If 64-bit integers are supported by the compiler, the macro name `BITS64'
should be defined here along with the corresponding 64-bit integer
types. In addition, the function-like macro `LIT64' must be defined for
constructing 64-bit integer literals (constants). The `LIT64' macro is used
consistently in the SoftFloat code to annotate 64-bit literals.
If `BITS64' is not defined, only the 32-bit version of SoftFloat can be
compiled. If `BITS64' _is_ defined, either can be compiled.
If an inlining attribute (such as an `inline' keyword) is provided by the
compiler, the macro `INLINE' should be defined to the appropriate keyword.
If not, `INLINE' can be set to the keyword `static'. The `INLINE' macro
appears in the SoftFloat source code before every function that should
be inlined by the compiler. SoftFloat depends on inlining to obtain
good speed. Even if inlining cannot be forced with a language keyword,
the compiler may still be able to perform inlining on its own as an
optimization. If a command-line option is needed to convince the compiler
to perform this optimization, this should be assured in the makefile. (See
the section _Compiler_Options_and_Efficiency_ below.)
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
softfloat/bits*/*/softfloat.h
The target-specific `softfloat.h' header file defines the SoftFloat
interface as seen by clients.
Unlike the actual function definitions in `softfloat.c', the declarations
in `softfloat.h' do not use any of the types defined by the `processors'
header file. This is done so that clients will not have to include the
`processors' header file in order to use SoftFloat. Nevertheless, the
target-specific declarations in `softfloat.h' must match what `softfloat.c'
expects. For example, if `int32' is defined as `int' in the `processors'
header file, then in `softfloat.h' the output of `float32_to_int32' should
be stated as `int', although in `softfloat.c' it is given in target-
independent form as `int32'.
For the `bits64' implementation of SoftFloat, the macro names `FLOATX80' and
`FLOAT128' must be defined in order for the extended double-precision and
quadruple-precision formats to be enabled in the code. Conversely, either
or both of the extended formats can be disabled by simply removing the
`#define' of the respective macro. When an extended format is not enabled,
none of the functions that either input or output the format are defined,
and no space is taken up in `softfloat.o' by such functions. There is no
provision for disabling the usual single- and double-precision formats.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
softfloat/bits*/*/milieu.h
The target-specific `milieu.h' header file provides declarations that are
needed to compile SoftFloat. In addition, deviations from ISO/ANSI C by
the compiler (such as names not properly declared in system header files)
are corrected in this header if possible.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
softfloat/bits*/*/softfloat-specialize
This target-specific C source fragment defines:
-- whether tininess for underflow is detected before or after rounding by
default;
-- what (if anything) special happens when exceptions are raised;
-- how signaling NaNs are distinguished from quiet NaNs;
-- the default generated quiet NaNs; and
-- how NaNs are propagated from function inputs to output.
These details are not decided by the IEC/IEEE Standard. This fragment is
included verbatim within `softfloat.c' when SoftFloat is compiled.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
softfloat/bits*/softfloat-macros
This target-independent C source fragment defines a number of arithmetic
functions used as primitives within the `softfloat.c' source. Most of the
functions defined here are intended to be inlined for efficiency. This
fragment is included verbatim within `softfloat.c' when SoftFloat is
compiled.
Target-specific variations on this file are possible. See the section
_Processor-Specific_Optimization_of_`softfloat.c'_Using_`softfloat-macros'_
below.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
softfloat/bits*/softfloat.c
The target-independent `softfloat.c' source file contains the body of the
SoftFloat implementation.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
The inclusion of the files above within each other (using `#include') can be
shown graphically as follows:
softfloat/bits*/softfloat.c
softfloat/bits*/*/milieu.h
processors/*.h
softfloat/bits*/*/softfloat.h
softfloat/bits*/*/softfloat-specialize
softfloat/bits*/softfloat-macros
Note in particular that `softfloat.c' does not include the `processors'
header file directly. Rather, `softfloat.c' includes the target-specific
`milieu.h' header file, which in turn includes the processor header file.
-------------------------------------------------------------------------------
Steps to Creating a `softfloat.o'
Porting and/or compiling SoftFloat involves the following steps:
1. If one does not already exist, create an appropriate `.h' file in the
`processors' directory.
2. If `BITS64' is defined in the `processors' header file, choose whether
to compile the 32-bit or 64-bit implementation of SoftFloat. If
`BITS64' is not defined, your only choice is the 32-bit implementation.
The remaining steps occur within either the `bits32' or `bits64'
subdirectories.
3. If one does not already exist, create an appropriate target-specific
subdirectory by copying the given `templates' directory.
4. In the target-specific subdirectory, edit the files `softfloat-specialize'
and `softfloat.h' to define the desired exception handling functions
and mode control values. In the `softfloat.h' header file, ensure also
that all declarations give the proper target-specific type (such as
`int' or `long') corresponding to the target-independent type used in
`softfloat.c' (such as `int32'). None of the type names declared in the
`processors' header file should appear in `softfloat.h'.
5. In the target-specific subdirectory, edit the files `milieu.h' and
`Makefile' to reflect the current environment.
6. In the target-specific subdirectory, execute `make'.
For the targets that are supplied, if the expected compiler is available
(usually `gcc'), it should only be necessary to execute `make' in the
target-specific subdirectory.
-------------------------------------------------------------------------------
Making `softfloat.o' a Library
SoftFloat is not made into a software library by the supplied makefile.
If desired, `softfloat.o' can easily be put into its own library (in Unix,
`softfloat.a') using the usual system tool (in Unix, `ar').
-------------------------------------------------------------------------------
Testing SoftFloat
SoftFloat can be tested using the `testsoftfloat' program by the same
author. The `testsoftfloat' program is part of the TestFloat package
available at the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/arithmetic/
TestFloat.html'.
-------------------------------------------------------------------------------
Timing SoftFloat
A program called `timesoftfloat' for timing the SoftFloat functions is
included with the SoftFloat source code. Compiling `timesoftfloat' should
pose no difficulties once `softfloat.o' exists. The supplied makefile
will create a `timesoftfloat' executable by default after generating
`softfloat.o'. See `timesoftfloat.txt' for documentation about using
`timesoftfloat'.
-------------------------------------------------------------------------------
Compiler Options and Efficiency
In order to get good speed with SoftFloat, it is important that the compiler
inline the routines that have been marked `INLINE' in the code. Even if
inlining cannot be forced by an appropriate definition of the `INLINE'
macro, the compiler may still be able to perform inlining on its own as
an optimization. In that case, the makefile should be edited to give the
compiler whatever option is required to cause it to inline small functions.
The ability of the processor to do fast shifts has been assumed. Efficiency
will not be as good on processors for which this is not the case (such as
the original Motorola 68000 or Intel 8086 processors).
-------------------------------------------------------------------------------
Processor-Specific Optimization of `softfloat.c' Using `softfloat-macros'
The `softfloat-macros' source fragment defines arithmetic functions used
as primitives by `softfloat.c'. This file has been written in a target-
independent form. For a given target, it may be possible to improve on
these functions using target-specific and/or non-ISO-C features (such
as `asm' statements). For example, one of the ``macro'' functions takes
two word-size integers and returns their full product in two words.
This operation can be done directly in hardware on many processors; but
because it is not available through standard C, the function defined in
`softfloat-macros' uses four multiplies to achieve the same result.
To address these shortcomings, a customized version of `softfloat-macros'
can be created in any of the target-specific subdirectories. A simple
modification to the target's makefile should be sufficient to ensure that
the custom version is used instead of the generic one.
-------------------------------------------------------------------------------
Contact Information
At the time of this writing, the most up-to-date information about
SoftFloat and the latest release can be found at the Web page `http://
HTTP.CS.Berkeley.EDU/~jhauser/arithmetic/SoftFloat.html'.

5393
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$NetBSD: softfloat.txt,v 1.1 2000/06/06 08:15:10 bjh21 Exp $
SoftFloat Release 2a General Documentation
John R. Hauser
1998 December 13
-------------------------------------------------------------------------------
Introduction
SoftFloat is a software implementation of floating-point that conforms to
the IEC/IEEE Standard for Binary Floating-Point Arithmetic. As many as four
formats are supported: single precision, double precision, extended double
precision, and quadruple precision. All operations required by the standard
are implemented, except for conversions to and from decimal.
This document gives information about the types defined and the routines
implemented by SoftFloat. It does not attempt to define or explain the
IEC/IEEE Floating-Point Standard. Details about the standard are available
elsewhere.
-------------------------------------------------------------------------------
Limitations
SoftFloat is written in C and is designed to work with other C code. The
SoftFloat header files assume an ISO/ANSI-style C compiler. No attempt
has been made to accomodate compilers that are not ISO-conformant. In
particular, the distributed header files will not be acceptable to any
compiler that does not recognize function prototypes.
Support for the extended double-precision and quadruple-precision formats
depends on a C compiler that implements 64-bit integer arithmetic. If the
largest integer format supported by the C compiler is 32 bits, SoftFloat is
limited to only single and double precisions. When that is the case, all
references in this document to the extended double precision, quadruple
precision, and 64-bit integers should be ignored.
-------------------------------------------------------------------------------
Contents
Introduction
Limitations
Contents
Legal Notice
Types and Functions
Rounding Modes
Extended Double-Precision Rounding Precision
Exceptions and Exception Flags
Function Details
Conversion Functions
Standard Arithmetic Functions
Remainder Functions
Round-to-Integer Functions
Comparison Functions
Signaling NaN Test Functions
Raise-Exception Function
Contact Information
-------------------------------------------------------------------------------
Legal Notice
SoftFloat was written by John R. Hauser. This work was made possible in
part by the International Computer Science Institute, located at Suite 600,
1947 Center Street, Berkeley, California 94704. Funding was partially
provided by the National Science Foundation under grant MIP-9311980. The
original version of this code was written as part of a project to build
a fixed-point vector processor in collaboration with the University of
California at Berkeley, overseen by Profs. Nelson Morgan and John Wawrzynek.
THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
-------------------------------------------------------------------------------
Types and Functions
When 64-bit integers are supported by the compiler, the `softfloat.h' header
file defines four types: `float32' (single precision), `float64' (double
precision), `floatx80' (extended double precision), and `float128'
(quadruple precision). The `float32' and `float64' types are defined in
terms of 32-bit and 64-bit integer types, respectively, while the `float128'
type is defined as a structure of two 64-bit integers, taking into account
the byte order of the particular machine being used. The `floatx80' type
is defined as a structure containing one 16-bit and one 64-bit integer, with
the machine's byte order again determining the order of the `high' and `low'
fields.
When 64-bit integers are _not_ supported by the compiler, the `softfloat.h'
header file defines only two types: `float32' and `float64'. Because
ISO/ANSI C guarantees at least one built-in integer type of 32 bits,
the `float32' type is identified with an appropriate integer type. The
`float64' type is defined as a structure of two 32-bit integers, with the
machine's byte order determining the order of the fields.
In either case, the types in `softfloat.h' are defined such that if a system
implements the usual C `float' and `double' types according to the IEC/IEEE
Standard, then the `float32' and `float64' types should be indistinguishable
in memory from the native `float' and `double' types. (On the other hand,
when `float32' or `float64' values are placed in processor registers by
the compiler, the type of registers used may differ from those used for the
native `float' and `double' types.)
SoftFloat implements the following arithmetic operations:
-- Conversions among all the floating-point formats, and also between
integers (32-bit and 64-bit) and any of the floating-point formats.
-- The usual add, subtract, multiply, divide, and square root operations
for all floating-point formats.
-- For each format, the floating-point remainder operation defined by the
IEC/IEEE Standard.
-- For each floating-point format, a ``round to integer'' operation that
rounds to the nearest integer value in the same format. (The floating-
point formats can hold integer values, of course.)
-- Comparisons between two values in the same floating-point format.
The only functions required by the IEC/IEEE Standard that are not provided
are conversions to and from decimal.
-------------------------------------------------------------------------------
Rounding Modes
All four rounding modes prescribed by the IEC/IEEE Standard are implemented
for all operations that require rounding. The rounding mode is selected
by the global variable `float_rounding_mode'. This variable may be set
to one of the values `float_round_nearest_even', `float_round_to_zero',
`float_round_down', or `float_round_up'. The rounding mode is initialized
to nearest/even.
-------------------------------------------------------------------------------
Extended Double-Precision Rounding Precision
For extended double precision (`floatx80') only, the rounding precision
of the standard arithmetic operations is controlled by the global variable
`floatx80_rounding_precision'. The operations affected are:
floatx80_add floatx80_sub floatx80_mul floatx80_div floatx80_sqrt
When `floatx80_rounding_precision' is set to its default value of 80, these
operations are rounded (as usual) to the full precision of the extended
double-precision format. Setting `floatx80_rounding_precision' to 32
or to 64 causes the operations listed to be rounded to reduced precision
equivalent to single precision (`float32') or to double precision
(`float64'), respectively. When rounding to reduced precision, additional
bits in the result significand beyond the rounding point are set to zero.
The consequences of setting `floatx80_rounding_precision' to a value other
than 32, 64, or 80 is not specified. Operations other than the ones listed
above are not affected by `floatx80_rounding_precision'.
-------------------------------------------------------------------------------
Exceptions and Exception Flags
All five exception flags required by the IEC/IEEE Standard are
implemented. Each flag is stored as a unique bit in the global variable
`float_exception_flags'. The positions of the exception flag bits within
this variable are determined by the bit masks `float_flag_inexact',
`float_flag_underflow', `float_flag_overflow', `float_flag_divbyzero', and
`float_flag_invalid'. The exception flags variable is initialized to all 0,
meaning no exceptions.
An individual exception flag can be cleared with the statement
float_exception_flags &= ~ float_flag_<exception>;
where `<exception>' is the appropriate name. To raise a floating-point
exception, the SoftFloat function `float_raise' should be used (see below).
In the terminology of the IEC/IEEE Standard, SoftFloat can detect tininess
for underflow either before or after rounding. The choice is made by
the global variable `float_detect_tininess', which can be set to either
`float_tininess_before_rounding' or `float_tininess_after_rounding'.
Detecting tininess after rounding is better because it results in fewer
spurious underflow signals. The other option is provided for compatibility
with some systems. Like most systems, SoftFloat always detects loss of
accuracy for underflow as an inexact result.
-------------------------------------------------------------------------------
Function Details
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Conversion Functions
All conversions among the floating-point formats are supported, as are all
conversions between a floating-point format and 32-bit and 64-bit signed
integers. The complete set of conversion functions is:
int32_to_float32 int64_to_float32
int32_to_float64 int64_to_float32
int32_to_floatx80 int64_to_floatx80
int32_to_float128 int64_to_float128
float32_to_int32 float32_to_int64
float32_to_int32 float64_to_int64
floatx80_to_int32 floatx80_to_int64
float128_to_int32 float128_to_int64
float32_to_float64 float32_to_floatx80 float32_to_float128
float64_to_float32 float64_to_floatx80 float64_to_float128
floatx80_to_float32 floatx80_to_float64 floatx80_to_float128
float128_to_float32 float128_to_float64 float128_to_floatx80
Each conversion function takes one operand of the appropriate type and
returns one result. Conversions from a smaller to a larger floating-point
format are always exact and so require no rounding. Conversions from 32-bit
integers to double precision and larger formats are also exact, and likewise
for conversions from 64-bit integers to extended double and quadruple
precisions.
Conversions from floating-point to integer raise the invalid exception if
the source value cannot be rounded to a representable integer of the desired
size (32 or 64 bits). If the floating-point operand is a NaN, the largest
positive integer is returned. Otherwise, if the conversion overflows, the
largest integer with the same sign as the operand is returned.
On conversions to integer, if the floating-point operand is not already an
integer value, the operand is rounded according to the current rounding
mode as specified by `float_rounding_mode'. Because C (and perhaps other
languages) require that conversions to integers be rounded toward zero, the
following functions are provided for improved speed and convenience:
float32_to_int32_round_to_zero float32_to_int64_round_to_zero
float64_to_int32_round_to_zero float64_to_int64_round_to_zero
floatx80_to_int32_round_to_zero floatx80_to_int64_round_to_zero
float128_to_int32_round_to_zero float128_to_int64_round_to_zero
These variant functions ignore `float_rounding_mode' and always round toward
zero.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Standard Arithmetic Functions
The following standard arithmetic functions are provided:
float32_add float32_sub float32_mul float32_div float32_sqrt
float64_add float64_sub float64_mul float64_div float64_sqrt
floatx80_add floatx80_sub floatx80_mul floatx80_div floatx80_sqrt
float128_add float128_sub float128_mul float128_div float128_sqrt
Each function takes two operands, except for `sqrt' which takes only one.
The operands and result are all of the same type.
Rounding of the extended double-precision (`floatx80') functions is affected
by the `floatx80_rounding_precision' variable, as explained above in the
section _Extended_Double-Precision_Rounding_Precision_.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Remainder Functions
For each format, SoftFloat implements the remainder function according to
the IEC/IEEE Standard. The remainder functions are:
float32_rem
float64_rem
floatx80_rem
float128_rem
Each remainder function takes two operands. The operands and result are all
of the same type. Given operands x and y, the remainder functions return
the value x - n*y, where n is the integer closest to x/y. If x/y is exactly
halfway between two integers, n is the even integer closest to x/y. The
remainder functions are always exact and so require no rounding.
Depending on the relative magnitudes of the operands, the remainder
functions can take considerably longer to execute than the other SoftFloat
functions. This is inherent in the remainder operation itself and is not a
flaw in the SoftFloat implementation.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Round-to-Integer Functions
For each format, SoftFloat implements the round-to-integer function
specified by the IEC/IEEE Standard. The functions are:
float32_round_to_int
float64_round_to_int
floatx80_round_to_int
float128_round_to_int
Each function takes a single floating-point operand and returns a result of
the same type. (Note that the result is not an integer type.) The operand
is rounded to an exact integer according to the current rounding mode, and
the resulting integer value is returned in the same floating-point format.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Comparison Functions
The following floating-point comparison functions are provided:
float32_eq float32_le float32_lt
float64_eq float64_le float64_lt
floatx80_eq floatx80_le floatx80_lt
float128_eq float128_le float128_lt
Each function takes two operands of the same type and returns a 1 or 0
representing either _true_ or _false_. The abbreviation `eq' stands for
``equal'' (=); `le' stands for ``less than or equal'' (<=); and `lt' stands
for ``less than'' (<).
The standard greater-than (>), greater-than-or-equal (>=), and not-equal
(!=) functions are easily obtained using the functions provided. The
not-equal function is just the logical complement of the equal function.
The greater-than-or-equal function is identical to the less-than-or-equal
function with the operands reversed; and the greater-than function can be
obtained from the less-than function in the same way.
The IEC/IEEE Standard specifies that the less-than-or-equal and less-than
functions raise the invalid exception if either input is any kind of NaN.
The equal functions, on the other hand, are defined not to raise the invalid
exception on quiet NaNs. For completeness, SoftFloat provides the following
additional functions:
float32_eq_signaling float32_le_quiet float32_lt_quiet
float64_eq_signaling float64_le_quiet float64_lt_quiet
floatx80_eq_signaling floatx80_le_quiet floatx80_lt_quiet
float128_eq_signaling float128_le_quiet float128_lt_quiet
The `signaling' equal functions are identical to the standard functions
except that the invalid exception is raised for any NaN input. Likewise,
the `quiet' comparison functions are identical to their counterparts except
that the invalid exception is not raised for quiet NaNs.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Signaling NaN Test Functions
The following functions test whether a floating-point value is a signaling
NaN:
float32_is_signaling_nan
float64_is_signaling_nan
floatx80_is_signaling_nan
float128_is_signaling_nan
The functions take one operand and return 1 if the operand is a signaling
NaN and 0 otherwise.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Raise-Exception Function
SoftFloat provides a function for raising floating-point exceptions:
float_raise
The function takes a mask indicating the set of exceptions to raise. No
result is returned. In addition to setting the specified exception flags,
this function may cause a trap or abort appropriate for the current system.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-------------------------------------------------------------------------------
Contact Information
At the time of this writing, the most up-to-date information about
SoftFloat and the latest release can be found at the Web page `http://
HTTP.CS.Berkeley.EDU/~jhauser/arithmetic/SoftFloat.html'.

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/*
===============================================================================
This C header file is part of the SoftFloat IEC/IEEE Floating-point
Arithmetic Package, Release 2a.
Written by John R. Hauser. This work was made possible in part by the
International Computer Science Institute, located at Suite 600, 1947 Center
Street, Berkeley, California 94704. Funding was partially provided by the
National Science Foundation under grant MIP-9311980. The original version
of this code was written as part of a project to build a fixed-point vector
processor in collaboration with the University of California at Berkeley,
overseen by Profs. Nelson Morgan and John Wawrzynek. More information
is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
arithmetic/SoftFloat.html'.
THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
Derivative works are acceptable, even for commercial purposes, so long as
(1) they include prominent notice that the work is derivative, and (2) they
include prominent notice akin to these four paragraphs for those parts of
this code that are retained.
===============================================================================
*/
/*
-------------------------------------------------------------------------------
Include common integer types and flags.
-------------------------------------------------------------------------------
*/
#include "../../../processors/!!!processor.h"
/*
-------------------------------------------------------------------------------
Symbolic Boolean literals.
-------------------------------------------------------------------------------
*/
enum {
FALSE = 0,
TRUE = 1
};

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/*
===============================================================================
This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
Arithmetic Package, Release 2a.
Written by John R. Hauser. This work was made possible in part by the
International Computer Science Institute, located at Suite 600, 1947 Center
Street, Berkeley, California 94704. Funding was partially provided by the
National Science Foundation under grant MIP-9311980. The original version
of this code was written as part of a project to build a fixed-point vector
processor in collaboration with the University of California at Berkeley,
overseen by Profs. Nelson Morgan and John Wawrzynek. More information
is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
arithmetic/SoftFloat.html'.
THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
Derivative works are acceptable, even for commercial purposes, so long as
(1) they include prominent notice that the work is derivative, and (2) they
include prominent notice akin to these four paragraphs for those parts of
this code that are retained.
===============================================================================
*/
/*
-------------------------------------------------------------------------------
Underflow tininess-detection mode, statically initialized to default value.
(The declaration in `softfloat.h' must match the `int8' type here.)
-------------------------------------------------------------------------------
*/
int8 float_detect_tininess = float_tininess_after_rounding;
/*
-------------------------------------------------------------------------------
Raises the exceptions specified by `flags'. Floating-point traps can be
defined here if desired. It is currently not possible for such a trap to
substitute a result value. If traps are not implemented, this routine
should be simply `float_exception_flags |= flags;'.
-------------------------------------------------------------------------------
*/
void float_raise( int8 flags )
{
float_exception_flags |= flags;
}
/*
-------------------------------------------------------------------------------
Internal canonical NaN format.
-------------------------------------------------------------------------------
*/
typedef struct {
flag sign;
bits64 high, low;
} commonNaNT;
/*
-------------------------------------------------------------------------------
The pattern for a default generated single-precision NaN.
-------------------------------------------------------------------------------
*/
#define float32_default_nan 0xFFFFFFFF
/*
-------------------------------------------------------------------------------
Returns 1 if the single-precision floating-point value `a' is a NaN;
otherwise returns 0.
-------------------------------------------------------------------------------
*/
flag float32_is_nan( float32 a )
{
return ( 0xFF000000 < (bits32) ( a<<1 ) );
}
/*
-------------------------------------------------------------------------------
Returns 1 if the single-precision floating-point value `a' is a signaling
NaN; otherwise returns 0.
-------------------------------------------------------------------------------
*/
flag float32_is_signaling_nan( float32 a )
{
return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
}
/*
-------------------------------------------------------------------------------
Returns the result of converting the single-precision floating-point NaN
`a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
exception is raised.
-------------------------------------------------------------------------------
*/
static commonNaNT float32ToCommonNaN( float32 a )
{
commonNaNT z;
if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
z.sign = a>>31;
z.low = 0;
z.high = ( (bits64) a )<<41;
return z;
}
/*
-------------------------------------------------------------------------------
Returns the result of converting the canonical NaN `a' to the single-
precision floating-point format.
-------------------------------------------------------------------------------
*/
static float32 commonNaNToFloat32( commonNaNT a )
{
return ( ( (bits32) a.sign )<<31 ) | 0x7FC00000 | ( a.high>>41 );
}
/*
-------------------------------------------------------------------------------
Takes two single-precision floating-point values `a' and `b', one of which
is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
signaling NaN, the invalid exception is raised.
-------------------------------------------------------------------------------
*/
static float32 propagateFloat32NaN( float32 a, float32 b )
{
flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
aIsNaN = float32_is_nan( a );
aIsSignalingNaN = float32_is_signaling_nan( a );
bIsNaN = float32_is_nan( b );
bIsSignalingNaN = float32_is_signaling_nan( b );
a |= 0x00400000;
b |= 0x00400000;
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
if ( aIsNaN ) {
return ( aIsSignalingNaN & bIsNaN ) ? b : a;
}
else {
return b;
}
}
/*
-------------------------------------------------------------------------------
The pattern for a default generated double-precision NaN.
-------------------------------------------------------------------------------
*/
#define float64_default_nan LIT64( 0xFFFFFFFFFFFFFFFF )
/*
-------------------------------------------------------------------------------
Returns 1 if the double-precision floating-point value `a' is a NaN;
otherwise returns 0.
-------------------------------------------------------------------------------
*/
flag float64_is_nan( float64 a )
{
return ( LIT64( 0xFFE0000000000000 ) < (bits64) ( a<<1 ) );
}
/*
-------------------------------------------------------------------------------
Returns 1 if the double-precision floating-point value `a' is a signaling
NaN; otherwise returns 0.
-------------------------------------------------------------------------------
*/
flag float64_is_signaling_nan( float64 a )
{
return
( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
&& ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
}
/*
-------------------------------------------------------------------------------
Returns the result of converting the double-precision floating-point NaN
`a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
exception is raised.
-------------------------------------------------------------------------------
*/
static commonNaNT float64ToCommonNaN( float64 a )
{
commonNaNT z;
if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
z.sign = a>>63;
z.low = 0;
z.high = a<<12;
return z;
}
/*
-------------------------------------------------------------------------------
Returns the result of converting the canonical NaN `a' to the double-
precision floating-point format.
-------------------------------------------------------------------------------
*/
static float64 commonNaNToFloat64( commonNaNT a )
{
return
( ( (bits64) a.sign )<<63 )
| LIT64( 0x7FF8000000000000 )
| ( a.high>>12 );
}
/*
-------------------------------------------------------------------------------
Takes two double-precision floating-point values `a' and `b', one of which
is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
signaling NaN, the invalid exception is raised.
-------------------------------------------------------------------------------
*/
static float64 propagateFloat64NaN( float64 a, float64 b )
{
flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
aIsNaN = float64_is_nan( a );
aIsSignalingNaN = float64_is_signaling_nan( a );
bIsNaN = float64_is_nan( b );
bIsSignalingNaN = float64_is_signaling_nan( b );
a |= LIT64( 0x0008000000000000 );
b |= LIT64( 0x0008000000000000 );
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
if ( aIsNaN ) {
return ( aIsSignalingNaN & bIsNaN ) ? b : a;
}
else {
return b;
}
}
#ifdef FLOATX80
/*
-------------------------------------------------------------------------------
The pattern for a default generated extended double-precision NaN. The
`high' and `low' values hold the most- and least-significant bits,
respectively.
-------------------------------------------------------------------------------
*/
#define floatx80_default_nan_high 0xFFFF
#define floatx80_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF )
/*
-------------------------------------------------------------------------------
Returns 1 if the extended double-precision floating-point value `a' is a
NaN; otherwise returns 0.
-------------------------------------------------------------------------------
*/
flag floatx80_is_nan( floatx80 a )
{
return ( ( a.high & 0x7FFF ) == 0x7FFF ) && (bits64) ( a.low<<1 );
}
/*
-------------------------------------------------------------------------------
Returns 1 if the extended double-precision floating-point value `a' is a
signaling NaN; otherwise returns 0.
-------------------------------------------------------------------------------
*/
flag floatx80_is_signaling_nan( floatx80 a )
{
bits64 aLow;
aLow = a.low & ~ LIT64( 0x4000000000000000 );
return
( ( a.high & 0x7FFF ) == 0x7FFF )
&& (bits64) ( aLow<<1 )
&& ( a.low == aLow );
}
/*
-------------------------------------------------------------------------------
Returns the result of converting the extended double-precision floating-
point NaN `a' to the canonical NaN format. If `a' is a signaling NaN, the
invalid exception is raised.
-------------------------------------------------------------------------------
*/
static commonNaNT floatx80ToCommonNaN( floatx80 a )
{
commonNaNT z;
if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
z.sign = a.high>>15;
z.low = 0;
z.high = a.low<<1;
return z;
}
/*
-------------------------------------------------------------------------------
Returns the result of converting the canonical NaN `a' to the extended
double-precision floating-point format.
-------------------------------------------------------------------------------
*/
static floatx80 commonNaNToFloatx80( commonNaNT a )
{
floatx80 z;
z.low = LIT64( 0xC000000000000000 ) | ( a.high>>1 );
z.high = ( ( (bits16) a.sign )<<15 ) | 0x7FFF;
return z;
}
/*
-------------------------------------------------------------------------------
Takes two extended double-precision floating-point values `a' and `b', one
of which is a NaN, and returns the appropriate NaN result. If either `a' or
`b' is a signaling NaN, the invalid exception is raised.
-------------------------------------------------------------------------------
*/
static floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b )
{
flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
aIsNaN = floatx80_is_nan( a );
aIsSignalingNaN = floatx80_is_signaling_nan( a );
bIsNaN = floatx80_is_nan( b );
bIsSignalingNaN = floatx80_is_signaling_nan( b );
a.low |= LIT64( 0xC000000000000000 );
b.low |= LIT64( 0xC000000000000000 );
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
if ( aIsNaN ) {
return ( aIsSignalingNaN & bIsNaN ) ? b : a;
}
else {
return b;
}
}
#endif
#ifdef FLOAT128
/*
-------------------------------------------------------------------------------
The pattern for a default generated quadruple-precision NaN. The `high' and
`low' values hold the most- and least-significant bits, respectively.
-------------------------------------------------------------------------------
*/
#define float128_default_nan_high LIT64( 0xFFFFFFFFFFFFFFFF )
#define float128_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF )
/*
-------------------------------------------------------------------------------
Returns 1 if the quadruple-precision floating-point value `a' is a NaN;
otherwise returns 0.
-------------------------------------------------------------------------------
*/
flag float128_is_nan( float128 a )
{
return
( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) )
&& ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
}
/*
-------------------------------------------------------------------------------
Returns 1 if the quadruple-precision floating-point value `a' is a
signaling NaN; otherwise returns 0.
-------------------------------------------------------------------------------
*/
flag float128_is_signaling_nan( float128 a )
{
return
( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
&& ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
}
/*
-------------------------------------------------------------------------------
Returns the result of converting the quadruple-precision floating-point NaN
`a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
exception is raised.
-------------------------------------------------------------------------------
*/
static commonNaNT float128ToCommonNaN( float128 a )
{
commonNaNT z;
if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
z.sign = a.high>>63;
shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
return z;
}
/*
-------------------------------------------------------------------------------
Returns the result of converting the canonical NaN `a' to the quadruple-
precision floating-point format.
-------------------------------------------------------------------------------
*/
static float128 commonNaNToFloat128( commonNaNT a )
{
float128 z;
shift128Right( a.high, a.low, 16, &z.high, &z.low );
z.high |= ( ( (bits64) a.sign )<<63 ) | LIT64( 0x7FFF800000000000 );
return z;
}
/*
-------------------------------------------------------------------------------
Takes two quadruple-precision floating-point values `a' and `b', one of
which is a NaN, and returns the appropriate NaN result. If either `a' or
`b' is a signaling NaN, the invalid exception is raised.
-------------------------------------------------------------------------------
*/
static float128 propagateFloat128NaN( float128 a, float128 b )
{
flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
aIsNaN = float128_is_nan( a );
aIsSignalingNaN = float128_is_signaling_nan( a );
bIsNaN = float128_is_nan( b );
bIsSignalingNaN = float128_is_signaling_nan( b );
a.high |= LIT64( 0x0000800000000000 );
b.high |= LIT64( 0x0000800000000000 );
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
if ( aIsNaN ) {
return ( aIsSignalingNaN & bIsNaN ) ? b : a;
}
else {
return b;
}
}
#endif

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/*
===============================================================================
This C header file is part of the SoftFloat IEC/IEEE Floating-point
Arithmetic Package, Release 2a.
Written by John R. Hauser. This work was made possible in part by the
International Computer Science Institute, located at Suite 600, 1947 Center
Street, Berkeley, California 94704. Funding was partially provided by the
National Science Foundation under grant MIP-9311980. The original version
of this code was written as part of a project to build a fixed-point vector
processor in collaboration with the University of California at Berkeley,
overseen by Profs. Nelson Morgan and John Wawrzynek. More information
is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
arithmetic/SoftFloat.html'.
THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
Derivative works are acceptable, even for commercial purposes, so long as
(1) they include prominent notice that the work is derivative, and (2) they
include prominent notice akin to these four paragraphs for those parts of
this code that are retained.
===============================================================================
*/
/*
-------------------------------------------------------------------------------
The macro `FLOATX80' must be defined to enable the extended double-precision
floating-point format `floatx80'. If this macro is not defined, the
`floatx80' type will not be defined, and none of the functions that either
input or output the `floatx80' type will be defined. The same applies to
the `FLOAT128' macro and the quadruple-precision format `float128'.
-------------------------------------------------------------------------------
*/
#define FLOATX80
#define FLOAT128
/*
-------------------------------------------------------------------------------
Software IEC/IEEE floating-point types.
-------------------------------------------------------------------------------
*/
typedef !!!bits32 float32;
typedef !!!bits64 float64;
#ifdef FLOATX80
typedef struct {
!!!bits16 high;
!!!bits64 low;
} floatx80;
#endif
#ifdef FLOAT128
typedef struct {
!!!bits64 high, low;
} float128;
#endif
/*
-------------------------------------------------------------------------------
Software IEC/IEEE floating-point underflow tininess-detection mode.
-------------------------------------------------------------------------------
*/
extern !!!int8 float_detect_tininess;
enum {
float_tininess_after_rounding = 0,
float_tininess_before_rounding = 1
};
/*
-------------------------------------------------------------------------------
Software IEC/IEEE floating-point rounding mode.
-------------------------------------------------------------------------------
*/
extern !!!int8 float_rounding_mode;
enum {
float_round_nearest_even = 0,
float_round_to_zero = 1,
float_round_down = 2,
float_round_up = 3
};
/*
-------------------------------------------------------------------------------
Software IEC/IEEE floating-point exception flags.
-------------------------------------------------------------------------------
*/
extern !!!int8 float_exception_flags;
enum {
float_flag_inexact = 1,
float_flag_underflow = 2,
float_flag_overflow = 4,
float_flag_divbyzero = 8,
float_flag_invalid = 16
};
/*
-------------------------------------------------------------------------------
Routine to raise any or all of the software IEC/IEEE floating-point
exception flags.
-------------------------------------------------------------------------------
*/
void float_raise( !!!int8 );
/*
-------------------------------------------------------------------------------
Software IEC/IEEE integer-to-floating-point conversion routines.
-------------------------------------------------------------------------------
*/
float32 int32_to_float32( !!!int32 );
float64 int32_to_float64( !!!int32 );
#ifdef FLOATX80
floatx80 int32_to_floatx80( !!!int32 );
#endif
#ifdef FLOAT128
float128 int32_to_float128( !!!int32 );
#endif
float32 int64_to_float32( !!!int64 );
float64 int64_to_float64( !!!int64 );
#ifdef FLOATX80
floatx80 int64_to_floatx80( !!!int64 );
#endif
#ifdef FLOAT128
float128 int64_to_float128( !!!int64 );
#endif
/*
-------------------------------------------------------------------------------
Software IEC/IEEE single-precision conversion routines.
-------------------------------------------------------------------------------
*/
!!!int32 float32_to_int32( float32 );
!!!int32 float32_to_int32_round_to_zero( float32 );
!!!int64 float32_to_int64( float32 );
!!!int64 float32_to_int64_round_to_zero( float32 );
float64 float32_to_float64( float32 );
#ifdef FLOATX80
floatx80 float32_to_floatx80( float32 );
#endif
#ifdef FLOAT128
float128 float32_to_float128( float32 );
#endif
/*
-------------------------------------------------------------------------------
Software IEC/IEEE single-precision operations.
-------------------------------------------------------------------------------
*/
float32 float32_round_to_int( float32 );
float32 float32_add( float32, float32 );
float32 float32_sub( float32, float32 );
float32 float32_mul( float32, float32 );
float32 float32_div( float32, float32 );
float32 float32_rem( float32, float32 );
float32 float32_sqrt( float32 );
!!!flag float32_eq( float32, float32 );
!!!flag float32_le( float32, float32 );
!!!flag float32_lt( float32, float32 );
!!!flag float32_eq_signaling( float32, float32 );
!!!flag float32_le_quiet( float32, float32 );
!!!flag float32_lt_quiet( float32, float32 );
!!!flag float32_is_signaling_nan( float32 );
/*
-------------------------------------------------------------------------------
Software IEC/IEEE double-precision conversion routines.
-------------------------------------------------------------------------------
*/
!!!int32 float64_to_int32( float64 );
!!!int32 float64_to_int32_round_to_zero( float64 );
!!!int64 float64_to_int64( float64 );
!!!int64 float64_to_int64_round_to_zero( float64 );
float32 float64_to_float32( float64 );
#ifdef FLOATX80
floatx80 float64_to_floatx80( float64 );
#endif
#ifdef FLOAT128
float128 float64_to_float128( float64 );
#endif
/*
-------------------------------------------------------------------------------
Software IEC/IEEE double-precision operations.
-------------------------------------------------------------------------------
*/
float64 float64_round_to_int( float64 );
float64 float64_add( float64, float64 );
float64 float64_sub( float64, float64 );
float64 float64_mul( float64, float64 );
float64 float64_div( float64, float64 );
float64 float64_rem( float64, float64 );
float64 float64_sqrt( float64 );
!!!flag float64_eq( float64, float64 );
!!!flag float64_le( float64, float64 );
!!!flag float64_lt( float64, float64 );
!!!flag float64_eq_signaling( float64, float64 );
!!!flag float64_le_quiet( float64, float64 );
!!!flag float64_lt_quiet( float64, float64 );
!!!flag float64_is_signaling_nan( float64 );
#ifdef FLOATX80
/*
-------------------------------------------------------------------------------
Software IEC/IEEE extended double-precision conversion routines.
-------------------------------------------------------------------------------
*/
!!!int32 floatx80_to_int32( floatx80 );
!!!int32 floatx80_to_int32_round_to_zero( floatx80 );
!!!int64 floatx80_to_int64( floatx80 );
!!!int64 floatx80_to_int64_round_to_zero( floatx80 );
float32 floatx80_to_float32( floatx80 );
float64 floatx80_to_float64( floatx80 );
#ifdef FLOAT128
float128 floatx80_to_float128( floatx80 );
#endif
/*
-------------------------------------------------------------------------------
Software IEC/IEEE extended double-precision rounding precision. Valid
values are 32, 64, and 80.
-------------------------------------------------------------------------------
*/
extern !!!int8 floatx80_rounding_precision;
/*
-------------------------------------------------------------------------------
Software IEC/IEEE extended double-precision operations.
-------------------------------------------------------------------------------
*/
floatx80 floatx80_round_to_int( floatx80 );
floatx80 floatx80_add( floatx80, floatx80 );
floatx80 floatx80_sub( floatx80, floatx80 );
floatx80 floatx80_mul( floatx80, floatx80 );
floatx80 floatx80_div( floatx80, floatx80 );
floatx80 floatx80_rem( floatx80, floatx80 );
floatx80 floatx80_sqrt( floatx80 );
!!!flag floatx80_eq( floatx80, floatx80 );
!!!flag floatx80_le( floatx80, floatx80 );
!!!flag floatx80_lt( floatx80, floatx80 );
!!!flag floatx80_eq_signaling( floatx80, floatx80 );
!!!flag floatx80_le_quiet( floatx80, floatx80 );
!!!flag floatx80_lt_quiet( floatx80, floatx80 );
!!!flag floatx80_is_signaling_nan( floatx80 );
#endif
#ifdef FLOAT128
/*
-------------------------------------------------------------------------------
Software IEC/IEEE quadruple-precision conversion routines.
-------------------------------------------------------------------------------
*/
!!!int32 float128_to_int32( float128 );
!!!int32 float128_to_int32_round_to_zero( float128 );
!!!int64 float128_to_int64( float128 );
!!!int64 float128_to_int64_round_to_zero( float128 );
float32 float128_to_float32( float128 );
float64 float128_to_float64( float128 );
#ifdef FLOATX80
floatx80 float128_to_floatx80( float128 );
#endif
/*
-------------------------------------------------------------------------------
Software IEC/IEEE quadruple-precision operations.
-------------------------------------------------------------------------------
*/
float128 float128_round_to_int( float128 );
float128 float128_add( float128, float128 );
float128 float128_sub( float128, float128 );
float128 float128_mul( float128, float128 );
float128 float128_div( float128, float128 );
float128 float128_rem( float128, float128 );
float128 float128_sqrt( float128 );
!!!flag float128_eq( float128, float128 );
!!!flag float128_le( float128, float128 );
!!!flag float128_lt( float128, float128 );
!!!flag float128_eq_signaling( float128, float128 );
!!!flag float128_le_quiet( float128, float128 );
!!!flag float128_lt_quiet( float128, float128 );
!!!flag float128_is_signaling_nan( float128 );
#endif

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@ -0,0 +1,149 @@
$NetBSD: timesoftfloat.txt,v 1.1 2000/06/06 08:15:11 bjh21 Exp $
Documentation for the `timesoftfloat' Program of SoftFloat Release 2a
John R. Hauser
1998 December 14
-------------------------------------------------------------------------------
Introduction
The `timesoftfloat' program evaluates the speed of SoftFloat's floating-
point routines. Each routine can be evaluated for every relevant rounding
mode, tininess mode, and/or rounding precision.
-------------------------------------------------------------------------------
Contents
Introduction
Contents
Legal Notice
Executing `timesoftfloat'
Options
-help
-precision32, -precision64, -precision80
-nearesteven, -tozero, -down, -up
-tininessbefore, -tininessafter
Function Sets
-------------------------------------------------------------------------------
Legal Notice
The `timesoftfloat' program was written by John R. Hauser.
THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
-------------------------------------------------------------------------------
Executing `timesoftfloat'
The `timesoftfloat' program is intended to be invoked from a command line
interpreter as follows:
timesoftfloat [<option>...] <function>
Here square brackets ([]) indicate optional items, while angled brackets
(<>) denote parameters to be filled in. The `<function>' argument is
the name of the SoftFloat routine to evaluate, such as `float32_add' or
`float64_to_int32'. The allowed options are detailed in the next section,
_Options_. If `timesoftfloat' is executed without any arguments, a summary
of usage is written. It is also possible to evaluate all machine functions
in a single invocation as explained in the section _Function_Sets_ later in
this document.
Ordinarily, a function's speed will be evaulated separately for each of
the four rounding modes, one after the other. If the rounding mode is not
supposed to have any affect on the results of a function--for instance,
some operations do not require rounding--only the nearest/even rounding mode
is timed. In the same way, if a function is affected by the way in which
underflow tininess is detected, `timesoftfloat' times the function both with
tininess detected before rounding and after rounding. For extended double-
precision operations affected by rounding precision control, `timesoftfloat'
also times the function for all three rounding precision modes, one after
the other. Evaluation of a function can be limited to a single rounding
mode, a single tininess mode, and/or a single rounding precision with
appropriate options (see _Options_).
For each function and mode evaluated, `timesoftfloat' reports the speed of
the function in kops/s, or ``thousands of operations per second''. This
unit of measure differs from the traditional MFLOPS (``millions of floating-
point operations per second'') only in being a factor of 1000 smaller.
(1000 kops/s is exactly 1 MFLOPS.) Speeds are reported in thousands instead
of millions because software floating-point often executes at less than
1 MFLOPS.
The speeds reported by `timesoftfloat' may be affected somewhat by other
programs executing at the same time as `timesoftfloat'.
Note that the remainder operations (`float32_rem', `float64_rem',
`floatx80_rem' and `float128_rem') will be markedly slower than other
operations, particularly for extended double precision (`floatx80') and
quadruple precision (`float128'). This is inherent to the remainder
function itself and is not a failing of the SoftFloat implementation.
-------------------------------------------------------------------------------
Options
The `timesoftfloat' program accepts several command options. If mutually
contradictory options are given, the last one has priority.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-help
The `-help' option causes a summary of program usage to be written, after
which the program exits.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-precision32, -precision64, -precision80
For extended double-precision functions affected by rounding precision
control, the `-precision32' option restricts evaluation to only the cases
in which rounding precision is equivalent to single precision. The other
rounding precision options are not timed. Likewise, the `-precision64'
and `-precision80' options fix the rounding precision equivalent to double
precision or extended double precision, respectively. These options are
ignored for functions not affected by rounding precision control.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-nearesteven, -tozero, -down, -up
The `-nearesteven' option restricts evaluation to only the cases in which
the rounding mode is nearest/even. The other rounding mode options are not
timed. Likewise, `-tozero' forces rounding to zero; `-down' forces rounding
down; and `-up' forces rounding up. These options are ignored for functions
that are exact and thus do not round.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-tininessbefore, -tininessafter
The `-tininessbefore' option restricts evaluation to only the cases
detecting underflow tininess before rounding. Tininess after rounding
is not timed. Likewise, `-tininessafter' forces underflow tininess to be
detected after rounding only. These options are ignored for functions not
affected by the way in which underflow tininess is detected.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-------------------------------------------------------------------------------
Function Sets
Just as `timesoftfloat' can test an operation for all four rounding modes in
sequence, multiple operations can also be tested with a single invocation.
Three sets are recognized: `-all1', `-all2', and `-all'. The set `-all1'
comprises all one-operand functions; `-all2' is all two-operand functions;
and `-all' is all functions. A function set can be used in place of a
function name in the command line, as in
timesoftfloat [<option>...] -all