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Because the PC is not a general purpose register on aarch64, we need 

to use DWARF pseudo-register for the signal trampoline return address.

Adjust the style to match other platforms.
This commit is contained in:
thorpej 2021-11-23 02:49:55 +00:00
parent fc986dbc59
commit 445de9ccf9
2 changed files with 89 additions and 67 deletions
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67
lib/libc/arch/aarch64/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.4 2020/10/17 15:44:59 skrll Exp $
# $NetBSD: genassym.cf,v 1.5 2021/11/23 02:49:55 thorpej Exp $
#-
# Copyright (c) 2014 The NetBSD Foundation, Inc.
@ -33,40 +33,45 @@ include <sys/types.h>
include <ucontext.h>
include <setjmp.h>
define _UC_GREGS offsetof(ucontext_t, uc_mcontext.__gregs[0])
define _UC_REGS_X0 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X0])
define _UC_REGS_X1 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X1])
define _UC_REGS_X2 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X2])
define _UC_REGS_X3 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X3])
define _UC_REGS_X4 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X4])
define _UC_REGS_X5 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X5])
define _UC_REGS_X6 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X6])
define _UC_REGS_X7 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X7])
define _UC_REGS_X8 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X8])
define _UC_REGS_X9 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X9])
define _UC_REGS_X10 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X10])
define _UC_REGS_X11 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X11])
define _UC_REGS_X12 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X12])
define _UC_REGS_X13 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X13])
define _UC_REGS_X14 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X14])
define _UC_REGS_X15 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X15])
define _UC_REGS_X16 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X16])
define _UC_REGS_X17 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X17])
define _UC_REGS_X18 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X18])
define _UC_REGS_X19 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X19])
define _UC_REGS_X20 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X20])
define _UC_REGS_X21 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X21])
define _UC_REGS_X22 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X22])
define _UC_REGS_X23 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X23])
define _UC_REGS_X24 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X24])
define _UC_REGS_X25 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X25])
define _UC_REGS_X26 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X26])
define _UC_REGS_X27 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X27])
define _UC_REGS_X28 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X28])
define _UC_REGS_X29 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_X29])
define _UC_REGS_LR offsetof(ucontext_t, uc_mcontext.__gregs[_REG_LR])
define _UC_REGS_SP offsetof(ucontext_t, uc_mcontext.__gregs[_REG_SP])
define _UC_REGS_PC offsetof(ucontext_t, uc_mcontext.__gregs[_REG_PC])
define _REG_X0 _REG_X0
define _REG_X1 _REG_X1
define _REG_X2 _REG_X2
define _REG_X3 _REG_X3
define _REG_X4 _REG_X4
define _REG_X5 _REG_X5
define _REG_X6 _REG_X6
define _REG_X7 _REG_X7
define _REG_X8 _REG_X8
define _REG_X9 _REG_X9
define _REG_X10 _REG_X10
define _REG_X11 _REG_X11
define _REG_X12 _REG_X12
define _REG_X13 _REG_X13
define _REG_X14 _REG_X14
define _REG_X15 _REG_X15
define _REG_X16 _REG_X16
define _REG_X17 _REG_X17
define _REG_X18 _REG_X18
define _REG_X19 _REG_X19
define _REG_X20 _REG_X20
define _REG_X21 _REG_X21
define _REG_X22 _REG_X22
define _REG_X23 _REG_X23
define _REG_X24 _REG_X24
define _REG_X25 _REG_X25
define _REG_X26 _REG_X26
define _REG_X27 _REG_X27
define _REG_X28 _REG_X28
define _REG_X29 _REG_X29
define _REG_X30 _REG_X30
define _REG_X31 _REG_X31
define _REG_PC _REG_PC
define _JB_MAGIC_AARCH64__SETJMP _JB_MAGIC_AARCH64__SETJMP
define _JB_MAGIC_AARCH64_SETJMP _JB_MAGIC_AARCH64_SETJMP
define _JB_MAGIC sizeof(_BSD_JBSLOT_T_ [_JB_MAGIC])

89
lib/libc/arch/aarch64/sys/__sigtramp2.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: __sigtramp2.S,v 1.6 2020/10/24 07:02:20 skrll Exp $ */
/* $NetBSD: __sigtramp2.S,v 1.7 2021/11/23 02:49:56 thorpej Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@ -41,50 +41,67 @@
* ucontext structure
* sp-> siginfo structure
* and x28 points to the ucontext
*
* A DWARF pseudo-register is used for the return address from the
* signal trampoline.
*/
#if defined(__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__)
#define DWARF_SIGRETURN_REG __LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__
#else
#define DWARF_SIGRETURN_REG 96
#endif
#define CFI_OFFSET_DWARF_REG(d, r) .cfi_offset d, r * 8
#define CFI_OFFSET(r) CFI_OFFSET_DWARF_REG(r, r)
.text
.cfi_startproc simple
.cfi_signal_frame
.cfi_def_cfa _REG_X28, _UC_GREGS
CFI_OFFSET(_REG_X0)
CFI_OFFSET(_REG_X1)
CFI_OFFSET(_REG_X2)
CFI_OFFSET(_REG_X3)
CFI_OFFSET(_REG_X4)
CFI_OFFSET(_REG_X5)
CFI_OFFSET(_REG_X6)
CFI_OFFSET(_REG_X7)
CFI_OFFSET(_REG_X8)
CFI_OFFSET(_REG_X9)
CFI_OFFSET(_REG_X10)
CFI_OFFSET(_REG_X11)
CFI_OFFSET(_REG_X12)
CFI_OFFSET(_REG_X13)
CFI_OFFSET(_REG_X14)
CFI_OFFSET(_REG_X15)
CFI_OFFSET(_REG_X16)
CFI_OFFSET(_REG_X17)
CFI_OFFSET(_REG_X18)
CFI_OFFSET(_REG_X19)
CFI_OFFSET(_REG_X20)
CFI_OFFSET(_REG_X21)
CFI_OFFSET(_REG_X22)
CFI_OFFSET(_REG_X23)
CFI_OFFSET(_REG_X24)
CFI_OFFSET(_REG_X25)
CFI_OFFSET(_REG_X26)
CFI_OFFSET(_REG_X27)
CFI_OFFSET(_REG_X28)
CFI_OFFSET(_REG_X29)
CFI_OFFSET(_REG_X30) /* a.k.a. _REG_LR */
CFI_OFFSET(_REG_X31) /* a.k.a. _REG_SP */
.cfi_return_column DWARF_SIGRETURN_REG
CFI_OFFSET_DWARF_REG(DWARF_SIGRETURN_REG, _REG_PC)
/*
* The unwind entry includes the one instruction prior to the trampoline
* because the unwinder will look up (return PC - 1) while unwinding.
* Normally this would be the jump / branch, but since there isn't one in
* this case, we place an explicit nop there instead.
*/
.cfi_startproc simple
.cfi_signal_frame
.cfi_def_cfa x28, 0
.cfi_offset x0, _UC_REGS_X0
.cfi_offset x1, _UC_REGS_X1
.cfi_offset x2, _UC_REGS_X2
.cfi_offset x3, _UC_REGS_X3
.cfi_offset x4, _UC_REGS_X4
.cfi_offset x5, _UC_REGS_X5
.cfi_offset x6, _UC_REGS_X6
.cfi_offset x7, _UC_REGS_X7
.cfi_offset x8, _UC_REGS_X8
.cfi_offset x9, _UC_REGS_X9
.cfi_offset x10, _UC_REGS_X10
.cfi_offset x11, _UC_REGS_X11
.cfi_offset x12, _UC_REGS_X12
.cfi_offset x13, _UC_REGS_X13
.cfi_offset x14, _UC_REGS_X14
.cfi_offset x15, _UC_REGS_X15
.cfi_offset x16, _UC_REGS_X16
.cfi_offset x17, _UC_REGS_X17
.cfi_offset x18, _UC_REGS_X18
.cfi_offset x19, _UC_REGS_X19
.cfi_offset x20, _UC_REGS_X20
.cfi_offset x21, _UC_REGS_X21
.cfi_offset x22, _UC_REGS_X22
.cfi_offset x23, _UC_REGS_X23
.cfi_offset x24, _UC_REGS_X24
.cfi_offset x25, _UC_REGS_X25
.cfi_offset x26, _UC_REGS_X26
.cfi_offset x27, _UC_REGS_X27
.cfi_offset x28, _UC_REGS_X28
.cfi_offset x29, _UC_REGS_X29
.cfi_offset lr, _UC_REGS_LR
.cfi_offset sp, _UC_REGS_SP
nop
ENTRY_NP(__sigtramp_siginfo_2)
mov x0, x28 /* set the arg */
SYSTRAP(setcontext) /* and call setcontext */