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Implement CMP_PTE_USER_WRITE4M more accurately. 

CMP_PTE_USER_READ4M needs some more work..
This commit is contained in:
pk 1996-05-26 22:33:31 +00:00
parent 2382529ecd
commit 43b3743977
1 changed files with 6 additions and 3 deletions
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9
sys/arch/sparc/sparc/locore.s
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@ -1273,17 +1273,20 @@ Lpanic_red:
#define PTE_OF_ADDR4M(addr, pte, bad, page_offset) \
andn addr, page_offset, pte
/* note: the following misses the PPROT_RWX_RWX case */
#define CMP_PTE_USER_READ4M(pte) \
or pte, ASI_SRMMUFP_L3, pte; \
lda [pte] ASI_SRMMUFP, pte; \
and pte, 0x1f, pte; \
and pte, (SRMMU_TETYPE | SRMMU_PROT_MASK), pte; \
cmp pte, (SRMMU_TEPTE | PPROT_RX_RX)
/* note: PTE bit 4 set implies no user writes */
#define CMP_PTE_USER_WRITE4M(pte) \
or pte, ASI_SRMMUFP_L3, pte; \
lda [pte] ASI_SRMMUFP, pte; \
and pte, 0x1f, pte; \
cmp pte, (SRMMU_TEPTE | PPROT_RWX_RWX)
and pte, (SRMMU_TETYPE | 0x14), pte; \
cmp pte, (SRMMU_TEPTE | PPROT_WRITE)
#endif /* 4m */
#if defined(SUN4M) && !(defined(SUN4C) || defined(SUN4))