Map the expansion bus registers.
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parent
0df102009a
commit
41e7743573
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@ -1,4 +1,4 @@
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/* $NetBSD: ixp425.c,v 1.6 2003/10/08 14:55:04 scw Exp $ */
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/* $NetBSD: ixp425.c,v 1.7 2003/10/23 09:32:17 scw Exp $ */
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/*
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/*
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* Copyright (c) 2003
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* Copyright (c) 2003
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@ -34,7 +34,7 @@
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*/
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*/
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#include <sys/cdefs.h>
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ixp425.c,v 1.6 2003/10/08 14:55:04 scw Exp $");
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__KERNEL_RCSID(0, "$NetBSD: ixp425.c,v 1.7 2003/10/23 09:32:17 scw Exp $");
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#include <sys/param.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/systm.h>
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@ -74,6 +74,13 @@ ixp425_attach(struct ixp425_softc *sc)
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0, &sc->sc_gpio_ioh))
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0, &sc->sc_gpio_ioh))
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panic("%s: unable to map GPIO registers", sc->sc_dev.dv_xname);
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panic("%s: unable to map GPIO registers", sc->sc_dev.dv_xname);
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/*
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* Mapping for Expansion Bus Registers
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*/
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if (bus_space_map(sc->sc_iot, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
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0, &sc->sc_exp_ioh))
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panic("%s: unable to map EXP registers", sc->sc_dev.dv_xname);
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/*
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/*
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* Invoke the board-specific PCI initialization code
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* Invoke the board-specific PCI initialization code
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*/
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*/
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@ -1,4 +1,4 @@
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/* $NetBSD: ixp425var.h,v 1.5 2003/10/08 14:55:04 scw Exp $ */
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/* $NetBSD: ixp425var.h,v 1.6 2003/10/23 09:32:17 scw Exp $ */
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/*
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/*
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* Copyright (c) 2003
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* Copyright (c) 2003
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@ -58,6 +58,13 @@
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#define GPIO_CONF_READ_4(sc, reg) \
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#define GPIO_CONF_READ_4(sc, reg) \
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bus_space_read_4(sc->sc_iot, sc->sc_gpio_ioh, reg)
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bus_space_read_4(sc->sc_iot, sc->sc_gpio_ioh, reg)
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#define EXP_CSR_WRITE_4(sc, reg, data) \
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bus_space_write_4(sc->sc_iot, sc->sc_exp_ioh, \
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reg, data)
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#define EXP_CSR_READ_4(sc, reg) \
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bus_space_read_4(sc->sc_iot, sc->sc_exp_ioh, reg)
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#define PCI_CONF_LOCK(s) (s) = disable_interrupts(I32_bit)
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#define PCI_CONF_LOCK(s) (s) = disable_interrupts(I32_bit)
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#define PCI_CONF_UNLOCK(s) restore_interrupts((s))
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#define PCI_CONF_UNLOCK(s) restore_interrupts((s))
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@ -70,7 +77,8 @@ struct ixp425_softc {
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/* Handles for the various subregions. */
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/* Handles for the various subregions. */
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bus_space_handle_t sc_pci_ioh; /* PCI mem handler */
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bus_space_handle_t sc_pci_ioh; /* PCI mem handler */
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bus_space_handle_t sc_gpio_ioh; /* GPIOs handler */
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bus_space_handle_t sc_gpio_ioh; /* GPIOs handler */
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bus_space_handle_t sc_exp_ioh; /* Expansion Bus handler */
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/* Bus space, DMA, and PCI tags for the PCI bus */
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/* Bus space, DMA, and PCI tags for the PCI bus */
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struct bus_space sc_pci_iot;
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struct bus_space sc_pci_iot;
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