arm32 kernel source restructure

- These drivers have had the mainbus specific attachments removed so
    that they can be shared between arm32 busses.
  - Moved to arm32/dev
This commit is contained in:
mark 1997-10-14 18:55:49 +00:00
parent 0d79fbe5c5
commit 416b5e2fd3
9 changed files with 0 additions and 4850 deletions

File diff suppressed because it is too large Load Diff

View File

@ -1,124 +0,0 @@
/* $NetBSD: comreg.h,v 1.2 1997/01/13 00:40:59 mark Exp $ */
/*-
* Copyright (c) 1991 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)comreg.h 7.2 (Berkeley) 5/9/91
*/
#include <dev/ic/ns16550reg.h>
#define COM_FREQ 1843200 /* 16-bit baud rate divisor */
#define COM_TOLERANCE 30 /* baud rate tolerance, in 0.1% units */
/* interrupt enable register */
#define IER_ERXRDY 0x1 /* Enable receiver interrupt */
#define IER_ETXRDY 0x2 /* Enable transmitter empty interrupt */
#define IER_ERLS 0x4 /* Enable line status interrupt */
#define IER_EMSC 0x8 /* Enable modem status interrupt */
/* interrupt identification register */
#define IIR_IMASK 0xf
#define IIR_RXTOUT 0xc
#define IIR_RLS 0x6 /* Line status change */
#define IIR_RXRDY 0x4 /* Receiver ready */
#define IIR_TXRDY 0x2 /* Transmitter ready */
#define IIR_MLSC 0x0 /* Modem status */
#define IIR_NOPEND 0x1 /* No pending interrupts */
#define IIR_FIFO_MASK 0xc0 /* set if FIFOs are enabled */
/* fifo control register */
#define FIFO_ENABLE 0x01 /* Turn the FIFO on */
#define FIFO_RCV_RST 0x02 /* Reset RX FIFO */
#define FIFO_XMT_RST 0x04 /* Reset TX FIFO */
#define FIFO_DMA_MODE 0x08
#define FIFO_TRIGGER_1 0x00 /* Trigger RXRDY intr on 1 character */
#define FIFO_TRIGGER_4 0x40 /* ibid 4 */
#define FIFO_TRIGGER_8 0x80 /* ibid 8 */
#define FIFO_TRIGGER_14 0xc0 /* ibid 14 */
/* line control register */
#define LCR_DLAB 0x80 /* Divisor latch access enable */
#define LCR_SBREAK 0x40 /* Break Control */
#define LCR_PZERO 0x38 /* Space parity */
#define LCR_PONE 0x28 /* Mark parity */
#define LCR_PEVEN 0x18 /* Even parity */
#define LCR_PODD 0x08 /* Odd parity */
#define LCR_PNONE 0x00 /* No parity */
#define LCR_PENAB 0x08 /* XXX - low order bit of all parity */
#define LCR_STOPB 0x04 /* 2 stop bits per serial word */
#define LCR_8BITS 0x03 /* 8 bits per serial word */
#define LCR_7BITS 0x02 /* 7 bits */
#define LCR_6BITS 0x01 /* 6 bits */
#define LCR_5BITS 0x00 /* 5 bits */
/* modem control register */
#define MCR_LOOPBACK 0x10 /* Loop test: echos from TX to RX */
#define MCR_IENABLE 0x08 /* Out2: enables UART interrupts */
#define MCR_DRS 0x04 /* Out1: resets some internal modems */
#define MCR_RTS 0x02 /* Request To Send */
#define MCR_DTR 0x01 /* Data Terminal Ready */
/* line status register */
#define LSR_RCV_FIFO 0x80
#define LSR_TSRE 0x40 /* Transmitter empty: byte sent */
#define LSR_TXRDY 0x20 /* Transmitter buffer empty */
#define LSR_BI 0x10 /* Break detected */
#define LSR_FE 0x08 /* Framing error: bad stop bit */
#define LSR_PE 0x04 /* Parity error */
#define LSR_OE 0x02 /* Overrun, lost incoming byte */
#define LSR_RXRDY 0x01 /* Byte ready in Receive Buffer */
#define LSR_RCV_MASK 0x1f /* Mask for incoming data or error */
/* modem status register */
/* All deltas are from the last read of the MSR. */
#define MSR_DCD 0x80 /* Current Data Carrier Detect */
#define MSR_RI 0x40 /* Current Ring Indicator */
#define MSR_DSR 0x20 /* Current Data Set Ready */
#define MSR_CTS 0x10 /* Current Clear to Send */
#define MSR_DDCD 0x08 /* DCD has changed state */
#define MSR_TERI 0x04 /* RI has toggled low to high */
#define MSR_DDSR 0x02 /* DSR has changed state */
#define MSR_DCTS 0x01 /* CTS has changed state */
#define COM_NPORTS 8
/*
* WARNING: Serial console is assumed to be at COM1 address
* and CONUNIT must be 0.
*/
#ifndef CONADDR
#define CONADDR (SERIAL0_CONTROLLER_BASE)
#endif
#ifndef CONUNIT
#define CONUNIT (0)
#endif

View File

@ -1,42 +0,0 @@
/* $NetBSD: comvar.h,v 1.2 1997/01/13 00:41:00 mark Exp $ */
/*
* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Christopher G. Demetriou
* for the NetBSD Project.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
int comprobe1 __P((bus_space_tag_t, bus_space_handle_t, int));
int comintr __P((void *));
/* For other ports that use 'com' as console (alpha). */
extern int comconsaddr;
extern int comconsattached;
extern bus_space_tag_t comconstag;
extern bus_space_handle_t comconsbah;
extern tcflag_t comconscflag;
void cominit __P((bus_space_tag_t, bus_space_handle_t, int));

View File

@ -1,593 +0,0 @@
/* $NetBSD: lpt.c,v 1.15 1997/07/28 18:07:19 mark Exp $ */
/*
* Copyright (c) 1993, 1994 Charles Hannum.
* Copyright (c) 1990 William F. Jolitz, TeleMuse
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This software is a component of "386BSD" developed by
* William F. Jolitz, TeleMuse.
* 4. Neither the name of the developer nor the name "386BSD"
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS A COMPONENT OF 386BSD DEVELOPED BY WILLIAM F. JOLITZ
* AND IS INTENDED FOR RESEARCH AND EDUCATIONAL PURPOSES ONLY. THIS
* SOFTWARE SHOULD NOT BE CONSIDERED TO BE A COMMERCIAL PRODUCT.
* THE DEVELOPER URGES THAT USERS WHO REQUIRE A COMMERCIAL PRODUCT
* NOT MAKE USE OF THIS WORK.
*
* FOR USERS WHO WISH TO UNDERSTAND THE 386BSD SYSTEM DEVELOPED
* BY WILLIAM F. JOLITZ, WE RECOMMEND THE USER STUDY WRITTEN
* REFERENCES SUCH AS THE "PORTING UNIX TO THE 386" SERIES
* (BEGINNING JANUARY 1991 "DR. DOBBS JOURNAL", USA AND BEGINNING
* JUNE 1991 "UNIX MAGAZIN", GERMANY) BY WILLIAM F. JOLITZ AND
* LYNNE GREER JOLITZ, AS WELL AS OTHER BOOKS ON UNIX AND THE
* ON-LINE 386BSD USER MANUAL BEFORE USE. A BOOK DISCUSSING THE INTERNALS
* OF 386BSD ENTITLED "386BSD FROM THE INSIDE OUT" WILL BE AVAILABLE LATE 1992.
*
* THIS SOFTWARE IS PROVIDED BY THE DEVELOPER ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE DEVELOPER BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* Device Driver for AT parallel printer port
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/proc.h>
#include <sys/user.h>
#include <sys/buf.h>
#include <sys/kernel.h>
#include <sys/ioctl.h>
#include <sys/uio.h>
#include <sys/device.h>
#include <sys/conf.h>
#include <sys/syslog.h>
#include <machine/bus.h>
#include <machine/irqhandler.h>
#include <arm32/mainbus/mainbus.h>
#include <arm32/mainbus/lptreg.h>
#include "locators.h"
#define TIMEOUT hz*16 /* wait up to 16 seconds for a ready */
#define STEP hz/4
#define LPTPRI (PZERO+8)
#define LPT_BSIZE 1024
#if !defined(DEBUG) || !defined(notdef)
#define LPRINTF(a)
#else
#define LPRINTF if (lptdebug) printf a
int lptdebug = 1;
#endif
struct lpt_softc {
struct device sc_dev;
void *sc_ih;
size_t sc_count;
struct buf *sc_inbuf;
u_char *sc_cp;
int sc_spinmax;
int sc_iobase;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
int sc_irq;
u_char sc_state;
#define LPT_OPEN 0x01 /* device is open */
#define LPT_OBUSY 0x02 /* printer is busy doing output */
#define LPT_INIT 0x04 /* waiting to initialize for open */
u_char sc_flags;
#define LPT_AUTOLF 0x20 /* automatic LF on CR */
#define LPT_NOPRIME 0x40 /* don't prime on open */
#define LPT_NOINTR 0x80 /* do not use interrupt */
u_char sc_control;
u_char sc_laststatus;
};
/* XXX does not belong here */
cdev_decl(lpt);
#ifdef __BROKEN_INDIRECT_CONFIG
int lptprobe __P((struct device *, void *, void *));
#else
int lptprobe __P((struct device *, struct cfdata *, void *));
#endif
void lptattach __P((struct device *, struct device *, void *));
int lptintr __P((void *));
struct cfattach lpt_ca = {
sizeof(struct lpt_softc), lptprobe, lptattach
};
struct cfdriver lpt_cd = {
NULL, "lpt", DV_TTY
};
#define LPTUNIT(s) (minor(s) & 0x1f)
#define LPTFLAGS(s) (minor(s) & 0xe0)
#define LPS_INVERT (LPS_SELECT|LPS_NERR|LPS_NBSY|LPS_NACK)
#define LPS_MASK (LPS_SELECT|LPS_NERR|LPS_NBSY|LPS_NACK|LPS_NOPAPER)
#define NOT_READY() ((bus_space_read_1(iot, ioh, lpt_status) ^ LPS_INVERT) & LPS_MASK)
#define NOT_READY_ERR() not_ready(bus_space_read_1(iot, ioh, lpt_status), sc)
static int not_ready __P((u_char, struct lpt_softc *));
static void lptwakeup __P((void *arg));
static int pushbytes __P((struct lpt_softc *));
int lpt_port_test __P((bus_space_tag_t, bus_space_handle_t, bus_addr_t,
bus_size_t, u_char, u_char));
/*
* Internal routine to lptprobe to do port tests of one byte value.
*/
int
lpt_port_test(iot, ioh, base, off, data, mask)
bus_space_tag_t iot;
bus_space_handle_t ioh;
bus_addr_t base;
bus_size_t off;
u_char data, mask;
{
int timeout;
u_char temp;
data &= mask;
bus_space_write_1(iot, ioh, off, data);
timeout = 1000;
do {
delay(10);
temp = bus_space_read_1(iot, ioh, off) & mask;
} while (temp != data && --timeout);
LPRINTF(("lpt: port=0x%x out=0x%x in=0x%x timeout=%d\n", base + off,
data, temp, timeout));
return (temp == data);
}
/*
* Logic:
* 1) You should be able to write to and read back the same value
* to the data port. Do an alternating zeros, alternating ones,
* walking zero, and walking one test to check for stuck bits.
*
* 2) You should be able to write to and read back the same value
* to the control port lower 5 bits, the upper 3 bits are reserved
* per the IBM PC technical reference manauls and different boards
* do different things with them. Do an alternating zeros, alternating
* ones, walking zero, and walking one test to check for stuck bits.
*
* Some printers drag the strobe line down when the are powered off
* so this bit has been masked out of the control port test.
*
* XXX Some printers may not like a fast pulse on init or strobe, I
* don't know at this point, if that becomes a problem these bits
* should be turned off in the mask byte for the control port test.
*
* 3) Set the data and control ports to a value of 0
*/
int
lptprobe(parent, match, aux)
struct device *parent;
#ifdef __BROKEN_INDIRECT_CONFIG
void *match;
#else
struct cfdata *match;
#endif
void *aux;
{
struct mainbus_attach_args *mb = aux;
bus_space_tag_t iot;
bus_space_handle_t ioh;
u_long base;
u_char mask, data;
int i, rv;
#ifdef DEBUG
#define ABORT do {printf("lptprobe: mask %x data %x failed\n", mask, data); \
goto out;} while (0)
#else
#define ABORT goto out
#endif
/* We need a base address */
if (mb->mb_iobase == MAINBUSCF_BASE_DEFAULT)
return(0);
iot = mb->mb_iot;
base = mb->mb_iobase;
if (bus_space_map(iot, base, LPT_NPORTS, 0, &ioh))
return 0;
rv = 0;
mask = 0xff;
data = 0x55; /* Alternating zeros */
if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
ABORT;
data = 0xaa; /* Alternating ones */
if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
ABORT;
for (i = 0; i < CHAR_BIT; i++) { /* Walking zero */
data = ~(1 << i);
if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
ABORT;
}
for (i = 0; i < CHAR_BIT; i++) { /* Walking one */
data = (1 << i);
if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
ABORT;
}
bus_space_write_1(iot, ioh, lpt_data, 0);
bus_space_write_1(iot, ioh, lpt_control, 0);
mb->mb_iosize = LPT_NPORTS;
rv = 1;
out:
bus_space_unmap(iot, ioh, LPT_NPORTS);
return rv;
}
void
lptattach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct lpt_softc *sc = (void *)self;
struct mainbus_attach_args *mb = aux;
bus_space_tag_t iot;
bus_space_handle_t ioh;
if (mb->mb_irq != IRQUNK)
printf("\n");
else
printf(": polled\n");
sc->sc_iobase = mb->mb_iobase;
sc->sc_irq = mb->mb_irq;
sc->sc_state = 0;
iot = sc->sc_iot = mb->mb_iot;
if (bus_space_map(iot, sc->sc_iobase, LPT_NPORTS, 0, &ioh))
panic("lptattach: couldn't map I/O ports");
sc->sc_ioh = ioh;
bus_space_write_1(iot, ioh, lpt_control, LPC_NINIT);
if (mb->mb_irq != IRQUNK)
sc->sc_ih = intr_claim(mb->mb_irq, IPL_TTY, "lpt",
lptintr, sc);
}
/*
* Reset the printer, then wait until it's selected and not busy.
*/
int
lptopen(dev, flag, mode, p)
dev_t dev;
int flag;
int mode;
struct proc *p;
{
int unit = LPTUNIT(dev);
u_char flags = LPTFLAGS(dev);
struct lpt_softc *sc;
bus_space_tag_t iot;
bus_space_handle_t ioh;
u_char control;
int error;
int spin;
if (unit >= lpt_cd.cd_ndevs)
return ENXIO;
sc = lpt_cd.cd_devs[unit];
if (!sc)
return ENXIO;
if (sc->sc_irq == IRQUNK && (flags & LPT_NOINTR) == 0)
return ENXIO;
#ifdef DIAGNOSTIC
if (sc->sc_state)
printf("%s: stat=0x%x not zero\n", sc->sc_dev.dv_xname,
sc->sc_state);
#endif
if (sc->sc_state)
return EBUSY;
sc->sc_state = LPT_INIT;
sc->sc_flags = flags;
LPRINTF(("%s: open: flags=0x%x\n", sc->sc_dev.dv_xname, flags));
iot = sc->sc_iot;
ioh = sc->sc_ioh;
if ((flags & LPT_NOPRIME) == 0) {
/* assert INIT for 100 usec to start up printer */
bus_space_write_1(iot, ioh, lpt_control, LPC_SELECT);
delay(100);
}
control = LPC_SELECT | LPC_NINIT;
bus_space_write_1(iot, ioh, lpt_control, control);
/* wait till ready (printer running diagnostics) */
for (spin = 0; NOT_READY_ERR(); spin += STEP) {
if (spin >= TIMEOUT) {
sc->sc_state = 0;
return EBUSY;
}
/* wait 1/4 second, give up if we get a signal */
error = tsleep((caddr_t)sc, LPTPRI | PCATCH, "lptopen", STEP);
if (error != EWOULDBLOCK) {
sc->sc_state = 0;
return error;
}
}
if ((flags & LPT_NOINTR) == 0)
control |= LPC_IENABLE;
if (flags & LPT_AUTOLF)
control |= LPC_AUTOLF;
sc->sc_control = control;
bus_space_write_1(iot, ioh, lpt_control, control);
sc->sc_inbuf = geteblk(LPT_BSIZE);
sc->sc_count = 0;
sc->sc_state = LPT_OPEN;
if ((sc->sc_flags & LPT_NOINTR) == 0)
lptwakeup(sc);
LPRINTF(("%s: opened\n", sc->sc_dev.dv_xname));
return 0;
}
int
not_ready(status, sc)
u_char status;
struct lpt_softc *sc;
{
u_char new;
status = (status ^ LPS_INVERT) & LPS_MASK;
new = status & ~sc->sc_laststatus;
sc->sc_laststatus = status;
if (new & LPS_SELECT)
log(LOG_NOTICE, "%s: offline\n", sc->sc_dev.dv_xname);
else if (new & LPS_NOPAPER)
log(LOG_NOTICE, "%s: out of paper\n", sc->sc_dev.dv_xname);
else if (new & LPS_NERR)
log(LOG_NOTICE, "%s: output error\n", sc->sc_dev.dv_xname);
return status;
}
void
lptwakeup(arg)
void *arg;
{
struct lpt_softc *sc = arg;
int s;
s = spltty();
lptintr(sc);
splx(s);
timeout(lptwakeup, sc, STEP);
}
/*
* Close the device, and free the local line buffer.
*/
int
lptclose(dev, flag, mode, p)
dev_t dev;
int flag;
int mode;
struct proc *p;
{
int unit = LPTUNIT(dev);
struct lpt_softc *sc = lpt_cd.cd_devs[unit];
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
if (sc->sc_count)
(void) pushbytes(sc);
if ((sc->sc_flags & LPT_NOINTR) == 0)
untimeout(lptwakeup, sc);
bus_space_write_1(iot, ioh, lpt_control, LPC_NINIT);
sc->sc_state = 0;
bus_space_write_1(iot, ioh, lpt_control, LPC_NINIT);
brelse(sc->sc_inbuf);
LPRINTF(("%s: closed\n", sc->sc_dev.dv_xname));
return 0;
}
int
pushbytes(sc)
struct lpt_softc *sc;
{
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int error;
if (sc->sc_flags & LPT_NOINTR) {
int spin, tic;
u_char control = sc->sc_control;
while (sc->sc_count > 0) {
spin = 0;
while (NOT_READY()) {
if (++spin < sc->sc_spinmax)
continue;
tic = 0;
/* adapt busy-wait algorithm */
sc->sc_spinmax++;
while (NOT_READY_ERR()) {
/* exponential backoff */
tic = tic + tic + 1;
if (tic > TIMEOUT)
tic = TIMEOUT;
error = tsleep((caddr_t)sc,
LPTPRI | PCATCH, "lptpsh", tic);
if (error != EWOULDBLOCK)
return error;
}
break;
}
bus_space_write_1(iot, ioh, lpt_data, *sc->sc_cp++);
bus_space_write_1(iot, ioh, lpt_control, control | LPC_STROBE);
sc->sc_count--;
bus_space_write_1(iot, ioh, lpt_control, control);
/* adapt busy-wait algorithm */
if (spin*2 + 16 < sc->sc_spinmax)
sc->sc_spinmax--;
}
} else {
int s;
while (sc->sc_count > 0) {
/* if the printer is ready for a char, give it one */
if ((sc->sc_state & LPT_OBUSY) == 0) {
LPRINTF(("%s: write %d\n", sc->sc_dev.dv_xname,
sc->sc_count));
s = spltty();
(void) lptintr(sc);
splx(s);
}
error = tsleep((caddr_t)sc, LPTPRI | PCATCH,
"lptwrite2", 0);
if (error)
return error;
}
}
return 0;
}
/*
* Copy a line from user space to a local buffer, then call putc to get the
* chars moved to the output queue.
*/
int
lptwrite(dev, uio, flags)
dev_t dev;
struct uio *uio;
int flags;
{
struct lpt_softc *sc = lpt_cd.cd_devs[LPTUNIT(dev)];
size_t n;
int error = 0;
while ((n = min(LPT_BSIZE, uio->uio_resid)) != 0) {
uiomove(sc->sc_cp = sc->sc_inbuf->b_data, n, uio);
sc->sc_count = n;
error = pushbytes(sc);
if (error) {
/*
* Return accurate residual if interrupted or timed
* out.
*/
uio->uio_resid += sc->sc_count;
sc->sc_count = 0;
return error;
}
}
return 0;
}
/*
* Handle printer interrupts which occur when the printer is ready to accept
* another char.
*/
int
lptintr(arg)
void *arg;
{
struct lpt_softc *sc = arg;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
#if 0
if ((sc->sc_state & LPT_OPEN) == 0)
return 0;
#endif
/* is printer online and ready for output */
if (NOT_READY() && NOT_READY_ERR())
return 0;
if (sc->sc_count) {
u_char control = sc->sc_control;
/* send char */
bus_space_write_1(iot, ioh, lpt_data, *sc->sc_cp++);
bus_space_write_1(iot, ioh, lpt_control, control | LPC_STROBE);
sc->sc_count--;
bus_space_write_1(iot, ioh, lpt_control, control);
sc->sc_state |= LPT_OBUSY;
} else
sc->sc_state &= ~LPT_OBUSY;
if (sc->sc_count == 0) {
/* none, wake up the top half to get more */
wakeup((caddr_t)sc);
}
return 1;
}
int
lptioctl(dev, cmd, data, flag, p)
dev_t dev;
u_long cmd;
caddr_t data;
int flag;
struct proc *p;
{
int error = 0;
switch (cmd) {
default:
error = ENODEV;
}
return error;
}

View File

@ -1,64 +0,0 @@
/* $NetBSD: lptreg.h,v 1.4 1997/01/13 00:46:52 mark Exp $ */
/*-
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* William Jolitz.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)lptreg.h 1.1 (Berkeley) 12/19/90
*/
/*
* AT Parallel Port (for lineprinter)
* Interface port and bit definitions
* Written by William Jolitz 12/18/90
* Copyright (C) William Jolitz 1990
*/
#define lpt_data 0 /* Data to/from printer (R/W) */
#define lpt_status 1 /* Status of printer (R) */
#define LPS_NERR 0x08 /* printer no error */
#define LPS_SELECT 0x10 /* printer selected */
#define LPS_NOPAPER 0x20 /* printer out of paper */
#define LPS_NACK 0x40 /* printer no ack of data */
#define LPS_NBSY 0x80 /* printer no ack of data */
#define lpt_control 2 /* Control printer (R/W) */
#define LPC_STROBE 0x01 /* strobe data to printer */
#define LPC_AUTOLF 0x02 /* automatic linefeed */
#define LPC_NINIT 0x04 /* initialize printer */
#define LPC_SELECT 0x08 /* printer selected */
#define LPC_IENABLE 0x10 /* printer out of paper */
#define LPT_NPORTS 4

View File

@ -1,454 +0,0 @@
/* $NetBSD: rtc.c,v 1.6 1997/01/06 04:47:59 mark Exp $ */
/*
* Copyright (c) 1994-1996 Mark Brinicombe.
* Copyright (c) 1994 Brini.
* All rights reserved.
*
* This code is derived from software written for Brini by Mark Brinicombe
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Brini.
* 4. The name of the company nor the name of the author may be used to
* endorse or promote products derived from this software without specific
* prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* RiscBSD kernel project
*
* rtc.c
*
* Routines to read and write the RTC and CMOS RAM
*
* Created : 13/10/94
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/conf.h>
#include <sys/malloc.h>
#include <sys/device.h>
#include <machine/iic.h>
#include <machine/rtc.h>
struct rtc_softc {
struct device sc_dev;
int sc_flags;
#define RTC_BROKEN 1
#define RTC_OPEN 2
};
void rtcattach __P((struct device *parent, struct device *self, void *aux));
int rtcmatch __P((struct device *parent, void *match, void *aux));
/* Read a byte from CMOS RAM */
int
cmos_read(location)
int location;
{
u_char buff;
/*
* This commented code dates from when I was translating CMOS address
* from the RISCOS addresses. Now all addresses are specifed as
* actual addresses in the CMOS RAM
*/
/*
if (location > 0xF0)
return(-1);
if (location < 0xC0)
buff = location + 0x40;
else
buff = location - 0xB0;
*/
buff = location;
if (iic_control(RTC_Write, &buff, 1))
return(-1);
if (iic_control(RTC_Read, &buff, 1))
return(-1);
return(buff);
}
/* Write a byte to CMOS RAM */
int
cmos_write(location, value)
int location;
int value;
{
u_char buff[2];
/*
* This commented code dates from when I was translating CMOS address
* from the RISCOS addresses. Now all addresses are specifed as
* actual addresses in the CMOS RAM
*/
/* if (location > 0xF0)
return(-1);
if (location < 0xC0)
buff = location + 0x40;
else
buff = location - 0xB0;
*/
buff[0] = location;
buff[1] = value;
if (iic_control(RTC_Write, buff, 2))
return(-1);
return(0);
}
/* Hex to BCD and BCD to hex conversion routines */
static __inline int
hexdectodec(n)
u_char n;
{
return(((n >> 4) & 0x0F) * 10 + (n & 0x0F));
}
static __inline int
dectohexdec(n)
u_char n;
{
return(((n / 10) << 4) + (n % 10));
}
/* Write the RTC data from an 8 byte buffer */
int
rtc_write(rtc)
rtc_t *rtc;
{
u_char buff[8];
buff[0] = 1;
buff[1] = dectohexdec(rtc->rtc_centi);
buff[2] = dectohexdec(rtc->rtc_sec);
buff[3] = dectohexdec(rtc->rtc_min);
buff[4] = dectohexdec(rtc->rtc_hour) & 0x3f;
buff[5] = dectohexdec(rtc->rtc_day);
buff[6] = dectohexdec(rtc->rtc_mon);
if (iic_control(RTC_Write, buff, 7))
return(0);
cmos_write(RTC_ADDR_YEAR, rtc->rtc_year);
cmos_write(RTC_ADDR_CENT, rtc->rtc_cen);
return(1);
}
/* Read the RTC data into a 8 byte buffer */
int
rtc_read(rtc)
rtc_t *rtc;
{
u_char buff[8];
int byte;
buff[0] = 0;
if (iic_control(RTC_Write, buff, 1))
return(0);
if (iic_control(RTC_Read, buff, 8))
return(0);
rtc->rtc_micro = 0;
rtc->rtc_centi = hexdectodec(buff[1] & 0xff);
rtc->rtc_sec = hexdectodec(buff[2] & 0x7f);
rtc->rtc_min = hexdectodec(buff[3] & 0x7f);
rtc->rtc_hour = hexdectodec(buff[4] & 0x3f);
/* If in 12 hour mode need to look at the AM/PM flag */
if (buff[4] & 0x80)
rtc->rtc_hour += (buff[4] & 0x40) ? 12 : 0;
rtc->rtc_day = hexdectodec(buff[5] & 0x3f);
rtc->rtc_mon = hexdectodec(buff[6] & 0x1f);
byte = cmos_read(RTC_ADDR_YEAR);
if (byte == -1)
return(0);
rtc->rtc_year = byte;
byte = cmos_read(RTC_ADDR_CENT);
if (byte == -1)
return(0);
rtc->rtc_cen = byte;
return(1);
}
struct cfattach rtc_ca = {
sizeof(struct rtc_softc), rtcmatch, rtcattach
};
struct cfdriver rtc_cd = {
NULL, "rtc", DV_DULL, 0
};
int
rtcmatch(parent, match, aux)
struct device *parent;
void *match;
void *aux;
{
/* struct iicbus_attach_args *ib = aux;*/
return(1);
}
void
rtcattach(parent, self, aux)
struct device *parent;
struct device *self;
void *aux;
{
struct rtc_softc *sc = (struct rtc_softc *)self;
struct iicbus_attach_args *ib = aux;
u_char buff[1];
sc->sc_flags |= RTC_BROKEN;
if ((ib->ib_addr & IIC_PCF8583_MASK) == IIC_PCF8583_ADDR) {
printf(": PCF8583");
buff[0] = 0;
if (iic_control(RTC_Write, buff, 1))
return;
if (iic_control(RTC_Read, buff, 1))
return;
printf(" clock base ");
switch (buff[0] & 0x30) {
case 0x00:
printf("32.768KHz");
break;
case 0x10:
printf("50Hz");
break;
case 0x20:
printf("event");
break;
case 0x30:
printf("test mode");
break;
}
if (buff[0] & 0x80)
printf(" stopped");
if (buff[0] & 0x04)
printf(" alarm enabled");
sc->sc_flags &= ~RTC_BROKEN;
}
/*
* Initialise the time of day register.
* This is normally left to the filing system to do but not all
* filing systems call it e.g. cd9660
*/
inittodr(0);
printf("\n");
}
int
rtcopen(dev, flag, mode, p)
dev_t dev;
int flag;
int mode;
struct proc *p;
{
struct rtc_softc *sc;
int unit = minor(dev);
if (unit >= rtc_cd.cd_ndevs)
return(ENXIO);
sc = rtc_cd.cd_devs[unit];
if (!sc) return(ENXIO);
if (sc->sc_flags & RTC_BROKEN) return(ENXIO);
if (sc->sc_flags & RTC_OPEN) return(EBUSY);
sc->sc_flags |= RTC_OPEN;
return(0);
}
int
rtcclose(dev, flag, mode, p)
dev_t dev;
int flag;
int mode;
struct proc *p;
{
int unit = minor(dev);
struct rtc_softc *sc = rtc_cd.cd_devs[unit];
sc->sc_flags &= ~RTC_OPEN;
return(0);
}
int
rtcread(dev, uio, flag)
dev_t dev;
struct uio *uio;
int flag;
{
rtc_t rtc;
int s;
char buffer[32];
int length;
s = splclock();
if (rtc_read(&rtc) == 0) {
(void)splx(s);
return(ENXIO);
}
(void)splx(s);
sprintf(buffer, "%02d:%02d:%02d.%02d%02d %02d/%02d/%02d%02d\n",
rtc.rtc_hour, rtc.rtc_min, rtc.rtc_sec, rtc.rtc_centi,
rtc.rtc_micro, rtc.rtc_day, rtc.rtc_mon, rtc.rtc_cen,
rtc.rtc_year);
if (uio->uio_offset > strlen(buffer))
return 0;
length = strlen(buffer) - uio->uio_offset;
if (length > uio->uio_resid)
length = uio->uio_resid;
return(uiomove((caddr_t)buffer, length, uio));
}
static int
twodigits(buffer, pos)
char *buffer;
int pos;
{
int result = 0;
if (buffer[pos] >= '0' && buffer[pos] <= '9')
result = (buffer[pos] - '0') * 10;
if (buffer[pos+1] >= '0' && buffer[pos+1] <= '9')
result += (buffer[pos+1] - '0');
return(result);
}
int
rtcwrite(dev, uio, flag)
dev_t dev;
struct uio *uio;
int flag;
{
rtc_t rtc;
int s;
char buffer[25];
int length;
int error;
/*
* We require atomic updates!
*/
length = uio->uio_resid;
if (uio->uio_offset || (length != sizeof(buffer)
&& length != sizeof(buffer - 1)))
return(EINVAL);
if ((error = uiomove((caddr_t)buffer, sizeof(buffer), uio)))
return(error);
if (length == sizeof(buffer) && buffer[sizeof(buffer) - 1] != '\n')
return(EINVAL);
printf("rtcwrite: %s\n", buffer);
rtc.rtc_micro = 0;
rtc.rtc_centi = twodigits(buffer, 9);
rtc.rtc_sec = twodigits(buffer, 6);
rtc.rtc_min = twodigits(buffer, 3);
rtc.rtc_hour = twodigits(buffer, 0);
rtc.rtc_day = twodigits(buffer, 14);
rtc.rtc_mon = twodigits(buffer, 17);
rtc.rtc_year = twodigits(buffer, 22);
rtc.rtc_cen = twodigits(buffer, 20);
s = splclock();
rtc_write(&rtc);
(void)splx(s);
return(0);
}
int
rtcioctl(dev, cmd, data, flag, p)
dev_t dev;
int cmd;
caddr_t data;
int flag;
struct proc *p;
{
/* struct rtc_softc *sc = rtc_cd.cd_devs[minor(dev)];*/
/* switch (cmd) {
case RTCIOC_READ:
return(0);
}*/
return(EINVAL);
}
/* End of rtc.c */

File diff suppressed because it is too large Load Diff

View File

@ -1,163 +0,0 @@
/* $NetBSD: wdreg.h,v 1.2 1997/02/04 02:04:55 mark Exp $ */
/*-
* Copyright (c) 1991 The Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* William Jolitz.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)wdreg.h 7.1 (Berkeley) 5/9/91
* from: wdreg.h,v 1.13 1995/03/29 21:56:46 briggs Exp
*/
/*
* Disk Controller register definitions.
*/
#define wd_data 0x000 /* data register (R/W - 16 bits) */
#define wd_error 0x001 /* error register (R) */
#define wd_precomp 0x001 /* write precompensation (W) */
#define wd_features 0x001 /* features (W) */
#define wd_seccnt 0x002 /* sector count (R/W) */
#define wd_sector 0x003 /* first sector number (R/W) */
#define wd_cyl_lo 0x004 /* cylinder address, low byte (R/W) */
#define wd_cyl_hi 0x005 /* cylinder address, high byte (R/W) */
#define wd_sdh 0x006 /* sector size/drive/head (R/W) */
#define wd_command 0x007 /* command register (W) */
#define wd_status 0x007 /* immediate status (R) */
#define WD_ALTSTATUS 0x206 /* base offset for alt status */
#define wd_altsts 0x000 /* alternate fixed disk status (via 1015) (R) */
#define wd_ctlr 0x000 /* fixed disk controller control (via 1015) (W) */
#define WDCTL_4BIT 0x08 /* use four head bits (wd1003) */
#define WDCTL_RST 0x04 /* reset the controller */
#define WDCTL_IDS 0x02 /* disable controller interrupts */
#define wd_digin 0x001 /* disk controller input (via 1015) (R) */
/*
* Status bits.
*/
#define WDCS_BSY 0x80 /* busy */
#define WDCS_DRDY 0x40 /* drive ready */
#define WDCS_DWF 0x20 /* drive write fault */
#define WDCS_DSC 0x10 /* drive seek complete */
#define WDCS_DRQ 0x08 /* data request */
#define WDCS_CORR 0x04 /* corrected data */
#define WDCS_IDX 0x02 /* index */
#define WDCS_ERR 0x01 /* error */
#define WDCS_BITS "\020\010bsy\007drdy\006dwf\005dsc\004drq\003corr\002idx\001err"
/*
* Error bits.
*/
#define WDCE_BBK 0x80 /* bad block detected */
#define WDCE_UNC 0x40 /* uncorrectable data error */
#define WDCE_MC 0x20 /* media changed */
#define WDCE_IDNF 0x10 /* id not found */
#define WDCE_ABRT 0x08 /* aborted command */
#define WDCE_MCR 0x04 /* media change requested */
#define WDCE_TK0NF 0x02 /* track 0 not found */
#define WDCE_AMNF 0x01 /* address mark not found */
#define WDERR_BITS "\020\010bbk\007unc\006mc\005idnf\004mcr\003abrt\002tk0nf\001amnf"
/*
* Commands for Disk Controller.
*/
#define WDCC_RECAL 0x10 /* disk restore code -- resets cntlr */
#define WDCC_READ 0x20 /* disk read code */
#define WDCC_WRITE 0x30 /* disk write code */
#define WDCC__LONG 0x02 /* modifier -- access ecc bytes */
#define WDCC__NORETRY 0x01 /* modifier -- no retrys */
#define WDCC_FORMAT 0x50 /* disk format code */
#define WDCC_DIAGNOSE 0x90 /* controller diagnostic */
#define WDCC_IDP 0x91 /* initialize drive parameters */
#define WDCC_READMULTI 0xc4 /* read multiple */
#define WDCC_WRITEMULTI 0xc5 /* write multiple */
#define WDCC_SETMULTI 0xc6 /* set multiple mode */
#define WDCC_READDMA 0xc8 /* read with DMA */
#define WDCC_WRITEDMA 0xca /* write with DMA */
#define WDCC_ACKMC 0xdb /* acknowledge media change */
#define WDCC_LOCK 0xde /* lock drawer */
#define WDCC_UNLOCK 0xdf /* unlock drawer */
#define WDCC_IDENTIFY 0xec /* read parameters from controller */
#define WDCC_CACHEC 0xef /* cache control */
#define WDSD_IBM 0xa0 /* forced to 512 byte sector, ecc */
#define WDSD_CHS 0x00 /* cylinder/head/sector addressing */
#define WDSD_LBA 0x40 /* logical block addressing */
#ifdef _KERNEL
/*
* read parameters command returns this:
*/
struct wdparams {
/* drive info */
short wdp_config; /* general configuration */
#define WD_CFG_REMOVABLE 0x0080
#define WD_CFG_FIXED 0x0040
short wdp_cylinders; /* number of non-removable cylinders */
char __reserved1[2];
short wdp_heads; /* number of heads */
short wdp_unfbytespertrk; /* number of unformatted bytes/track */
short wdp_unfbytespersec; /* number of unformatted bytes/sector */
short wdp_sectors; /* number of sectors */
char wdp_vendor1[6];
/* controller info */
char wdp_serial[20]; /* serial number */
short wdp_buftype; /* buffer type */
#define WD_BUF_SINGLEPORTSECTOR 1 /* single port, single sector buffer */
#define WD_BUF_DUALPORTMULTI 2 /* dual port, multiple sector buffer */
#define WD_BUF_DUALPORTMULTICACHE 3 /* above plus track cache */
short wdp_bufsize; /* buffer size, in 512-byte units */
short wdp_eccbytes; /* ecc bytes appended */
char wdp_revision[8]; /* firmware revision */
char wdp_model[40]; /* model name */
u_char wdp_maxmulti; /* maximum sectors per interrupt */
char wdp_vendor2[1];
short wdp_usedmovsd; /* can use double word read/write? */
char wdp_vendor3[1];
char wdp_capabilities; /* capability flags */
#define WD_CAP_LBA 0x02
#define WD_CAP_DMA 0x01
char __reserved2[2];
char wdp_vendor4[1];
char wdp_piotiming; /* PIO timing mode */
char wdp_vendor5[1];
char wdp_dmatiming; /* DMA timing mode */
};
#endif /* _KERNEL */

View File

@ -1,73 +0,0 @@
/* $NetBSD: wdvar.h,v 1.1 1997/02/04 02:04:51 mark Exp $ */
/*-
* Copyright (c) 1991 The Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* William Jolitz.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)wdreg.h 7.1 (Berkeley) 5/9/91
*/
struct wdc_softc {
struct device sc_dev;
void *sc_ih;
bus_space_tag_t sc_iot; /* Bus space tag */
bus_space_handle_t sc_ioh; /* handle for drive registers */
bus_space_handle_t sc_auxioh; /* handle for aux register */
bus_space_handle_t sc_dataioh; /* handle for 16 bit data */
bus_space_handle_t sc_data32ioh;/* handle for 32 bit data */
void (*sc_inten)(struct wdc_softc *, int);
int sc_drq; /* DMA channel */
TAILQ_HEAD(drivehead, wd_softc) sc_drives;
int sc_flags;
#define WDCF_ACTIVE 0x01 /* controller is active */
#define WDCF_SINGLE 0x02 /* sector at a time mode */
#define WDCF_ERROR 0x04 /* processing a disk error */
#define WDCF_WANTED 0x08 /* XXX locking for wd_get_parms() */
#define WDCF_QUIET 0x10 /* Be quiet about errors */
#define WDCF_32BIT 0x20 /* Use 32bit xfers */
int sc_errors; /* errors during current transfer */
u_char sc_status; /* copy of status register */
u_char sc_error; /* copy of error register */
};
int wdcprobe_internal __P((bus_space_tag_t iot, bus_space_handle_t ioh,
bus_space_handle_t aux_ioh, bus_space_handle_t data_ioh,
bus_space_handle_t data32_ioh, char *name));
void wdcattach_internal __P((struct wdc_softc *wdc, bus_space_tag_t iot, bus_space_handle_t ioh,
bus_space_handle_t aux_ioh, bus_space_handle_t data_ioh,
bus_space_handle_t data32_ioh, int drq));