TurboChannel bus_mem_* functions. bus_mem_{read,write}_8, and
bus_mem_read_{1,2} are not yet supported for sparse space.
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264
sys/arch/alpha/tc/tc_bus_mem.c
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264
sys/arch/alpha/tc/tc_bus_mem.c
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/* $NetBSD: tc_bus_mem.c,v 1.1 1996/05/18 00:00:51 cgd Exp $ */
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/*
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* Copyright (c) 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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/*
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* Common TurboChannel Chipset "bus memory" functions.
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*/
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#include <sys/param.h>
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#include <sys/malloc.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <vm/vm.h>
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#include <machine/bus.h>
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#include <dev/tc/tcvar.h>
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int tc_mem_map __P((void *, bus_mem_addr_t, bus_mem_size_t,
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int, bus_mem_handle_t *));
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void tc_mem_unmap __P((void *, bus_mem_handle_t,
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bus_mem_size_t));
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u_int8_t tc_mem_read_1 __P((void *, bus_mem_handle_t,
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bus_mem_size_t));
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u_int16_t tc_mem_read_2 __P((void *, bus_mem_handle_t,
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bus_mem_size_t));
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u_int32_t tc_mem_read_4 __P((void *, bus_mem_handle_t,
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bus_mem_size_t));
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u_int64_t tc_mem_read_8 __P((void *, bus_mem_handle_t,
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bus_mem_size_t));
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void tc_mem_write_1 __P((void *, bus_mem_handle_t,
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bus_mem_size_t, u_int8_t));
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void tc_mem_write_2 __P((void *, bus_mem_handle_t,
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bus_mem_size_t, u_int16_t));
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void tc_mem_write_4 __P((void *, bus_mem_handle_t,
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bus_mem_size_t, u_int32_t));
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void tc_mem_write_8 __P((void *, bus_mem_handle_t,
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bus_mem_size_t, u_int64_t));
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void
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tc_bus_mem_init(bc, memv)
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bus_chipset_tag_t bc;
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void *memv;
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{
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bc->bc_m_v = memv;
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bc->bc_m_map = tc_mem_map;
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bc->bc_m_unmap = tc_mem_unmap;
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bc->bc_mr1 = tc_mem_read_1;
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bc->bc_mr2 = tc_mem_read_2;
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bc->bc_mr4 = tc_mem_read_4;
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bc->bc_mr8 = tc_mem_read_8;
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bc->bc_mw1 = tc_mem_write_1;
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bc->bc_mw2 = tc_mem_write_2;
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bc->bc_mw4 = tc_mem_write_4;
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bc->bc_mw8 = tc_mem_write_8;
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}
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int
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tc_mem_map(v, memaddr, memsize, cacheable, memhp)
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void *v;
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bus_mem_addr_t memaddr;
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bus_mem_size_t memsize;
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int cacheable;
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bus_mem_handle_t *memhp;
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{
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if (memaddr & 0x7)
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panic("tc_mem_map needs 8 byte alignment");
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if (cacheable)
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*memhp = phystok0seg(memaddr);
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else
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*memhp = phystok0seg(TC_DENSE_TO_SPARSE(memaddr));
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return (0);
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}
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void
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tc_mem_unmap(v, memh, memsize)
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void *v;
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bus_mem_handle_t memh;
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bus_mem_size_t memsize;
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{
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/* XXX nothing to do. */
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}
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u_int8_t
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tc_mem_read_1(v, memh, off)
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void *v;
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bus_mem_handle_t memh;
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bus_mem_size_t off;
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{
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volatile u_int8_t *p;
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if ((memh & TC_SPACE_SPARSE) != 0)
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panic("tc_mem_read_1 not implemented for sparse space");
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p = (u_int8_t *)(memh + off);
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return (*p);
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}
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u_int16_t
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tc_mem_read_2(v, memh, off)
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void *v;
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bus_mem_handle_t memh;
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bus_mem_size_t off;
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{
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volatile u_int16_t *p;
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if ((memh & TC_SPACE_SPARSE) != 0)
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panic("tc_mem_read_2 not implemented for sparse space");
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p = (u_int16_t *)(memh + off);
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return (*p);
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}
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u_int32_t
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tc_mem_read_4(v, memh, off)
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void *v;
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bus_mem_handle_t memh;
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bus_mem_size_t off;
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{
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volatile u_int32_t *p;
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if ((memh & TC_SPACE_SPARSE) != 0)
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/* Nothing special to do for 4-byte sparse space accesses */
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p = (u_int32_t *)(memh + (off << 1));
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else
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p = (u_int32_t *)(memh + off);
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return (*p);
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}
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u_int64_t
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tc_mem_read_8(v, memh, off)
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void *v;
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bus_mem_handle_t memh;
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bus_mem_size_t off;
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{
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volatile u_int64_t *p;
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if ((memh & TC_SPACE_SPARSE) != 0)
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panic("tc_mem_read_8 not implemented for sparse space");
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p = (u_int64_t *)(memh + off);
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return (*p);
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}
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void
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tc_mem_write_1(v, memh, off, val)
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void *v;
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bus_mem_handle_t memh;
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bus_mem_size_t off;
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u_int8_t val;
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{
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if ((memh & TC_SPACE_SPARSE) != 0) {
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volatile u_int64_t *p, v;
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u_int64_t shift, msk;
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shift = off & 0x3;
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off &= 0x3;
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p = (u_int64_t *)(memh + (off << 1));
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msk = ~(0x1 << shift) & 0xf;
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v = (msk << 32) | (((u_int64_t)val) << (shift * 8));
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*p = val;
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} else {
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volatile u_int8_t *p;
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p = (u_int8_t *)(memh + off);
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*p = val;
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}
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}
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void
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tc_mem_write_2(v, memh, off, val)
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void *v;
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bus_mem_handle_t memh;
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bus_mem_size_t off;
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u_int16_t val;
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{
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if ((memh & TC_SPACE_SPARSE) != 0) {
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volatile u_int64_t *p, v;
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u_int64_t shift, msk;
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shift = off & 0x2;
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off &= 0x3;
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p = (u_int64_t *)(memh + (off << 1));
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msk = ~(0x3 << shift) & 0xf;
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v = (msk << 32) | (((u_int64_t)val) << (shift * 8));
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*p = val;
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} else {
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volatile u_int16_t *p;
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p = (u_int16_t *)(memh + off);
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*p = val;
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}
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}
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void
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tc_mem_write_4(v, memh, off, val)
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void *v;
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bus_mem_handle_t memh;
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bus_mem_size_t off;
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u_int32_t val;
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{
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volatile u_int32_t *p;
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if ((memh & TC_SPACE_SPARSE) != 0)
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/* Nothing special to do for 4-byte sparse space accesses */
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p = (u_int32_t *)(memh + (off << 1));
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else
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p = (u_int32_t *)(memh + off);
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*p = val;
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}
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void
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tc_mem_write_8(v, memh, off, val)
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void *v;
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bus_mem_handle_t memh;
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bus_mem_size_t off;
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u_int64_t val;
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{
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volatile u_int64_t *p;
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if ((memh & TC_SPACE_SPARSE) != 0)
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panic("tc_mem_read_8 not implemented for sparse space");
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p = (u_int64_t *)(memh + off);
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*p = val;
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}
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