A large number of changes to enable PIC support and shared libraries
for NetBSD/vax.
This commit is contained in:
matt
parent
aca741cc61
commit
40b1bb9563
3
gnu/dist/gcc/config/vax/netbsd.h
vendored
3
gnu/dist/gcc/config/vax/netbsd.h
vendored
@ -24,3 +24,6 @@
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/* Until they use ELF or something that handles dwarf2 unwinds
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and initialization stuff better. */
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#undef DWARF2_UNWIND_INFO
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#undef TARGET_DEFAULT
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#define TARGET_DEFAULT 16 /* default to half-pic mode */
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374
gnu/dist/gcc/config/vax/vax.c
vendored
374
gnu/dist/gcc/config/vax/vax.c
vendored
@ -18,8 +18,9 @@ along with GNU CC; see the file COPYING. If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "config.h"
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#include <stdio.h>
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#include "config.h"
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#include "system.h"
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#include "rtl.h"
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#include "regs.h"
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#include "hard-reg-set.h"
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@ -139,7 +140,10 @@ print_operand_address (file, addr)
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addr = XEXP (addr, 1);
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}
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else
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abort ();
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{
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debug_rtx(addr);
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abort ();
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}
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if (GET_CODE (addr) == REG)
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{
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@ -162,7 +166,10 @@ print_operand_address (file, addr)
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else if (GET_CODE (XEXP (addr, 0)) == CONST_INT)
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offset = plus_constant (offset, INTVAL (XEXP (addr, 0)));
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else
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abort ();
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{
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debug_rtx(addr);
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abort ();
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}
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}
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offset = XEXP (addr, 0);
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}
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@ -210,10 +217,16 @@ print_operand_address (file, addr)
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ireg = XEXP (addr, 1);
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}
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else
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abort ();
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{
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debug_rtx(addr);
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abort ();
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}
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}
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else
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abort ();
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{
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debug_rtx(addr);
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abort ();
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}
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/* If REG1 is non-zero, figure out if it is a base or index register. */
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if (reg1)
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@ -651,6 +664,357 @@ check_float_value (mode, d, overflow)
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return 0;
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}
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/* Nonzero if X is a hard reg that can be used as an index. */
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#define XREG_OK_FOR_INDEX_P(X, STRICT) (!(STRICT) || REGNO_OK_FOR_INDEX_P (REGNO (X)))
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/* Nonzero if X is a hard reg that can be used as a base reg. */
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#define XREG_OK_FOR_BASE_P(X, STRICT) (!(STRICT) || REGNO_OK_FOR_BASE_P (REGNO (X)))
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#ifdef NO_EXTERNAL_INDIRECT_ADDRESS
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/* Zero if this contains a (CONST (PLUS (SYMBOL_REF) (...))) and the
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symbol in the SYMBOL_REF is an external symbol. */
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#define INDIRECTABLE_CONSTANT_P(X) \
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(! (GET_CODE ((X)) == CONST \
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&& GET_CODE (XEXP ((X), 0)) == PLUS \
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&& GET_CODE (XEXP (XEXP ((X), 0), 0)) == SYMBOL_REF \
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&& SYMBOL_REF_FLAG (XEXP (XEXP ((X), 0), 0))))
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/* Re-definition of CONSTANT_ADDRESS_P, which is true only when there
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are no SYMBOL_REFs for external symbols present. */
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#define INDIRECTABLE_CONSTANT_ADDRESS_P(X) \
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(GET_CODE (X) == LABEL_REF \
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|| (GET_CODE (X) == SYMBOL_REF && !SYMBOL_REF_FLAG (X)) \
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|| (GET_CODE (X) == CONST && INDIRECTABLE_CONSTANT_P(X)) \
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|| GET_CODE (X) == CONST_INT)
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/* Non-zero if X is an address which can be indirected. External symbols
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could be in a sharable image library, so we disallow those. */
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#define INDIRECTABLE_ADDRESS_P(X, STRICT) \
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(INDIRECTABLE_CONSTANT_ADDRESS_P (X) \
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|| (GET_CODE (X) == REG && XREG_OK_FOR_BASE_P (X, STRICT)) \
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|| (GET_CODE (X) == PLUS \
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&& GET_CODE (XEXP (X, 0)) == REG \
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&& XREG_OK_FOR_BASE_P (XEXP (X, 0), STRICT) \
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&& INDIRECTABLE_CONSTANT_ADDRESS_P (XEXP (X, 1))))
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#else /* not NO_EXTERNAL_INDIRECT_ADDRESS */
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#define INDIRECTABLE_CONSTANT_P(X) \
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(! (GET_CODE ((X)) == CONST \
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&& GET_CODE (XEXP ((X), 0)) == PLUS \
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&& GET_CODE (XEXP (XEXP ((X), 0), 0)) == SYMBOL_REF))
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#define INDIRECTABLE_CONSTANT_ADDRESS_P(X) \
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(!(flag_pic || TARGET_HALFPIC) ? CONSTANT_ADDRESS_P(X) \
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: (GET_CODE (X) == LABEL_REF \
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|| GET_CODE (X) == SYMBOL_REF \
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|| (GET_CODE (X) == CONST && INDIRECTABLE_CONSTANT_P (X)) \
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|| GET_CODE (X) == CONST_INT))
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/* Non-zero if X is an address which can be indirected. */
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#define INDIRECTABLE_ADDRESS_P(X, STRICT) \
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(INDIRECTABLE_CONSTANT_ADDRESS_P (X) \
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|| (GET_CODE (X) == REG && XREG_OK_FOR_BASE_P (X, STRICT)) \
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|| (GET_CODE (X) == PLUS \
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&& GET_CODE (XEXP (X, 0)) == REG \
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&& XREG_OK_FOR_BASE_P (XEXP (X, 0), STRICT) \
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&& GET_CODE (XEXP (X, 1)) != SYMBOL_REF \
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&& ((flag_pic || TARGET_HALFPIC) \
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? GET_CODE (XEXP (X, 1)) == CONST_INT \
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: INDIRECTABLE_CONSTANT_ADDRESS_P (XEXP (X, 1)))) \
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|| (GET_CODE (X) == PLUS \
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&& GET_CODE (XEXP (X, 1)) == REG \
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&& XREG_OK_FOR_BASE_P (XEXP (X, 1), STRICT) \
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&& GET_CODE (XEXP (X, 0)) != SYMBOL_REF \
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&& ((flag_pic || TARGET_HALFPIC) \
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? GET_CODE (XEXP (X, 0)) == CONST_INT \
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: INDIRECTABLE_CONSTANT_ADDRESS_P (XEXP (X, 1)))))
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#endif /* not NO_EXTERNAL_INDIRECT_ADDRESS */
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/* Go to ADDR if X is a valid address not using indexing.
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(This much is the easy part.) */
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#define GO_IF_NONINDEXED_ADDRESS(X, ADDR, STRICT) \
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{ register rtx xfoob = (X); \
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if (GET_CODE (X) == REG) \
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{ \
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extern rtx *reg_equiv_mem; \
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if (! reload_in_progress \
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|| (xfoob = reg_equiv_mem[REGNO (X)]) == 0 \
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|| INDIRECTABLE_ADDRESS_P (xfoob, STRICT)) \
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goto ADDR; \
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} \
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if (INDIRECTABLE_CONSTANT_ADDRESS_P (X)) goto ADDR; \
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if (INDIRECTABLE_ADDRESS_P (X, STRICT)) goto ADDR; \
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xfoob = XEXP (X, 0); \
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if (GET_CODE (X) == MEM && INDIRECTABLE_ADDRESS_P (xfoob, STRICT)) \
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goto ADDR; \
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if ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_INC) \
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&& GET_CODE (xfoob) == REG \
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&& XREG_OK_FOR_BASE_P (xfoob, STRICT)) \
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goto ADDR; }
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/* 1 if PROD is either a reg times size of mode MODE
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or just a reg, if MODE is just one byte.
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This macro's expansion uses the temporary variables xfoo0 and xfoo1
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that must be declared in the surrounding context. */
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#define INDEX_TERM_P(PROD, MODE, STRICT) \
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(GET_MODE_SIZE (MODE) == 1 \
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? (GET_CODE (PROD) == REG && XREG_OK_FOR_BASE_P (PROD, STRICT)) \
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: (GET_CODE (PROD) == MULT \
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&& \
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(xfoo0 = XEXP (PROD, 0), xfoo1 = XEXP (PROD, 1), \
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((GET_CODE (xfoo0) == CONST_INT \
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&& INTVAL (xfoo0) == GET_MODE_SIZE (MODE) \
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&& GET_CODE (xfoo1) == REG \
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&& XREG_OK_FOR_INDEX_P (xfoo1, STRICT)) \
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|| \
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(GET_CODE (xfoo1) == CONST_INT \
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&& INTVAL (xfoo1) == GET_MODE_SIZE (MODE) \
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&& GET_CODE (xfoo0) == REG \
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&& XREG_OK_FOR_INDEX_P (xfoo0, STRICT))))))
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/* Go to ADDR if X is the sum of a register
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and a valid index term for mode MODE. */
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#define GO_IF_REG_PLUS_INDEX(X, MODE, ADDR, STRICT) \
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{ register rtx xfooa; \
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if (GET_CODE (X) == PLUS) \
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{ if (GET_CODE (XEXP (X, 0)) == REG \
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&& XREG_OK_FOR_BASE_P (XEXP (X, 0), STRICT) \
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&& (xfooa = XEXP (X, 1), \
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INDEX_TERM_P (xfooa, MODE, STRICT))) \
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goto ADDR; \
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if (GET_CODE (XEXP (X, 1)) == REG \
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&& XREG_OK_FOR_BASE_P (XEXP (X, 1), STRICT) \
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&& (xfooa = XEXP (X, 0), \
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INDEX_TERM_P (xfooa, MODE, STRICT))) \
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goto ADDR; } }
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#define GO_IF_LEGITIMATE_ADDRESS2(MODE, X, ADDR, STRICT) \
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{ register rtx xfoo, xfoo0, xfoo1; \
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GO_IF_NONINDEXED_ADDRESS (X, ADDR, STRICT); \
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if (GET_CODE (X) == PLUS) \
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{ /* Handle <address>[index] represented with index-sum outermost */\
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xfoo = XEXP (X, 0); \
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if (INDEX_TERM_P (xfoo, MODE, STRICT)) \
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{ GO_IF_NONINDEXED_ADDRESS (XEXP (X, 1), ADDR, STRICT); } \
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xfoo = XEXP (X, 1); \
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if (INDEX_TERM_P (xfoo, MODE, STRICT)) \
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{ GO_IF_NONINDEXED_ADDRESS (XEXP (X, 0), ADDR, STRICT); } \
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/* Handle offset(reg)[index] with offset added outermost */ \
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if (INDIRECTABLE_CONSTANT_ADDRESS_P (XEXP (X, 0))) \
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{ if (GET_CODE (XEXP (X, 1)) == REG \
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&& XREG_OK_FOR_BASE_P (XEXP (X, 1), STRICT)) \
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goto ADDR; \
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GO_IF_REG_PLUS_INDEX (XEXP (X, 1), MODE, ADDR, STRICT); } \
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if (INDIRECTABLE_CONSTANT_ADDRESS_P (XEXP (X, 1))) \
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{ if (GET_CODE (XEXP (X, 0)) == REG \
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&& XREG_OK_FOR_BASE_P (XEXP (X, 0), STRICT)) \
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goto ADDR; \
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GO_IF_REG_PLUS_INDEX (XEXP (X, 0), MODE, ADDR, STRICT); } } }
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int
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legitimate_pic_operand_p(xbar, strict)
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register rtx xbar;
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int strict;
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{
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if (GET_CODE (xbar) == PLUS
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&& ((GET_CODE (XEXP (xbar, 1)) == SYMBOL_REF
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&& GET_CODE (XEXP (xbar, 0)) == REG)
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|| (GET_CODE (XEXP (xbar, 0)) == SYMBOL_REF
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&& GET_CODE (XEXP (xbar, 1)) == REG)
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|| (GET_CODE (XEXP (xbar, 0)) == MULT
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&& GET_CODE (XEXP (xbar, 1)) == MEM)))
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return 0;
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return INDIRECTABLE_CONSTANT_P (xbar);
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}
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/*
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* reg
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* plus( reg , const_int )
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* plus( reg , plus (const_int, reg))
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*/
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int
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legitimate_address_p(mode, xbar, strict)
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enum machine_mode mode;
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register rtx xbar;
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int strict;
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{
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if (flag_pic && !legitimate_pic_operand_p(xbar, mode))
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return 0;
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GO_IF_LEGITIMATE_ADDRESS2(mode, xbar, win, strict);
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return 0;
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win:
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if (flag_pic)
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{
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if (GET_CODE (xbar) == PLUS
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&& ((GET_CODE (XEXP (xbar, 1)) == SYMBOL_REF
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&& GET_CODE (XEXP (xbar, 0)) == REG)
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|| (GET_CODE (XEXP (xbar, 0)) == SYMBOL_REF
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&& GET_CODE (XEXP (xbar, 1)) == REG)))
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return 0;
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}
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if (TARGET_DEBUGADDR
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&& GET_CODE (xbar) != REG
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&& GET_CODE (xbar) != PRE_DEC
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&& GET_CODE (xbar) != POST_INC
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&& GET_CODE (xbar) != SYMBOL_REF
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&& !(GET_CODE (xbar) == PLUS
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&& ((GET_CODE (XEXP (xbar, 1)) == CONST_INT
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&& (GET_CODE (XEXP (xbar, 0)) == REG
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|| (GET_CODE (XEXP (xbar, 0)) == PLUS
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&& GET_CODE (XEXP (XEXP (xbar, 0), 0)) == REG
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&& GET_CODE (XEXP (XEXP (xbar, 0), 1)) == REG)))
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|| (GET_CODE (XEXP (xbar, 1)) == REG
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&& GET_CODE (XEXP (xbar, 0)) == CONST_INT))))
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{
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fprintf(stderr, "===== Legitimate Address Operand\n");
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debug_rtx(xbar);
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}
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return 1;
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}
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/*
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* Like memory_operand exit when pic where
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* we can't allow a double derefernce.
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*/
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int
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call_operand (op, mode)
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register rtx op;
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enum machine_mode mode;
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{
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if (!memory_operand (op, mode))
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return 0;
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if ((flag_pic || TARGET_HALFPIC) && GET_CODE (op) == MEM && GET_CODE (XEXP (op, 0)) == MEM)
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return 0;
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if (TARGET_DEBUGADDR)
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{
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fprintf(stderr, "===== Call Operand\n");
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debug_rtx(op);
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}
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#if 0
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debug_rtx(op);
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#endif
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return 1;
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}
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int
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compare_operand (op, mode)
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register rtx op;
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enum machine_mode mode;
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{
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if (!general_operand (op, mode))
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return 0;
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if (!(flag_pic || TARGET_HALFPIC))
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return 1;
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if (GET_CODE (op) == PLUS
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&& ((GET_CODE (XEXP (op, 1)) == SYMBOL_REF
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&& GET_CODE (XEXP (op, 0)) == REG)
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|| (GET_CODE (XEXP (op, 0)) == SYMBOL_REF
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&& GET_CODE (XEXP (op, 1)) == REG)))
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return 0;
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if (!INDIRECTABLE_CONSTANT_P (op))
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return 0;
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if (TARGET_DEBUGADDR)
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{
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fprintf(stderr, "===== Compare Operand\n");
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debug_rtx(op);
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}
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return 1;
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}
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/* Returns 1 if OP is a sum of a symbol reference and a constant. */
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int
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symbolic_operand (op, mode)
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register rtx op;
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enum machine_mode mode;
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{
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return !INDIRECTABLE_CONSTANT_P (op);
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}
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/* Legitimize PIC addresses. If the address is already
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position-independent, we return ORIG. Newly generated
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position-independent addresses go to REG. If we need more
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than one register, we lose.
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An address is legitimized by making an indirect reference
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through the Global Offset Table with the name of the symbol
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used as an offset.
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The assembler/loader are responsible for translating a symbol name
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into a PC-relative displacement.
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A quick example may make things a little clearer:
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When not generating PIC code to store the value 12345 into _foo+4
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we would generate the following code:
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movl $12345, _foo+4
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When generating PIC a transformation is made. First, the compiler
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loads the address of foo into a register. So the transformation makes:
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movab _foo, r0
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movl $12345, 4(r0)
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That (in a nutshell) is how *all* symbol references are handled. */
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rtx
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legitimize_pic_address (orig, mode, reg)
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rtx orig, reg;
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enum machine_mode mode;
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{
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rtx pic_ref = orig;
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/* fprintf(stderr, "before: "); debug_rtx(orig); */
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if (GET_CODE (orig) == SYMBOL_REF)
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{
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emit_move_insn (reg, orig);
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pic_ref = reg;
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}
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else if (GET_CODE (orig) == CONST)
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{
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rtx base;
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if (reg == 0)
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abort ();
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/* legitimize both operands of the PLUS */
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if (GET_CODE (XEXP (orig, 0)) == PLUS)
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{
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base = XEXP (XEXP (orig, 0), 0);
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if (GET_CODE (base) == SYMBOL_REF)
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{
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emit_move_insn (reg, base);
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base = reg;
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}
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orig = XEXP (XEXP (orig, 0), 1);
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if (GET_CODE (orig) == SYMBOL_REF)
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{
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if (base == reg)
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abort();
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emit_move_insn (reg, orig);
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orig = reg;
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}
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}
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else abort ();
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if (GET_CODE (orig) == CONST_INT)
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pic_ref = plus_constant_for_output (base, INTVAL (orig));
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else
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pic_ref = gen_rtx_PLUS (Pmode, base, orig);
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/* Likewise, should we set special REG_NOTEs here? */
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}
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/* fprintf(stderr, "after: "); debug_rtx(pic_ref); */
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return pic_ref;
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}
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#ifdef VMS_TARGET
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/* Additional support code for VMS target. */
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|
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163
gnu/dist/gcc/config/vax/vax.h
vendored
163
gnu/dist/gcc/config/vax/vax.h
vendored
@ -59,6 +59,15 @@ extern int target_flags;
|
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/* Nonzero if compiling with `G'-format floating point */
|
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#define TARGET_G_FLOAT (target_flags & 4)
|
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|
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/* Nonzero if compiling for a CVAX or later */
|
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#define TARGET_CVAX (target_flags & 8)
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|
||||
/* Nonzero if compiling in half-pic mode */
|
||||
#define TARGET_HALFPIC (target_flags & 16)
|
||||
|
||||
/* printout debugging info */
|
||||
#define TARGET_DEBUGADDR (target_flags & 32)
|
||||
|
||||
/* Macro to define tables used to set the flags.
|
||||
This is a list in braces of pairs in braces,
|
||||
each pair being { "NAME", VALUE }
|
||||
@ -73,6 +82,10 @@ extern int target_flags;
|
||||
{"g-float", 4}, \
|
||||
{"d", -4}, \
|
||||
{"d-float", -4}, \
|
||||
{"cvax", 8}, \
|
||||
{"half-pic", 16}, \
|
||||
{"no-pic", -16}, \
|
||||
{"debug-addr", 32}, \
|
||||
{ "", TARGET_DEFAULT}}
|
||||
|
||||
/* Default target_flags if no switches specified. */
|
||||
@ -614,6 +627,9 @@ gen_rtx (PLUS, Pmode, frame, GEN_INT (12))
|
||||
|
||||
#define LEGITIMATE_CONSTANT_P(X) 1
|
||||
|
||||
extern int legitimate_pic_operand_p();
|
||||
extern int legitimate_address_p();
|
||||
|
||||
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
|
||||
and check its validity for a certain class.
|
||||
We have two alternate definitions for each of them.
|
||||
@ -632,154 +648,31 @@ gen_rtx (PLUS, Pmode, frame, GEN_INT (12))
|
||||
/* Nonzero if X is a hard reg that can be used as an index
|
||||
or if it is a pseudo reg. */
|
||||
#define REG_OK_FOR_INDEX_P(X) 1
|
||||
|
||||
/* Nonzero if X is a hard reg that can be used as a base reg
|
||||
or if it is a pseudo reg. */
|
||||
#define REG_OK_FOR_BASE_P(X) 1
|
||||
|
||||
#define LEGITIMATE_PIC_OPERAND_P(X) (legitimate_pic_operand_p (X, 0))
|
||||
|
||||
#define GO_IF_LEGITIMATE_ADDRESS(ZMODE, XOP, LABEL) \
|
||||
{ if (legitimate_address_p(ZMODE, XOP, 0)) goto LABEL; }
|
||||
|
||||
#else
|
||||
|
||||
/* Nonzero if X is a hard reg that can be used as an index. */
|
||||
#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
|
||||
|
||||
/* Nonzero if X is a hard reg that can be used as a base reg. */
|
||||
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
|
||||
|
||||
#define LEGITIMATE_PIC_OPERAND_P(X) (legitimate_pic_operand_p (X, 1))
|
||||
|
||||
#define GO_IF_LEGITIMATE_ADDRESS(ZMODE, XOP, LABEL) \
|
||||
{ if (legitimate_address_p(ZMODE, XOP, 1)) goto LABEL; }
|
||||
|
||||
#endif
|
||||
|
||||
/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
|
||||
that is a valid memory address for an instruction.
|
||||
The MODE argument is the machine mode for the MEM expression
|
||||
that wants to use this address.
|
||||
|
||||
The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
|
||||
except for CONSTANT_ADDRESS_P which is actually machine-independent. */
|
||||
|
||||
#ifdef NO_EXTERNAL_INDIRECT_ADDRESS
|
||||
|
||||
/* Zero if this contains a (CONST (PLUS (SYMBOL_REF) (...))) and the
|
||||
symbol in the SYMBOL_REF is an external symbol. */
|
||||
|
||||
#define INDIRECTABLE_CONSTANT_P(X) \
|
||||
(! (GET_CODE ((X)) == CONST \
|
||||
&& GET_CODE (XEXP ((X), 0)) == PLUS \
|
||||
&& GET_CODE (XEXP (XEXP ((X), 0), 0)) == SYMBOL_REF \
|
||||
&& SYMBOL_REF_FLAG (XEXP (XEXP ((X), 0), 0))))
|
||||
|
||||
/* Re-definition of CONSTANT_ADDRESS_P, which is true only when there
|
||||
are no SYMBOL_REFs for external symbols present. */
|
||||
|
||||
#define INDIRECTABLE_CONSTANT_ADDRESS_P(X) \
|
||||
(GET_CODE (X) == LABEL_REF \
|
||||
|| (GET_CODE (X) == SYMBOL_REF && !SYMBOL_REF_FLAG (X)) \
|
||||
|| (GET_CODE (X) == CONST && INDIRECTABLE_CONSTANT_P(X)) \
|
||||
|| GET_CODE (X) == CONST_INT)
|
||||
|
||||
|
||||
/* Non-zero if X is an address which can be indirected. External symbols
|
||||
could be in a sharable image library, so we disallow those. */
|
||||
|
||||
#define INDIRECTABLE_ADDRESS_P(X) \
|
||||
(INDIRECTABLE_CONSTANT_ADDRESS_P (X) \
|
||||
|| (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
|
||||
|| (GET_CODE (X) == PLUS \
|
||||
&& GET_CODE (XEXP (X, 0)) == REG \
|
||||
&& REG_OK_FOR_BASE_P (XEXP (X, 0)) \
|
||||
&& INDIRECTABLE_CONSTANT_ADDRESS_P (XEXP (X, 1))))
|
||||
|
||||
#else /* not NO_EXTERNAL_INDIRECT_ADDRESS */
|
||||
|
||||
#define INDIRECTABLE_CONSTANT_ADDRESS_P(X) CONSTANT_ADDRESS_P(X)
|
||||
|
||||
/* Non-zero if X is an address which can be indirected. */
|
||||
#define INDIRECTABLE_ADDRESS_P(X) \
|
||||
(CONSTANT_ADDRESS_P (X) \
|
||||
|| (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
|
||||
|| (GET_CODE (X) == PLUS \
|
||||
&& GET_CODE (XEXP (X, 0)) == REG \
|
||||
&& REG_OK_FOR_BASE_P (XEXP (X, 0)) \
|
||||
&& CONSTANT_ADDRESS_P (XEXP (X, 1))))
|
||||
|
||||
#endif /* not NO_EXTERNAL_INDIRECT_ADDRESS */
|
||||
|
||||
/* Go to ADDR if X is a valid address not using indexing.
|
||||
(This much is the easy part.) */
|
||||
#define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
|
||||
{ register rtx xfoob = (X); \
|
||||
if (GET_CODE (xfoob) == REG) \
|
||||
{ \
|
||||
extern rtx *reg_equiv_mem; \
|
||||
if (! reload_in_progress \
|
||||
|| reg_equiv_mem[REGNO (xfoob)] == 0 \
|
||||
|| INDIRECTABLE_ADDRESS_P (reg_equiv_mem[REGNO (xfoob)])) \
|
||||
goto ADDR; \
|
||||
} \
|
||||
if (CONSTANT_ADDRESS_P (xfoob)) goto ADDR; \
|
||||
if (INDIRECTABLE_ADDRESS_P (xfoob)) goto ADDR; \
|
||||
xfoob = XEXP (X, 0); \
|
||||
if (GET_CODE (X) == MEM && INDIRECTABLE_ADDRESS_P (xfoob)) \
|
||||
goto ADDR; \
|
||||
if ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_INC) \
|
||||
&& GET_CODE (xfoob) == REG && REG_OK_FOR_BASE_P (xfoob)) \
|
||||
goto ADDR; }
|
||||
|
||||
/* 1 if PROD is either a reg times size of mode MODE
|
||||
or just a reg, if MODE is just one byte.
|
||||
This macro's expansion uses the temporary variables xfoo0 and xfoo1
|
||||
that must be declared in the surrounding context. */
|
||||
#define INDEX_TERM_P(PROD, MODE) \
|
||||
(GET_MODE_SIZE (MODE) == 1 \
|
||||
? (GET_CODE (PROD) == REG && REG_OK_FOR_BASE_P (PROD)) \
|
||||
: (GET_CODE (PROD) == MULT \
|
||||
&& \
|
||||
(xfoo0 = XEXP (PROD, 0), xfoo1 = XEXP (PROD, 1), \
|
||||
((GET_CODE (xfoo0) == CONST_INT \
|
||||
&& INTVAL (xfoo0) == GET_MODE_SIZE (MODE) \
|
||||
&& GET_CODE (xfoo1) == REG \
|
||||
&& REG_OK_FOR_INDEX_P (xfoo1)) \
|
||||
|| \
|
||||
(GET_CODE (xfoo1) == CONST_INT \
|
||||
&& INTVAL (xfoo1) == GET_MODE_SIZE (MODE) \
|
||||
&& GET_CODE (xfoo0) == REG \
|
||||
&& REG_OK_FOR_INDEX_P (xfoo0))))))
|
||||
|
||||
/* Go to ADDR if X is the sum of a register
|
||||
and a valid index term for mode MODE. */
|
||||
#define GO_IF_REG_PLUS_INDEX(X, MODE, ADDR) \
|
||||
{ register rtx xfooa; \
|
||||
if (GET_CODE (X) == PLUS) \
|
||||
{ if (GET_CODE (XEXP (X, 0)) == REG \
|
||||
&& REG_OK_FOR_BASE_P (XEXP (X, 0)) \
|
||||
&& (xfooa = XEXP (X, 1), \
|
||||
INDEX_TERM_P (xfooa, MODE))) \
|
||||
goto ADDR; \
|
||||
if (GET_CODE (XEXP (X, 1)) == REG \
|
||||
&& REG_OK_FOR_BASE_P (XEXP (X, 1)) \
|
||||
&& (xfooa = XEXP (X, 0), \
|
||||
INDEX_TERM_P (xfooa, MODE))) \
|
||||
goto ADDR; } }
|
||||
|
||||
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
|
||||
{ register rtx xfoo, xfoo0, xfoo1; \
|
||||
GO_IF_NONINDEXED_ADDRESS (X, ADDR); \
|
||||
if (GET_CODE (X) == PLUS) \
|
||||
{ /* Handle <address>[index] represented with index-sum outermost */\
|
||||
xfoo = XEXP (X, 0); \
|
||||
if (INDEX_TERM_P (xfoo, MODE)) \
|
||||
{ GO_IF_NONINDEXED_ADDRESS (XEXP (X, 1), ADDR); } \
|
||||
xfoo = XEXP (X, 1); \
|
||||
if (INDEX_TERM_P (xfoo, MODE)) \
|
||||
{ GO_IF_NONINDEXED_ADDRESS (XEXP (X, 0), ADDR); } \
|
||||
/* Handle offset(reg)[index] with offset added outermost */ \
|
||||
if (INDIRECTABLE_CONSTANT_ADDRESS_P (XEXP (X, 0))) \
|
||||
{ if (GET_CODE (XEXP (X, 1)) == REG \
|
||||
&& REG_OK_FOR_BASE_P (XEXP (X, 1))) \
|
||||
goto ADDR; \
|
||||
GO_IF_REG_PLUS_INDEX (XEXP (X, 1), MODE, ADDR); } \
|
||||
if (INDIRECTABLE_CONSTANT_ADDRESS_P (XEXP (X, 1))) \
|
||||
{ if (GET_CODE (XEXP (X, 0)) == REG \
|
||||
&& REG_OK_FOR_BASE_P (XEXP (X, 0))) \
|
||||
goto ADDR; \
|
||||
GO_IF_REG_PLUS_INDEX (XEXP (X, 0), MODE, ADDR); } } }
|
||||
|
||||
/* Try machine-dependent ways of modifying an illegitimate address
|
||||
to be legitimate. If we find one, return the new, valid address.
|
||||
This macro is used in only one place: `memory_address' in explow.c.
|
||||
|
||||
116
gnu/dist/gcc/config/vax/vax.md
vendored
116
gnu/dist/gcc/config/vax/vax.md
vendored
@ -61,12 +61,36 @@
|
||||
""
|
||||
"tstf %0")
|
||||
|
||||
(define_insn "cmpsi"
|
||||
(define_expand "cmpsi"
|
||||
[(set (cc0)
|
||||
(compare (match_operand:SI 0 "nonimmediate_operand" "g")
|
||||
(match_operand:SI 1 "general_operand" "g")))]
|
||||
(match_operand:SI 1 "compare_operand" "g")))]
|
||||
""
|
||||
"cmpl %0,%1")
|
||||
"
|
||||
{
|
||||
if ((TARGET_HALFPIC || flag_pic) && symbolic_operand (operands[1], SImode))
|
||||
{
|
||||
/* The source is an address which requires PIC relocation.
|
||||
Call legitimize_pic_address with the source, mode, and a relocation
|
||||
register (a new pseudo, or the final destination if reload_in_progress
|
||||
is set). Then fall through normally */
|
||||
extern rtx legitimize_pic_address();
|
||||
rtx temp = reload_in_progress ? operands[0] : gen_reg_rtx (Pmode);
|
||||
operands[1] = legitimize_pic_address (operands[1], SImode, temp);
|
||||
}
|
||||
}")
|
||||
|
||||
(define_insn ""
|
||||
[(set (cc0)
|
||||
(compare (match_operand:SI 0 "nonimmediate_operand" "g")
|
||||
(match_operand:SI 1 "compare_operand" "g")))]
|
||||
""
|
||||
"*
|
||||
{
|
||||
if (!(/*TARGET_HALFPIC || */flag_pic) || GET_CODE (operands[1]) != SYMBOL_REF)
|
||||
return \"cmpl %0,%1\";
|
||||
return \"pushab %a1;cmpl %0,(sp)+\";
|
||||
}")
|
||||
|
||||
(define_insn "cmphi"
|
||||
[(set (cc0)
|
||||
@ -178,6 +202,34 @@
|
||||
clrq %0
|
||||
movq %D1,%0")
|
||||
|
||||
|
||||
;; General case of fullword move.
|
||||
;;
|
||||
;; This is the main "hook" for PIC code. When generating
|
||||
;; PIC, movsi is responsible for determining when the source address
|
||||
;; needs PIC relocation and appropriately calling legitimize_pic_address
|
||||
;; to perform the actual relocation.
|
||||
;;
|
||||
;; In both the PIC and non-PIC cases the patterns generated will
|
||||
;; matched by the next define_insn.
|
||||
(define_expand "movsi"
|
||||
[(set (match_operand:SI 0 "general_operand" "")
|
||||
(match_operand:SI 1 "general_operand" ""))]
|
||||
""
|
||||
"
|
||||
{
|
||||
if ((TARGET_HALFPIC || flag_pic) && symbolic_operand (operands[1], SImode))
|
||||
{
|
||||
/* The source is an address which requires PIC relocation.
|
||||
Call legitimize_pic_address with the source, mode, and a relocation
|
||||
register (a new pseudo, or the final destination if reload_in_progress
|
||||
is set). Then fall through normally */
|
||||
extern rtx legitimize_pic_address();
|
||||
rtx temp = reload_in_progress ? operands[0] : gen_reg_rtx (Pmode);
|
||||
operands[1] = legitimize_pic_address (operands[1], SImode, temp);
|
||||
}
|
||||
}")
|
||||
|
||||
;; The VAX move instructions have space-time tradeoffs. On a microVAX
|
||||
;; register-register mov instructions take 3 bytes and 2 CPU cycles. clrl
|
||||
;; takes 2 bytes and 3 cycles. mov from constant to register takes 2 cycles
|
||||
@ -194,8 +246,7 @@
|
||||
|
||||
;; Loads of constants between 64 and 128 used to be done with
|
||||
;; "addl3 $63,#,dst" but this is slower than movzbl and takes as much space.
|
||||
|
||||
(define_insn "movsi"
|
||||
(define_insn ""
|
||||
[(set (match_operand:SI 0 "general_operand" "=g")
|
||||
(match_operand:SI 1 "general_operand" "g"))]
|
||||
""
|
||||
@ -571,10 +622,18 @@
|
||||
&& ((INTVAL (operands[2]) < 32767 && INTVAL (operands[2]) > -32768)
|
||||
|| REGNO (operands[1]) > 11))
|
||||
return \"movab %c2(%1),%0\";
|
||||
if (GET_CODE (operands[2]) == SYMBOL_REF
|
||||
&& GET_CODE (operands[1]) == REG)
|
||||
return \"movab %a2[%1],%0\";
|
||||
return \"addl2 %2,%0\";
|
||||
}
|
||||
if (rtx_equal_p (operands[0], operands[2]))
|
||||
return \"addl2 %1,%0\";
|
||||
{
|
||||
if (GET_CODE (operands[1]) == SYMBOL_REF
|
||||
&& GET_CODE (operands[2]) == REG)
|
||||
return \"movab %a1[%2],%0\";
|
||||
return \"addl2 %1,%0\";
|
||||
}
|
||||
|
||||
if (GET_CODE (operands[2]) == CONST_INT
|
||||
&& INTVAL (operands[2]) < 32767
|
||||
@ -594,10 +653,41 @@
|
||||
|| REGNO (operands[1]) > 11))
|
||||
return \"movab %c2(%1),%0\";
|
||||
|
||||
/* Add this if using gcc on a VAX 3xxx:
|
||||
if (REG_P (operands[1]) && REG_P (operands[2]))
|
||||
if (TARGET_CVAX && REG_P (operands[1]) && REG_P (operands[2]))
|
||||
return \"movab (%1)[%2],%0\";
|
||||
*/
|
||||
|
||||
if ((TARGET_HALFPIC || flag_pic) && GET_CODE (operands[1]) == SYMBOL_REF)
|
||||
{
|
||||
if (push_operand(operands[0], SImode))
|
||||
{
|
||||
if (REG_P (operands[2]))
|
||||
return \"pushab %a1[%2]\";
|
||||
return \"pushab %a1;addl2 %2,(sp)\";
|
||||
}
|
||||
if (GET_CODE (operands[2]) == REG)
|
||||
return \"movab %a1[%2],%0\";
|
||||
if (GET_CODE (operands[0]) != POST_INC
|
||||
&& GET_CODE (operands[0]) != PRE_DEC)
|
||||
return \"movab %a1,%0;addl2 %2,%0\";
|
||||
return \"nop;addl3 %1,%2,%0\";
|
||||
}
|
||||
|
||||
if ((TARGET_HALFPIC || flag_pic) && GET_CODE (operands[2]) == SYMBOL_REF)
|
||||
{
|
||||
if (push_operand(operands[0], SImode))
|
||||
{
|
||||
if (REG_P (operands[1]))
|
||||
return \"pushab %a2[%1]\";
|
||||
return \"pushab %a2;addl2 %1,(sp)\";
|
||||
}
|
||||
if (GET_CODE (operands[1]) == REG)
|
||||
return \"movab %a2[%1],%0\";
|
||||
if (GET_CODE (operands[0]) != POST_INC
|
||||
&& GET_CODE (operands[0]) != PRE_DEC)
|
||||
return \"movab %a2,%0;addl2 %1,%0\";
|
||||
return \"nop;addl3 %1,%2,%0\";
|
||||
}
|
||||
|
||||
return \"addl3 %1,%2,%0\";
|
||||
}")
|
||||
|
||||
@ -1841,7 +1931,7 @@
|
||||
;; a word. Since the only time we actually use it in the call instruction
|
||||
;; is when it is a constant, SImode (for addl2) is the proper mode.
|
||||
(define_insn "call_pop"
|
||||
[(call (match_operand:QI 0 "memory_operand" "m")
|
||||
[(call (match_operand:QI 0 "call_operand" "m")
|
||||
(match_operand:SI 1 "const_int_operand" "n"))
|
||||
(set (reg:SI 14) (plus:SI (reg:SI 14)
|
||||
(match_operand:SI 3 "immediate_operand" "i")))]
|
||||
@ -1856,7 +1946,7 @@
|
||||
|
||||
(define_insn "call_value_pop"
|
||||
[(set (match_operand 0 "" "=g")
|
||||
(call (match_operand:QI 1 "memory_operand" "m")
|
||||
(call (match_operand:QI 1 "call_operand" "m")
|
||||
(match_operand:SI 2 "const_int_operand" "n")))
|
||||
(set (reg:SI 14) (plus:SI (reg:SI 14)
|
||||
(match_operand:SI 4 "immediate_operand" "i")))]
|
||||
@ -1872,7 +1962,7 @@
|
||||
;; Define another set of these for the case of functions with no
|
||||
;; operands. In that case, combine may simplify the adjustment of sp.
|
||||
(define_insn ""
|
||||
[(call (match_operand:QI 0 "memory_operand" "m")
|
||||
[(call (match_operand:QI 0 "call_operand" "m")
|
||||
(match_operand:SI 1 "const_int_operand" "n"))
|
||||
(set (reg:SI 14) (reg:SI 14))]
|
||||
""
|
||||
@ -1886,7 +1976,7 @@
|
||||
|
||||
(define_insn ""
|
||||
[(set (match_operand 0 "" "=g")
|
||||
(call (match_operand:QI 1 "memory_operand" "m")
|
||||
(call (match_operand:QI 1 "call_operand" "m")
|
||||
(match_operand:SI 2 "const_int_operand" "n")))
|
||||
(set (reg:SI 14) (reg:SI 14))]
|
||||
""
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user