spl.c is no longer needed. Most of its functions have been replaced
with macros in psl.h. The spl functions splx() raisespl() and lowerspl() are now coded in assembly.
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/* $NetBSD: spl.c,v 1.1 1996/01/31 23:17:02 mark Exp $ */
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/*
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* Copyright (c) 1994,1995 Mark Brinicombe.
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* Copyright (c) 1994 Brini.
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* All rights reserved.
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*
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* This code is derived from software written for Brini by Mark Brinicombe
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Brini.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* RiscBSD kernel project
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*
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* spl.c
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*
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* spl routines
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*
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* Created : 30/09/94
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* Last updated : 28/08/95
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*
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* $Id: spl.c,v 1.1 1996/01/31 23:17:02 mark Exp $
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*/
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <machine/irqhandler.h>
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#include <machine/iomd.h>
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#include <machine/cpu.h>
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extern u_int spl_mask;
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int safepri = 0xffffffff;
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int spl_debug = 0;
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/*
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* u_int spl(u_int mask)
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*
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* And's bits out of the current spl mask and returns the previous mask.
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* The IOMD mask registers are then updated to reflect the allowable IRQ's
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* Eventually this should be done in assembly as the swap instruction
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* can be used to speed things up.
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*/
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u_int
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spl(mask)
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u_int mask;
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{
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register u_int oldspl;
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register u_int oldirqstate;
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/*
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* The mask indicates which IRQ's are not allowable.
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* Each bit that is zero means that that interrupt is not allowed.
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* The spl_mask is updated so that these interrupts will not be allowed.
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* This routine only disables interrupts, it does not enable them.
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* The routines splx or sple should be used for that.
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*/
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oldirqstate = disable_interrupts(I32_bit);
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if (spl_debug)
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printf("spl: %08x %08x\n", spl_mask, mask);
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oldspl = spl_mask;
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spl_mask &= mask;
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irq_setmasks();
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restore_interrupts(oldirqstate);
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return(oldspl);
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}
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/*
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* u_int sple(u_int mask)
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*
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* Or's bitsinto the current spl mask and returns the previous mask.
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* The IOMD mask registers are then updated to reflect the allowable IRQ's
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* Eventually this should be done in assembly as the swap instruction
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* can be used to speed things up.
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*/
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u_int
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sple(mask)
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u_int mask;
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{
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register u_int oldspl;
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register u_int oldirqstate;
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/*
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* The mask indicates which allowable interrupts should be added to
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* the current spl_mask.
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* This function only enables those interrupts specified. It does
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* not disable any interrupts.
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*/
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oldirqstate = disable_interrupts(I32_bit);
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if (spl_debug)
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printf("sple: %08x %08x\n", spl_mask, mask);
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oldspl = spl_mask;
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spl_mask |= mask;
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irq_setmasks();
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restore_interrupts(oldirqstate);
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return(oldspl);
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}
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/*
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* u_int splx(u_int mask)
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*
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* Sets the current spl mask and returns the previous mask.
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* The IOMD mask registers are then updated to reflect the allowable IRQ's
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* Eventually this should be done in assembly as the swap instruction
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* can be used to speed things up.
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*/
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u_int
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splx(mask)
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u_int mask;
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{
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register u_int oldspl;
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register u_int oldirqstate;
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oldirqstate = disable_interrupts(I32_bit);
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if (spl_debug)
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printf("splx: %08x %08x s=%08x\n", spl_mask, mask, oldirqstate);
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oldspl = spl_mask;
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spl_mask = mask;
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irq_setmasks();
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restore_interrupts(oldirqstate);
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return(oldspl);
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}
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/*
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* u_int spl0(void)
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*
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* Set the spl mask to enable all IRQ's to be handled
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*/
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u_int
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spl0()
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{
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if (spl_debug)
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printf("spl0() ");
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return(splx(0xffffffff));
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}
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/*
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* u_int splhigh(void)
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*
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* Set the spl mask to disable all IRQ's from being handled
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*/
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u_int
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splhigh()
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{
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if (spl_debug)
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printf("splhigh() ");
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return(splx(0x00000000));
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}
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u_int
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splbio()
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{
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if (spl_debug)
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printf("splbio() ");
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return(spl(irqmasks[IPL_BIO]));
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}
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u_int
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splnet()
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{
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if (spl_debug)
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printf("splnet() ");
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return(spl(irqmasks[IPL_NET]));
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/* return(spl(~IRQMASK_SOFTNET));*/
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}
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u_int
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spltty()
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{
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if (spl_debug)
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printf("spltty() ");
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return(spl(irqmasks[IPL_TTY]));
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}
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u_int
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splimp()
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{
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if (spl_debug)
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printf("splimp() ");
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return(spl(irqmasks[IPL_IMP]));
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}
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u_int
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splclock()
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{
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if (spl_debug)
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printf("splclock() ");
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return(spl(irqmasks[IPL_CLOCK]));
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}
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u_int
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splstatclock()
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{
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if (spl_debug)
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printf("splstatclock() ");
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return(spl(irqmasks[IPL_CLOCK]));
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}
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u_int
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splsoftclock()
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{
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if (spl_debug)
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printf("splsoftclock() ");
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return(spl_mask);
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}
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u_int
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splsoftnet()
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{
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if (spl_debug)
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printf("splsoftnet() ");
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return(spl(~IRQMASK_SOFTNET));
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}
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/* End of spl.c */
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