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Make firmware updates work with dpti.

This commit is contained in:
ad 2001-09-27 18:43:37 +00:00
parent 87a8b82ae9
commit 404706846e
5 changed files with 513 additions and 252 deletions
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333
sys/dev/i2o/dpti.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: dpti.c,v 1.1 2001/09/21 23:44:20 ad Exp $ */
/* $NetBSD: dpti.c,v 1.2 2001/09/27 18:43:37 ad Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@ -76,7 +76,12 @@
#include <sys/conf.h>
#include <sys/ioctl.h>
#include <uvm/uvm_extern.h>
#include <machine/bus.h>
#ifdef i386
#include <machine/pio.h>
#endif
#include <dev/i2o/i2o.h>
#include <dev/i2o/i2odpt.h>
@ -84,9 +89,6 @@
#include <dev/i2o/iopvar.h>
#include <dev/i2o/dptivar.h>
#include <compat/linux/common/linux_types.h>
#include <compat/linux/common/linux_ioctl.h>
#ifdef I2ODEBUG
#define DPRINTF(x) printf x
#else
@ -94,13 +96,40 @@
#endif
static struct dpt_sig dpti_sig = {
{ 'd', 'P', 't', 'S', 'i', 'G'}, SIG_VERSION, PROC_INTEL,
PROC_386 | PROC_486 | PROC_PENTIUM | PROC_SEXIUM, FT_HBADRVR, 0,
OEM_DPT, OS_FREE_BSD, CAP_ABOVE16MB, DEV_ALL,
{ 'd', 'P', 't', 'S', 'i', 'G'},
SIG_VERSION,
#if defined(i386)
PROC_INTEL,
#elif defined(powerpc)
PROC_POWERPC,
#elif defined(alpha)
PROC_ALPHA,
#elif defined(mips)
PROC_MIPS,
#elif defined(sparc64)
PROC_ULTRASPARC,
#endif
#if defined(i386)
PROC_386 | PROC_486 | PROC_PENTIUM | PROC_SEXIUM,
#else
0,
#endif
FT_HBADRVR,
0,
OEM_DPT,
OS_FREE_BSD, /* XXX */
CAP_ABOVE16MB,
DEV_ALL,
ADF_ALL_SC5,
0, 0, DPTI_VERSION, DPTI_REVISION, DPTI_SUBREVISION,
DPTI_MONTH, DPTI_DAY, DPTI_YEAR,
""
0,
0,
DPTI_VERSION,
DPTI_REVISION,
DPTI_SUBREVISION,
DPTI_MONTH,
DPTI_DAY,
DPTI_YEAR,
"" /* Will be filled later */
};
void dpti_attach(struct device *, struct device *, void *);
@ -155,7 +184,7 @@ dpti_attach(struct device *parent, struct device *self, void *aux)
* Tell the world what we are. The description in the signature
* must be no more than 46 bytes long (see dptivar.h).
*/
printf(": DPT/Adaptec SCSI RAID management interface\n");
printf(": DPT/Adaptec RAID management interface\n");
sprintf(dpti_sig.dsDescription, "NetBSD %s I2O OSM", osrelease);
rv = iop_field_get_all(iop, I2O_TID_IOP,
@ -192,7 +221,7 @@ dptiioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
struct iop_softc *iop;
struct dpti_softc *sc;
struct ioctl_pt *pt;
int i, size;
int i, size, rv;
sc = device_lookup(&dpti_cd, minor(dev));
iop = (struct iop_softc *)sc->sc_dv.dv_parent;
@ -242,12 +271,19 @@ dptiioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
return (EIO);
case DPT_I2OUSRCMD:
return (dpti_passthrough(sc, data, p));
if (sc->sc_nactive++ >= 2)
tsleep(&sc->sc_nactive, PRIBIO, "dptislp", 0);
rv = dpti_passthrough(sc, data, p);
sc->sc_nactive--;
wakeup_one(&sc->sc_nactive);
return (rv);
case DPT_I2ORESETCMD:
printf("%s: I2ORESETCMD not implemented\n",
sc->sc_dv.dv_xname);
return (ENOTTY);
return (EOPNOTSUPP);
case DPT_I2ORESCANCMD:
return (iop_reconfigure(iop, 0));
@ -278,31 +314,30 @@ dpti_blinkled(struct dpti_softc *sc)
int
dpti_ctlrinfo(struct dpti_softc *sc, u_long cmd, caddr_t data)
{
struct dpt_ctlrinfo CtlrInfo;
struct dpt_ctlrinfo info;
struct iop_softc *iop;
int rv, i;
iop = (struct iop_softc *)sc->sc_dv.dv_parent;
memset(&CtlrInfo, 0, sizeof(CtlrInfo));
memset(&info, 0, sizeof(info));
CtlrInfo.length = sizeof(CtlrInfo) - sizeof(u_int16_t);
CtlrInfo.drvrHBAnum = sc->sc_dv.dv_unit;
CtlrInfo.baseAddr = iop->sc_memaddr;
info.length = sizeof(info) - sizeof(u_int16_t);
info.drvrHBAnum = sc->sc_dv.dv_unit;
info.baseAddr = iop->sc_memaddr;
if ((i = dpti_blinkled(sc)) == -1)
i = 0;
CtlrInfo.blinkState = i;
CtlrInfo.pciBusNum = iop->sc_pcibus;
CtlrInfo.pciDeviceNum = iop->sc_pcidev;
CtlrInfo.hbaFlags = FLG_OSD_PCI_VALID | FLG_OSD_DMA | FLG_OSD_I2O;
CtlrInfo.Interrupt = 10; /* XXX */
info.blinkState = i;
info.pciBusNum = iop->sc_pcibus;
info.pciDeviceNum = iop->sc_pcidev;
info.hbaFlags = FLG_OSD_PCI_VALID | FLG_OSD_DMA | FLG_OSD_I2O;
info.Interrupt = 10; /* XXX */
if (IOCPARM_LEN(cmd) > sizeof(*data)) {
bcopy(&CtlrInfo, data, sizeof(CtlrInfo));
memcpy(data, &info, min(sizeof(info), IOCPARM_LEN(cmd)));
rv = 0;
} else
rv = copyout(&CtlrInfo, *(caddr_t *)data,
sizeof(CtlrInfo));
rv = copyout(&info, *(caddr_t *)data, sizeof(info));
return (rv);
}
@ -310,14 +345,86 @@ dpti_ctlrinfo(struct dpti_softc *sc, u_long cmd, caddr_t data)
int
dpti_sysinfo(struct dpti_softc *sc, u_long cmd, caddr_t data)
{
struct dpt_sysinfo info;
int rv;
#ifdef i386
int i, j;
#endif
memset(&info, 0, sizeof(info));
#ifdef i386
outb (0x70, 0x12);
i = inb(0x71);
j = i >> 4;
if (i == 0x0f) {
outb (0x70, 0x19);
j = inb (0x71);
}
info.drive0CMOS = j;
j = i & 0x0f;
if (i == 0x0f) {
outb (0x70, 0x1a);
j = inb (0x71);
}
info.drive1CMOS = j;
info.processorFamily = dpti_sig.dsProcessorFamily;
/*
* XXX Not currently implemented, since it involves reading from the
* IBM PC CMOS and grovelling around in ISA expansion card space,
* which is kind of disgusting. The DPT utilities don't seem to
* mind. :-)
* Get the conventional memory size from CMOS.
*/
return (EIO);
outb(0x70, 0x16);
j = inb(0x71);
j <<= 8;
outb(0x70, 0x15);
j |= inb(0x71);
info.conventionalMemSize = j;
/*
* Get the extended memory size from CMOS.
*/
outb(0x70, 0x31);
j = inb(0x71);
j <<= 8;
outb(0x70, 0x30);
j |= inb(0x71);
info.extendedMemSize = j;
switch (cpu_class) {
case CPUCLASS_386:
info.processorType = PROC_386;
break;
case CPUCLASS_486:
info.processorType = PROC_486;
break;
case CPUCLASS_586:
info.processorType = PROC_PENTIUM;
break;
case CPUCLASS_686:
default:
info.processorType = PROC_SEXIUM;
break;
}
info.flags = SI_CMOS_Valid | SI_BusTypeValid |
SI_MemorySizeValid | SI_NO_SmartROM;
#else
info.flags = SI_BusTypeValid | SI_NO_SmartROM;
#endif
info.busType = SI_PCI_BUS;
/*
* Copy out the info structure to the user.
*/
if (IOCPARM_LEN(cmd) > sizeof(*data)) {
memcpy(data, &info, min(sizeof(info), IOCPARM_LEN(cmd)));
rv = 0;
} else
rv = copyout(&info, *(caddr_t *)data, sizeof(info));
return (rv);
}
int
@ -330,10 +437,11 @@ dpti_passthrough(struct dpti_softc *sc, caddr_t data, struct proc *proc)
struct dpti_ptbuf bufs[IOP_MAX_MSG_XFERS];
u_int32_t mbtmp[IOP_MAX_MSG_SIZE / sizeof(u_int32_t)];
u_int32_t rbtmp[IOP_MAX_MSG_SIZE / sizeof(u_int32_t)];
int rv, msgsize, repsize, sgoff, i, mapped, nbuf;
u_int32_t *p, *pmax;
int rv, msgsize, repsize, sgoff, i, mapped, nbuf, nfrag, j, sz;
u_int32_t *p, *pmax, *pstart;
iop = (struct iop_softc *)sc->sc_dv.dv_parent;
im = NULL;
if ((rv = dpti_blinkled(sc)) != -1) {
if (rv != 0) {
@ -362,30 +470,27 @@ dpti_passthrough(struct dpti_softc *sc, caddr_t data, struct proc *proc)
/*
* Handle special commands.
*
* XXX We'll need to handle all of these later for online firmware
* upgrades. Swish or what, eh?
*/
switch (mh.msgfunc >> 24) {
case I2O_EXEC_IOP_RESET:
printf("dpti%s: I2O_EXEC_IOP_RESET not implemented\n",
printf("%s: I2O_EXEC_IOP_RESET not implemented\n",
sc->sc_dv.dv_xname);
return (EIO);
return (EOPNOTSUPP);
case I2O_EXEC_OUTBOUND_INIT:
printf("dpti%s: I2O_EXEC_OUTBOUND_INIT not implemented\n",
printf("%s: I2O_EXEC_OUTBOUND_INIT not implemented\n",
sc->sc_dv.dv_xname);
return (EIO);
return (EOPNOTSUPP);
case I2O_EXEC_SYS_TAB_SET:
printf("dpti%s: I2O_EXEC_SYS_TAB_SET not implemented\n",
printf("%s: I2O_EXEC_SYS_TAB_SET not implemented\n",
sc->sc_dv.dv_xname);
return (EIO);
return (EOPNOTSUPP);
case I2O_EXEC_STATUS_GET:
iop_status_get(iop, 0);
rv = copyout(&iop->sc_status, data + msgsize,
sizeof(iop->sc_status));
if ((rv = iop_status_get(iop, 0)) == 0)
rv = copyout(&iop->sc_status, data + msgsize,
sizeof(iop->sc_status));
return (rv);
}
@ -423,7 +528,7 @@ dpti_passthrough(struct dpti_softc *sc, caddr_t data, struct proc *proc)
* If the message has a scatter gather list, it must be comprised of
* simple elements. If any one transfer contains multiple segments,
* we allocate a temporary buffer for it; otherwise, the buffer will
* be mapped directly. XXX Lies! We don't do scatter-gather yet.
* be mapped directly.
*/
if ((sgoff = ((mh.msgflags >> 4) & 15)) != 0) {
if ((sgoff + 2) > (msgsize >> 2)) {
@ -431,33 +536,38 @@ dpti_passthrough(struct dpti_softc *sc, caddr_t data, struct proc *proc)
sc->sc_dv.dv_xname));
return (EINVAL);
}
memset(bufs, 0, sizeof(bufs));
} else
nbuf = -1;
rv = EINVAL;
if (sgoff != 0) {
p = mbtmp + sgoff;
pmax = mbtmp + (msgsize >> 2);
pmax = mbtmp + (msgsize >> 2) - 2;
for (nbuf = 0; nbuf < IOP_MAX_MSG_XFERS; nbuf++) {
if (p > pmax - 2) {
for (nbuf = 0; nbuf < IOP_MAX_MSG_XFERS; nbuf++, p += 2) {
if (p > pmax) {
DPRINTF(("%s: invalid SGL (1)\n",
sc->sc_dv.dv_xname));
return (EINVAL);
goto bad;
}
if ((p[0] & 0x30000000) != I2O_SGL_SIMPLE) {
DPRINTF(("%s: invalid SGL (2)\n",
sc->sc_dv.dv_xname));
return (EINVAL);
goto bad;
}
bufs[nbuf].db_out = (p[0] & I2O_SGL_DATA_OUT) != 0;
bufs[nbuf].db_ptr = NULL;
if ((p[0] & I2O_SGL_END_BUFFER) != 0) {
if ((p[0] & 0x00ffffff) > IOP_MAX_XFER) {
DPRINTF(("%s: buffer too large\n",
sc->sc_dv.dv_xname));
return (EINVAL);
goto bad;
}
bufs[nbuf].db_ptr = (caddr_t)p[1];
@ -467,19 +577,85 @@ dpti_passthrough(struct dpti_softc *sc, caddr_t data, struct proc *proc)
if ((p[0] & I2O_SGL_END) != 0)
break;
p += 2;
continue;
}
printf("%s: scatter-gather not implemented\n",
sc->sc_dv.dv_xname);
return (EIO);
/*
* The buffer has multiple segments. Determine the
* total size.
*/
nfrag = 0;
sz = 0;
for (pstart = p; p <= pmax; p += 2) {
if (nfrag == DPTI_MAX_SEGS) {
DPRINTF(("%s: too many segments\n",
sc->sc_dv.dv_xname));
goto bad;
}
bufs[nbuf].db_frags[nfrag].iov_len =
p[0] & 0x00ffffff;
bufs[nbuf].db_frags[nfrag].iov_base =
(void *)p[1];
sz += p[0] & 0x00ffffff;
nfrag++;
if ((p[0] & I2O_SGL_END) != 0) {
if ((p[0] & I2O_SGL_END_BUFFER) == 0) {
DPRINTF((
"%s: invalid SGL (3)\n",
sc->sc_dv.dv_xname));
goto bad;
}
break;
}
if ((p[0] & I2O_SGL_END_BUFFER) != 0)
break;
}
bufs[nbuf].db_nfrag = nfrag;
if (p > pmax) {
DPRINTF(("%s: invalid SGL (4)\n",
sc->sc_dv.dv_xname));
goto bad;
}
if (sz > IOP_MAX_XFER) {
DPRINTF(("%s: buffer too large\n",
sc->sc_dv.dv_xname));
goto bad;
}
bufs[nbuf].db_size = sz;
bufs[nbuf].db_ptr = malloc(sz, M_DEVBUF, M_WAITOK);
if (bufs[nbuf].db_ptr == NULL) {
DPRINTF(("%s: allocation failure\n",
sc->sc_dv.dv_xname));
rv = ENOMEM;
goto bad;
}
for (i = 0, sz = 0; i < bufs[nbuf].db_nfrag; i++) {
rv = copyin(bufs[nbuf].db_frags[i].iov_base,
bufs[nbuf].db_ptr + sz,
bufs[nbuf].db_frags[i].iov_len);
if (rv != 0) {
DPRINTF(("%s: frag copyin\n",
sc->sc_dv.dv_xname));
goto bad;
}
sz += bufs[nbuf].db_frags[i].iov_len;
}
if ((p[0] & I2O_SGL_END) != 0)
break;
}
if (nbuf == IOP_MAX_MSG_XFERS) {
DPRINTF(("%s: too many transfers\n",
sc->sc_dv.dv_xname));
return (EINVAL);
goto bad;
}
}
@ -487,12 +663,13 @@ dpti_passthrough(struct dpti_softc *sc, caddr_t data, struct proc *proc)
* Allocate a wrapper, and adjust the message header fields to
* indicate that no scatter-gather list is currently present.
*/
mapped = 0;
im = iop_msg_alloc(iop, IM_WAIT | IM_NOSTATUS);
im->im_rb = (struct i2o_reply *)rbtmp;
mf = (struct i2o_msg *)mbtmp;
mf->msgictx = IOP_ICTX;
mf->msgtctx = im->im_tctx;
mapped = 0;
if (sgoff != 0)
mf->msgflags = (mf->msgflags & 0xff0f) | (sgoff << 16);
@ -504,8 +681,8 @@ dpti_passthrough(struct dpti_softc *sc, caddr_t data, struct proc *proc)
rv = iop_msg_map(iop, im, mbtmp, bufs[i].db_ptr,
bufs[i].db_size, bufs[i].db_out, bufs[i].db_proc);
if (rv != 0) {
DPRINTF(("%s: msg_map failed\n",
sc->sc_dv.dv_xname));
DPRINTF(("%s: msg_map failed, rv = %d\n",
sc->sc_dv.dv_xname, rv));
goto bad;
}
mapped = 1;
@ -514,9 +691,6 @@ dpti_passthrough(struct dpti_softc *sc, caddr_t data, struct proc *proc)
/*
* Start the command and sleep until it completes.
*/
if (sc->sc_nactive++ >= 2)
tsleep(&sc->sc_nactive, PRIBIO, "dptislp", 0);
if ((rv = iop_msg_post(iop, im, mbtmp, 5*60*1000)) != 0)
goto bad;
@ -528,12 +702,33 @@ dpti_passthrough(struct dpti_softc *sc, caddr_t data, struct proc *proc)
sc->sc_dv.dv_xname));
bad:
sc->sc_nactive--;
wakeup_one(&sc->sc_nactive);
/*
* Free resources and return to the caller.
*/
if (im != NULL) {
if (mapped)
iop_msg_unmap(iop, im);
iop_msg_free(iop, im);
}
if (mapped)
iop_msg_unmap(iop, im);
for (i = 0; i <= nbuf; i++) {
if (bufs[i].db_proc != NULL)
continue;
if (!bufs[i].db_out && rv == 0) {
for (j = 0, sz = 0; j < bufs[i].db_nfrag; j++) {
rv = copyout(bufs[i].db_ptr + sz,
bufs[i].db_frags[j].iov_base,
bufs[i].db_frags[j].iov_len);
if (rv != 0)
break;
sz += bufs[i].db_frags[j].iov_len;
}
}
if (bufs[i].db_ptr != NULL)
free(bufs[i].db_ptr, M_DEVBUF);
}
iop_msg_free(iop, im);
return (rv);
}

384
sys/dev/i2o/dptivar.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: dptivar.h,v 1.1 2001/09/21 23:44:20 ad Exp $ */
/* $NetBSD: dptivar.h,v 1.2 2001/09/27 18:43:37 ad Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@ -62,6 +62,8 @@
#ifndef _I2O_DPTIVAR_H_
#define _I2O_DPTIVAR_H_
#define DPTI_MAX_SEGS 17
/*
* Runtime state.
*/
@ -72,10 +74,12 @@ struct dpti_softc {
};
struct dpti_ptbuf {
void *db_ptr;
caddr_t db_ptr;
struct proc *db_proc;
int db_size;
int db_out;
int db_nfrag;
struct iovec db_frags[DPTI_MAX_SEGS];
};
/*
@ -126,9 +130,9 @@ struct dpt_ctlrinfo {
u_int32_t reserved2;
u_int32_t reserved3;
};
#define FLG_OSD_PCI_VALID 0x0001
#define FLG_OSD_DMA 0x0002
#define FLG_OSD_I2O 0x0004
#define FLG_OSD_PCI_VALID 0x0001
#define FLG_OSD_DMA 0x0002
#define FLG_OSD_I2O 0x0004
struct dpt_targetbusy {
u_long channel;
@ -164,230 +168,280 @@ struct dpt_sig {
char dsDescription[dsDescription_size];
};
struct dpt_dparam {
u_int16_t cylinders; /* Upto 1024 */
u_int8_t heads; /* Upto 255 */
u_int8_t sectors; /* Upto 63 */
};
struct dpt_sysinfo {
u_int8_t drive0CMOS; /* CMOS Drive 0 Type */
u_int8_t drive1CMOS; /* CMOS Drive 1 Type */
u_int8_t numDrives; /* 0040:0075 contents */
u_int8_t processorFamily; /* Same as DPTSIG's defs */
u_int8_t processorType; /* Same as DPTSIG's defs */
u_int8_t smartROMMajorVersion;
u_int8_t smartROMMinorVersion; /* SmartROM version */
u_int8_t smartROMRevision;
u_int16_t flags; /* See bit definitions above */
u_int16_t conventionalMemSize; /* in KB */
u_int32_t extendedMemSize; /* in KB */
u_int32_t osType; /* Same as DPTSIG's defs */
u_int8_t osMajorVersion;
u_int8_t osMinorVersion; /* The OS version */
u_int8_t osRevision;
u_int8_t osSubRevision;
u_int8_t busType; /* See defininitions above */
u_int8_t pad[3]; /* For alignment */
struct dpt_dparam drives[16]; /* SmartROM Logical Drives */
};
/*
* Defs pertaning to dpt_sig.
* Defs pertaining to dpt_sysinfo.
*/
#define SI_CMOS_Valid 0x0001
#define SI_NumDrivesValid 0x0002
#define SI_ProcessorValid 0x0004
#define SI_MemorySizeValid 0x0008
#define SI_DriveParamsValid 0x0010
#define SI_SmartROMverValid 0x0020
#define SI_OSversionValid 0x0040
#define SI_OSspecificValid 0x0080
#define SI_BusTypeValid 0x0100
#define SI_ALL_VALID 0x0FFF
#define SI_NO_SmartROM 0x8000
#define SI_ISA_BUS 0x00
#define SI_MCA_BUS 0x01
#define SI_EISA_BUS 0x02
#define SI_PCI_BUS 0x04
/*
* Defs pertaining to dpt_sig.
*/
/* Current Signature Version - u_int8_t dsSigVersion; */
/* ------------------------------------------------------------------ */
#define SIG_VERSION 1
#define SIG_VERSION 1
/* Processor Family - u_int8_t dsProcessorFamily; DISTINCT VALUES */
/* ------------------------------------------------------------------ */
/* What type of processor the file is meant to run on. */
/* This will let us know whether to read u_int16_ts as high/low or low/high. */
#define PROC_INTEL 0x00 /* Intel 80x86 */
#define PROC_MOTOROLA 0x01 /* Motorola 68K */
#define PROC_MIPS4000 0x02 /* MIPS RISC 4000 */
#define PROC_MIPS 0x02 /* MIPS RISC */
#define PROC_ALPHA 0x03 /* DEC Alpha */
#define PROC_POWERPC 0x04 /* IBM Power PC */
#define PROC_i960 0x05 /* Intel i960 */
#define PROC_ULTRASPARC 0x06 /* SPARC processor */
#define PROC_INTEL 0x00 /* Intel 80x86 */
#define PROC_MOTOROLA 0x01 /* Motorola 68K */
#define PROC_MIPS4000 0x02 /* MIPS RISC 4000 */
#define PROC_MIPS 0x02 /* MIPS RISC */
#define PROC_ALPHA 0x03 /* DEC Alpha */
#define PROC_POWERPC 0x04 /* IBM Power PC */
#define PROC_i960 0x05 /* Intel i960 */
#define PROC_ULTRASPARC 0x06 /* SPARC processor */
/* Specific Minimim Processor - u_int8_t dsProcessor; FLAG BITS */
/* ------------------------------------------------------------------ */
/* Different bit definitions dependent on processor_family */
/* PROC_INTEL: */
#define PROC_8086 0x01 /* Intel 8086 */
#define PROC_286 0x02 /* Intel 80286 */
#define PROC_386 0x04 /* Intel 80386 */
#define PROC_486 0x08 /* Intel 80486 */
#define PROC_PENTIUM 0x10 /* Intel 586 aka P5 aka Pentium */
#define PROC_SEXIUM 0x20 /* Intel 686 aka P6 aka Pentium Pro or MMX */
#define PROC_8086 0x01 /* Intel 8086 */
#define PROC_286 0x02 /* Intel 80286 */
#define PROC_386 0x04 /* Intel 80386 */
#define PROC_486 0x08 /* Intel 80486 */
#define PROC_PENTIUM 0x10 /* Intel 586 aka P5 aka Pentium */
#define PROC_SEXIUM 0x20 /* Intel 686 aka P6 aka Pentium Pro or MMX */
/* PROC_i960: */
#define PROC_960RX 0x01 /* Intel 80960RP/RD */
#define PROC_960HX 0x02 /* Intel 80960HA/HD/HT */
#define PROC_960RN 0x03 /* Intel 80960RN/RM */
#define PROC_960RS 0x04 /* Intel 80960RS */
#define PROC_960RX 0x01 /* Intel 80960RP/RD */
#define PROC_960HX 0x02 /* Intel 80960HA/HD/HT */
#define PROC_960RN 0x03 /* Intel 80960RN/RM */
#define PROC_960RS 0x04 /* Intel 80960RS */
/* PROC_MOTOROLA: */
#define PROC_68000 0x01 /* Motorola 68000 */
#define PROC_68010 0x02 /* Motorola 68010 */
#define PROC_68020 0x04 /* Motorola 68020 */
#define PROC_68030 0x08 /* Motorola 68030 */
#define PROC_68040 0x10 /* Motorola 68040 */
#define PROC_68000 0x01 /* Motorola 68000 */
#define PROC_68010 0x02 /* Motorola 68010 */
#define PROC_68020 0x04 /* Motorola 68020 */
#define PROC_68030 0x08 /* Motorola 68030 */
#define PROC_68040 0x10 /* Motorola 68040 */
/* PROC_POWERPC */
#define PROC_PPC601 0x01 /* PowerPC 601 */
#define PROC_PPC603 0x02 /* PowerPC 603 */
#define PROC_PPC604 0x04 /* PowerPC 604 */
#define PROC_PPC601 0x01 /* PowerPC 601 */
#define PROC_PPC603 0x02 /* PowerPC 603 */
#define PROC_PPC604 0x04 /* PowerPC 604 */
/* PROC_MIPS */
#define PROC_R4000 0x01 /* MIPS R4000 */
#define PROC_RM7000 0x02 /* MIPS RM7000 */
#define PROC_R4000 0x01 /* MIPS R4000 */
#define PROC_RM7000 0x02 /* MIPS RM7000 */
/* Filetype - u_int8_t dsFiletype; DISTINCT VALUES */
/* ------------------------------------------------------------------ */
#define FT_EXECUTABLE 0 /* Executable Program */
#define FT_SCRIPT 1 /* Script/Batch File??? */
#define FT_HBADRVR 2 /* HBA Driver */
#define FT_OTHERDRVR 3 /* Other Driver */
#define FT_IFS 4 /* Installable Filesystem Driver */
#define FT_ENGINE 5 /* DPT Engine */
#define FT_COMPDRVR 6 /* Compressed Driver Disk */
#define FT_LANGUAGE 7 /* Foreign Language file */
#define FT_FIRMWARE 8 /* Downloadable or actual Firmware */
#define FT_COMMMODL 9 /* Communications Module */
#define FT_INT13 10 /* INT 13 style HBA Driver */
#define FT_HELPFILE 11 /* Help file */
#define FT_LOGGER 12 /* Event Logger */
#define FT_INSTALL 13 /* An Install Program */
#define FT_LIBRARY 14 /* Storage Manager Real-Mode Calls */
#define FT_RESOURCE 15 /* Storage Manager Resource File */
#define FT_MODEM_DB 16 /* Storage Manager Modem Database */
#define FT_EXECUTABLE 0 /* Executable Program */
#define FT_SCRIPT 1 /* Script/Batch File??? */
#define FT_HBADRVR 2 /* HBA Driver */
#define FT_OTHERDRVR 3 /* Other Driver */
#define FT_IFS 4 /* Installable Filesystem Driver */
#define FT_ENGINE 5 /* DPT Engine */
#define FT_COMPDRVR 6 /* Compressed Driver Disk */
#define FT_LANGUAGE 7 /* Foreign Language file */
#define FT_FIRMWARE 8 /* Downloadable or actual Firmware */
#define FT_COMMMODL 9 /* Communications Module */
#define FT_INT13 10 /* INT 13 style HBA Driver */
#define FT_HELPFILE 11 /* Help file */
#define FT_LOGGER 12 /* Event Logger */
#define FT_INSTALL 13 /* An Install Program */
#define FT_LIBRARY 14 /* Storage Manager Real-Mode Calls */
#define FT_RESOURCE 15 /* Storage Manager Resource File */
#define FT_MODEM_DB 16 /* Storage Manager Modem Database */
/* Filetype flags - u_int8_t dsFiletypeFlags; FLAG BITS */
/* ------------------------------------------------------------------ */
#define FTF_DLL 0x01 /* Dynamic Link Library */
#define FTF_NLM 0x02 /* Netware Loadable Module */
#define FTF_OVERLAYS 0x04 /* Uses overlays */
#define FTF_DEBUG 0x08 /* Debug version */
#define FTF_TSR 0x10 /* TSR */
#define FTF_SYS 0x20 /* DOS Loadable driver */
#define FTF_PROTECTED 0x40 /* Runs in protected mode */
#define FTF_APP_SPEC 0x80 /* Application Specific */
#define FTF_ROM (FTF_SYS|FTF_TSR) /* Special Case */
#define FTF_DLL 0x01 /* Dynamic Link Library */
#define FTF_NLM 0x02 /* Netware Loadable Module */
#define FTF_OVERLAYS 0x04 /* Uses overlays */
#define FTF_DEBUG 0x08 /* Debug version */
#define FTF_TSR 0x10 /* TSR */
#define FTF_SYS 0x20 /* DOS Loadable driver */
#define FTF_PROTECTED 0x40 /* Runs in protected mode */
#define FTF_APP_SPEC 0x80 /* Application Specific */
#define FTF_ROM (FTF_SYS|FTF_TSR) /* Special Case */
/* OEM - u_int8_t dsOEM; DISTINCT VALUES */
/* ------------------------------------------------------------------ */
#define OEM_DPT 0 /* DPT */
#define OEM_ATT 1 /* ATT */
#define OEM_NEC 2 /* NEC */
#define OEM_ALPHA 3 /* Alphatronix */
#define OEM_AST 4 /* AST */
#define OEM_OLIVETTI 5 /* Olivetti */
#define OEM_SNI 6 /* Siemens/Nixdorf */
#define OEM_SUN 7 /* SUN Microsystems */
#define OEM_ADAPTEC 8 /* Adaptec */
#define OEM_DPT 0 /* DPT */
#define OEM_ATT 1 /* ATT */
#define OEM_NEC 2 /* NEC */
#define OEM_ALPHA 3 /* Alphatronix */
#define OEM_AST 4 /* AST */
#define OEM_OLIVETTI 5 /* Olivetti */
#define OEM_SNI 6 /* Siemens/Nixdorf */
#define OEM_SUN 7 /* SUN Microsystems */
#define OEM_ADAPTEC 8 /* Adaptec */
/* Operating System - u_int32_t dsOS; FLAG BITS */
/* ------------------------------------------------------------------ */
#define OS_DOS 0x00000001 /* PC/MS-DOS */
#define OS_WINDOWS 0x00000002 /* Microsoft Windows 3.x */
#define OS_WINDOWS_NT 0x00000004 /* Microsoft Windows NT */
#define OS_OS2M 0x00000008 /* OS/2 1.2.x,MS 1.3.0,IBM 1.3.x - Monolithic */
#define OS_OS2L 0x00000010 /* Microsoft OS/2 1.301 - LADDR */
#define OS_OS22x 0x00000020 /* IBM OS/2 2.x */
#define OS_NW286 0x00000040 /* Novell NetWare 286 */
#define OS_NW386 0x00000080 /* Novell NetWare 386 */
#define OS_GEN_UNIX 0x00000100 /* Generic Unix */
#define OS_SCO_UNIX 0x00000200 /* SCO Unix */
#define OS_ATT_UNIX 0x00000400 /* ATT Unix */
#define OS_UNIXWARE 0x00000800 /* USL Unix */
#define OS_INT_UNIX 0x00001000 /* Interactive Unix */
#define OS_SOLARIS 0x00002000 /* SunSoft Solaris */
#define OS_QNX 0x00004000 /* QNX for Tom Moch */
#define OS_NEXTSTEP 0x00008000 /* NeXTSTEP/OPENSTEP/MACH */
#define OS_BANYAN 0x00010000 /* Banyan Vines */
#define OS_OLIVETTI_UNIX 0x00020000/* Olivetti Unix */
#define OS_MAC_OS 0x00040000 /* Mac OS */
#define OS_WINDOWS_95 0x00080000 /* Microsoft Windows '95 */
#define OS_NW4x 0x00100000 /* Novell Netware 4.x */
#define OS_BSDI_UNIX 0x00200000 /* BSDi Unix BSD/OS 2.0 and up */
#define OS_AIX_UNIX 0x00400000 /* AIX Unix */
#define OS_FREE_BSD 0x00800000 /* FreeBSD Unix */
#define OS_LINUX 0x01000000 /* Linux */
#define OS_DGUX_UNIX 0x02000000 /* Data General Unix */
#define OS_SINIX_N 0x04000000 /* SNI SINIX-N */
#define OS_PLAN9 0x08000000 /* ATT Plan 9 */
#define OS_TSX 0x10000000 /* SNH TSX-32 */
#define OS_WINDOWS_98 0x20000000 /* Microsoft Windows '98 */
#define OS_DOS 0x00000001 /* PC/MS-DOS */
#define OS_WINDOWS 0x00000002 /* Microsoft Windows 3.x */
#define OS_WINDOWS_NT 0x00000004 /* Microsoft Windows NT */
#define OS_OS2M 0x00000008 /* OS/2 1.2.x,MS 1.3.0,IBM 1.3.x - Monolithic */
#define OS_OS2L 0x00000010 /* Microsoft OS/2 1.301 - LADDR */
#define OS_OS22x 0x00000020 /* IBM OS/2 2.x */
#define OS_NW286 0x00000040 /* Novell NetWare 286 */
#define OS_NW386 0x00000080 /* Novell NetWare 386 */
#define OS_GEN_UNIX 0x00000100 /* Generic Unix */
#define OS_SCO_UNIX 0x00000200 /* SCO Unix */
#define OS_ATT_UNIX 0x00000400 /* ATT Unix */
#define OS_UNIXWARE 0x00000800 /* USL Unix */
#define OS_INT_UNIX 0x00001000 /* Interactive Unix */
#define OS_SOLARIS 0x00002000 /* SunSoft Solaris */
#define OS_QNX 0x00004000 /* QNX for Tom Moch */
#define OS_NEXTSTEP 0x00008000 /* NeXTSTEP/OPENSTEP/MACH */
#define OS_BANYAN 0x00010000 /* Banyan Vines */
#define OS_OLIVETTI_UNIX 0x00020000/* Olivetti Unix */
#define OS_MAC_OS 0x00040000 /* Mac OS */
#define OS_WINDOWS_95 0x00080000 /* Microsoft Windows '95 */
#define OS_NW4x 0x00100000 /* Novell Netware 4.x */
#define OS_BSDI_UNIX 0x00200000 /* BSDi Unix BSD/OS 2.0 and up */
#define OS_AIX_UNIX 0x00400000 /* AIX Unix */
#define OS_FREE_BSD 0x00800000 /* FreeBSD Unix */
#define OS_LINUX 0x01000000 /* Linux */
#define OS_DGUX_UNIX 0x02000000 /* Data General Unix */
#define OS_SINIX_N 0x04000000 /* SNI SINIX-N */
#define OS_PLAN9 0x08000000 /* ATT Plan 9 */
#define OS_TSX 0x10000000 /* SNH TSX-32 */
#define OS_WINDOWS_98 0x20000000 /* Microsoft Windows '98 */
#define OS_OTHER 0x80000000 /* Other */
#define OS_OTHER 0x80000000 /* Other */
/* Capabilities - u_int16_t dsCapabilities; FLAG BITS */
/* ------------------------------------------------------------------ */
#define CAP_RAID0 0x0001 /* RAID-0 */
#define CAP_RAID1 0x0002 /* RAID-1 */
#define CAP_RAID3 0x0004 /* RAID-3 */
#define CAP_RAID5 0x0008 /* RAID-5 */
#define CAP_SPAN 0x0010 /* Spanning */
#define CAP_PASS 0x0020 /* Provides passthrough */
#define CAP_OVERLAP 0x0040 /* Passthrough supports overlapped commands */
#define CAP_ASPI 0x0080 /* Supports ASPI Command Requests */
#define CAP_ABOVE16MB 0x0100 /* ISA Driver supports greater than 16MB */
#define CAP_EXTEND 0x8000 /* Extended info appears after description */
#define CAP_RAID0 0x0001 /* RAID-0 */
#define CAP_RAID1 0x0002 /* RAID-1 */
#define CAP_RAID3 0x0004 /* RAID-3 */
#define CAP_RAID5 0x0008 /* RAID-5 */
#define CAP_SPAN 0x0010 /* Spanning */
#define CAP_PASS 0x0020 /* Provides passthrough */
#define CAP_OVERLAP 0x0040 /* Passthrough supports overlapped commands */
#define CAP_ASPI 0x0080 /* Supports ASPI Command Requests */
#define CAP_ABOVE16MB 0x0100 /* ISA Driver supports greater than 16MB */
#define CAP_EXTEND 0x8000 /* Extended info appears after description */
#ifdef SNI_MIPS
#define CAP_CACHEMODE 0x1000 /* dpt_force_cache is set in driver */
#define CAP_CACHEMODE 0x1000 /* dpt_force_cache is set in driver */
#endif
/* Devices Supported - u_int16_t dsDeviceSupp; FLAG BITS */
/* ------------------------------------------------------------------ */
#define DEV_DASD 0x0001 /* DASD (hard drives) */
#define DEV_TAPE 0x0002 /* Tape drives */
#define DEV_PRINTER 0x0004 /* Printers */
#define DEV_PROC 0x0008 /* Processors */
#define DEV_WORM 0x0010 /* WORM drives */
#define DEV_CDROM 0x0020 /* CD-ROM drives */
#define DEV_SCANNER 0x0040 /* Scanners */
#define DEV_OPTICAL 0x0080 /* Optical Drives */
#define DEV_JUKEBOX 0x0100 /* Jukebox */
#define DEV_COMM 0x0200 /* Communications Devices */
#define DEV_OTHER 0x0400 /* Other Devices */
#define DEV_ALL 0xFFFF /* All SCSI Devices */
#define DEV_DASD 0x0001 /* DASD (hard drives) */
#define DEV_TAPE 0x0002 /* Tape drives */
#define DEV_PRINTER 0x0004 /* Printers */
#define DEV_PROC 0x0008 /* Processors */
#define DEV_WORM 0x0010 /* WORM drives */
#define DEV_CDROM 0x0020 /* CD-ROM drives */
#define DEV_SCANNER 0x0040 /* Scanners */
#define DEV_OPTICAL 0x0080 /* Optical Drives */
#define DEV_JUKEBOX 0x0100 /* Jukebox */
#define DEV_COMM 0x0200 /* Communications Devices */
#define DEV_OTHER 0x0400 /* Other Devices */
#define DEV_ALL 0xFFFF /* All SCSI Devices */
/* Adapters Families Supported - u_int16_t dsAdapterSupp; FLAG BITS */
/* ------------------------------------------------------------------ */
#define ADF_2001 0x0001 /* PM2001 */
#define ADF_2012A 0x0002 /* PM2012A */
#define ADF_PLUS_ISA 0x0004 /* PM2011,PM2021 */
#define ADF_PLUS_EISA 0x0008 /* PM2012B,PM2022 */
#define ADF_SC3_ISA 0x0010 /* PM2021 */
#define ADF_SC3_EISA 0x0020 /* PM2022,PM2122, etc */
#define ADF_SC3_PCI 0x0040 /* SmartCache III PCI */
#define ADF_SC4_ISA 0x0080 /* SmartCache IV ISA */
#define ADF_SC4_EISA 0x0100 /* SmartCache IV EISA */
#define ADF_SC4_PCI 0x0200 /* SmartCache IV PCI */
#define ADF_SC5_PCI 0x0400 /* Fifth Generation I2O products */
#define ADF_2001 0x0001 /* PM2001 */
#define ADF_2012A 0x0002 /* PM2012A */
#define ADF_PLUS_ISA 0x0004 /* PM2011,PM2021 */
#define ADF_PLUS_EISA 0x0008 /* PM2012B,PM2022 */
#define ADF_SC3_ISA 0x0010 /* PM2021 */
#define ADF_SC3_EISA 0x0020 /* PM2022,PM2122, etc */
#define ADF_SC3_PCI 0x0040 /* SmartCache III PCI */
#define ADF_SC4_ISA 0x0080 /* SmartCache IV ISA */
#define ADF_SC4_EISA 0x0100 /* SmartCache IV EISA */
#define ADF_SC4_PCI 0x0200 /* SmartCache IV PCI */
#define ADF_SC5_PCI 0x0400 /* Fifth Generation I2O products */
/*
* Combinations of products
*/
#define ADF_ALL_2000 (ADF_2001|ADF_2012A)
#define ADF_ALL_PLUS (ADF_PLUS_ISA|ADF_PLUS_EISA)
#define ADF_ALL_SC3 (ADF_SC3_ISA|ADF_SC3_EISA|ADF_SC3_PCI)
#define ADF_ALL_SC4 (ADF_SC4_ISA|ADF_SC4_EISA|ADF_SC4_PCI)
#define ADF_ALL_SC5 (ADF_SC5_PCI)
#define ADF_ALL_2000 (ADF_2001|ADF_2012A)
#define ADF_ALL_PLUS (ADF_PLUS_ISA|ADF_PLUS_EISA)
#define ADF_ALL_SC3 (ADF_SC3_ISA|ADF_SC3_EISA|ADF_SC3_PCI)
#define ADF_ALL_SC4 (ADF_SC4_ISA|ADF_SC4_EISA|ADF_SC4_PCI)
#define ADF_ALL_SC5 (ADF_SC5_PCI)
/* All EATA Cacheing Products */
#define ADF_ALL_CACHE (ADF_ALL_PLUS|ADF_ALL_SC3|ADF_ALL_SC4)
#define ADF_ALL_CACHE (ADF_ALL_PLUS|ADF_ALL_SC3|ADF_ALL_SC4)
/* All EATA Bus Mastering Products */
#define ADF_ALL_MASTER (ADF_2012A|ADF_ALL_CACHE)
#define ADF_ALL_MASTER (ADF_2012A|ADF_ALL_CACHE)
/* All EATA Adapter Products */
#define ADF_ALL_EATA (ADF_2001|ADF_ALL_MASTER)
#define ADF_ALL ADF_ALL_EATA
#define ADF_ALL_EATA (ADF_2001|ADF_ALL_MASTER)
#define ADF_ALL ADF_ALL_EATA
/* Application - u_int16_t dsApplication; FLAG BITS */
/* ------------------------------------------------------------------ */
#define APP_DPTMGR 0x0001 /* DPT Storage Manager */
#define APP_ENGINE 0x0002 /* DPT Engine */
#define APP_SYTOS 0x0004 /* Sytron Sytos Plus */
#define APP_CHEYENNE 0x0008 /* Cheyenne ARCServe + ARCSolo */
#define APP_MSCDEX 0x0010 /* Microsoft CD-ROM extensions */
#define APP_NOVABACK 0x0020 /* NovaStor Novaback */
#define APP_AIM 0x0040 /* Archive Information Manager */
#define APP_DPTMGR 0x0001 /* DPT Storage Manager */
#define APP_ENGINE 0x0002 /* DPT Engine */
#define APP_SYTOS 0x0004 /* Sytron Sytos Plus */
#define APP_CHEYENNE 0x0008 /* Cheyenne ARCServe + ARCSolo */
#define APP_MSCDEX 0x0010 /* Microsoft CD-ROM extensions */
#define APP_NOVABACK 0x0020 /* NovaStor Novaback */
#define APP_AIM 0x0040 /* Archive Information Manager */
/* Requirements - u_int8_t dsRequirements; FLAG BITS */
/* ------------------------------------------------------------------ */
#define REQ_SMARTROM 0x01 /* Requires SmartROM to be present */
#define REQ_DPTDDL 0x02 /* Requires DPTDDL.SYS to be loaded */
#define REQ_HBA_DRIVER 0x04 /* Requires an HBA driver to be loaded */
#define REQ_ASPI_TRAN 0x08 /* Requires an ASPI Transport Modules */
#define REQ_ENGINE 0x10 /* Requires a DPT Engine to be loaded */
#define REQ_COMM_ENG 0x20 /* Requires a DPT Communications Engine */
#define REQ_SMARTROM 0x01 /* Requires SmartROM to be present */
#define REQ_DPTDDL 0x02 /* Requires DPTDDL.SYS to be loaded */
#define REQ_HBA_DRIVER 0x04 /* Requires an HBA driver to be loaded */
#define REQ_ASPI_TRAN 0x08 /* Requires an ASPI Transport Modules */
#define REQ_ENGINE 0x10 /* Requires a DPT Engine to be loaded */
#define REQ_COMM_ENG 0x20 /* Requires a DPT Communications Engine */
/* ------------------------------------------------------------------ */
/* Requirements - u_int16_t dsFirmware; FLAG BITS */
/* ------------------------------------------------------------------ */
#define dsFirmware dsApplication
#define FW_DNLDSIZE0 0x0000 /* 0..2 DownLoader Size - NONE */
#define FW_DNLDSIZE16 0x0001 /* 0..2 DownLoader Size 16K */
#define FW_DNLDSIZE32 0x0002 /* 0..2 DownLoader Size 32K */
#define FW_DNLDSIZE64 0x0004 /* 0..2 DownLoader Size 64K */
#define dsFirmware dsApplication
#define FW_DNLDSIZE0 0x0000 /* 0..2 DownLoader Size - NONE */
#define FW_DNLDSIZE16 0x0001 /* 0..2 DownLoader Size 16K */
#define FW_DNLDSIZE32 0x0002 /* 0..2 DownLoader Size 32K */
#define FW_DNLDSIZE64 0x0004 /* 0..2 DownLoader Size 64K */
#define FW_LOAD_BTM 0x2000 /* 13 Load Offset (1=Btm, 0=Top) */
#define FW_LOAD_TOP 0x0000 /* 13 Load Offset (1=Btm, 0=Top) */
#define FW_SIG_VERSION1 0x0000 /* 15..14 Version Bits 0=Ver1 */
#define FW_LOAD_BTM 0x2000 /* 13 Load Offset (1=Btm, 0=Top) */
#define FW_LOAD_TOP 0x0000 /* 13 Load Offset (1=Btm, 0=Top) */
#define FW_SIG_VERSION1 0x0000 /* 15..14 Version Bits 0=Ver1 */
#endif /* !_I2O_DPTIVAR_H_ */

40
sys/dev/i2o/iop.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: iop.c,v 1.18 2001/09/21 23:44:21 ad Exp $ */
/* $NetBSD: iop.c,v 1.19 2001/09/27 18:43:37 ad Exp $ */
/*-
* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
@ -349,6 +349,17 @@ iop_init(struct iop_softc *sc, const char *intrstr)
sc->sc_maxib = le32toh(sc->sc_status.maxinboundmframes);
if (sc->sc_maxib > IOP_MAX_INBOUND)
sc->sc_maxib = IOP_MAX_INBOUND;
sc->sc_framesize = le16toh(sc->sc_status.inboundmframesize) << 2;
if (sc->sc_framesize > IOP_MAX_MSG_SIZE)
sc->sc_framesize = IOP_MAX_MSG_SIZE;
#if defined(I2ODEBUG) || defined(DIAGNOSTIC)
if (sc->sc_framesize < IOP_MIN_MSG_SIZE) {
printf("%s: frame size too small (%d)\n",
sc->sc_dv.dv_xname, sc->sc_framesize);
return;
}
#endif
/* Allocate message wrappers. */
im = malloc(sizeof(*im) * sc->sc_maxib, M_DEVBUF, M_NOWAIT);
@ -959,7 +970,7 @@ iop_ofifo_init(struct iop_softc *sc)
mf->msgictx = IOP_ICTX;
mf->msgtctx = 0;
mf->pagesize = PAGE_SIZE;
mf->flags = IOP_INIT_CODE | ((IOP_MAX_MSG_SIZE >> 2) << 16);
mf->flags = IOP_INIT_CODE | ((sc->sc_framesize >> 2) << 16);
/*
* The I2O spec says that there are two SGLs: one for the status
@ -993,7 +1004,7 @@ iop_ofifo_init(struct iop_softc *sc)
/* Allocate DMA safe memory for the reply frames. */
if (sc->sc_rep_phys == 0) {
sc->sc_rep_size = sc->sc_maxob * IOP_MAX_MSG_SIZE;
sc->sc_rep_size = sc->sc_maxob * sc->sc_framesize;
rv = bus_dmamem_alloc(sc->sc_dmat, sc->sc_rep_size, PAGE_SIZE,
0, &seg, 1, &rseg, BUS_DMA_NOWAIT);
@ -1031,7 +1042,7 @@ iop_ofifo_init(struct iop_softc *sc)
/* Populate the outbound FIFO. */
for (i = sc->sc_maxob, addr = sc->sc_rep_phys; i != 0; i--) {
iop_outl(sc, IOP_REG_OFIFO, (u_int32_t)addr);
addr += IOP_MAX_MSG_SIZE;
addr += sc->sc_framesize;
}
return (0);
@ -1599,7 +1610,7 @@ iop_handle_reply(struct iop_softc *sc, u_int32_t rmfa)
/* Perform reply queue DMA synchronisation. */
bus_dmamap_sync(sc->sc_dmat, sc->sc_rep_dmamap, off,
IOP_MAX_MSG_SIZE, BUS_DMASYNC_POSTREAD);
sc->sc_framesize, BUS_DMASYNC_POSTREAD);
if (--sc->sc_curib != 0)
bus_dmamap_sync(sc->sc_dmat, sc->sc_rep_dmamap,
0, sc->sc_rep_size, BUS_DMASYNC_PREREAD);
@ -1689,7 +1700,7 @@ iop_handle_reply(struct iop_softc *sc, u_int32_t rmfa)
if (im->im_rb != NULL) {
size = (le32toh(rb->msgflags) >> 14) & ~3;
#ifdef I2ODEBUG
if (size > IOP_MAX_MSG_SIZE)
if (size > sc->sc_framesize)
panic("iop_handle_reply: reply too large");
#endif
memcpy(im->im_rb, rb, size);
@ -1863,7 +1874,7 @@ iop_msg_map(struct iop_softc *sc, struct iop_msg *im, u_int32_t *mb,
*/
off = mb[0] >> 16;
p = mb + off;
nsegs = ((IOP_MAX_MSG_SIZE / 4) - off) >> 1;
nsegs = ((sc->sc_framesize >> 2) - off) >> 1;
if (dm->dm_nsegs > nsegs) {
bus_dmamap_unload(sc->sc_dmat, ix->ix_map);
@ -1949,7 +1960,7 @@ iop_msg_map_bio(struct iop_softc *sc, struct iop_msg *im, u_int32_t *mb,
return (rv);
off = mb[0] >> 16;
nsegs = ((IOP_MAX_MSG_SIZE / 4) - off) >> 1;
nsegs = ((sc->sc_framesize >> 2) - off) >> 1;
/*
* If the transfer is highly fragmented and won't fit using SIMPLE
@ -2053,7 +2064,7 @@ iop_post(struct iop_softc *sc, u_int32_t *mb)
int s;
#ifdef I2ODEBUG
if ((mb[0] >> 16) > IOP_MAX_MSG_SIZE / 4)
if ((mb[0] >> 16) > (sc->sc_framesize >> 2))
panic("iop_post: frame too large");
#endif
@ -2266,7 +2277,7 @@ iop_tfn_print(struct iop_softc *sc, struct i2o_fault_notify *fn)
printf("%s: WARNING: transport failure:\n", sc->sc_dv.dv_xname);
printf("%s: ictx=0x%08x tctx=0x%08x\n", sc->sc_dv.dv_xname,
printf("%s: ictx=0x%08x tctx=0x%08x\n", sc->sc_dv.dv_xname,
le32toh(fn->msgictx), le32toh(fn->msgtctx));
printf("%s: failurecode=0x%02x severity=0x%02x\n",
sc->sc_dv.dv_xname, fn->failurecode, fn->severity);
@ -2520,8 +2531,7 @@ iop_passthrough(struct iop_softc *sc, struct ioppt *pt, struct proc *p)
im = NULL;
mapped = 1;
if (pt->pt_msglen > IOP_MAX_MSG_SIZE ||
pt->pt_msglen > (le16toh(sc->sc_status.inboundmframesize) << 2) ||
if (pt->pt_msglen > sc->sc_framesize ||
pt->pt_msglen < sizeof(struct i2o_msg) ||
pt->pt_nbufs > IOP_MAX_MSG_XFERS ||
pt->pt_nbufs < 0 || pt->pt_replylen < 0 ||
@ -2534,7 +2544,7 @@ iop_passthrough(struct iop_softc *sc, struct ioppt *pt, struct proc *p)
goto bad;
}
mf = malloc(IOP_MAX_MSG_SIZE, M_DEVBUF, M_WAITOK);
mf = malloc(sc->sc_framesize, M_DEVBUF, M_WAITOK);
if (mf == NULL)
return (ENOMEM);
@ -2559,8 +2569,8 @@ iop_passthrough(struct iop_softc *sc, struct ioppt *pt, struct proc *p)
goto bad;
i = (le32toh(im->im_rb->msgflags) >> 14) & ~3;
if (i > IOP_MAX_MSG_SIZE)
i = IOP_MAX_MSG_SIZE;
if (i > sc->sc_framesize)
i = sc->sc_framesize;
if (i > pt->pt_replylen)
i = pt->pt_replylen;
rv = copyout(im->im_rb, pt->pt_reply, i);

5
sys/dev/i2o/iopio.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: iopio.h,v 1.1 2001/03/20 13:02:25 ad Exp $ */
/* $NetBSD: iopio.h,v 1.2 2001/09/27 18:43:38 ad Exp $ */
/*-
* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
@ -44,7 +44,8 @@
#define IOP_MAX_INBOUND 256 /* Maximum inbound queue depth */
#define IOP_MF_RESERVE 4 /* Frames to reserve for ctl ops */
#define IOP_MAX_XFER 64*1024 /* Maximum transfer size */
#define IOP_MAX_MSG_SIZE 128 /* Maximum message frame size */
#define IOP_MAX_MSG_SIZE 160 /* Maximum message frame size */
#define IOP_MIN_MSG_SIZE 128 /* Minumum size supported by IOP */
struct iop_tidmap {
u_short it_tid;

3
sys/dev/i2o/iopvar.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: iopvar.h,v 1.9 2001/09/21 23:44:21 ad Exp $ */
/* $NetBSD: iopvar.h,v 1.10 2001/09/27 18:43:38 ad Exp $ */
/*-
* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
@ -125,6 +125,7 @@ struct iop_softc {
int sc_maxib; /* Max inbound (-> IOP) queue depth */
int sc_maxob; /* Max outbound (<- IOP) queue depth */
int sc_curib; /* Current inbound queue depth */
int sc_framesize; /* Max msg frame size in bytes */
struct i2o_hrt *sc_hrt; /* Hardware resource table */
struct iop_tidmap *sc_tidmap; /* TID map (per-LCT-entry flags) */