Sort options. Fix a few typos.

This commit is contained in:
wiz 2007-02-02 07:35:28 +00:00
parent 4400332b14
commit 401fd96995
1 changed files with 18 additions and 15 deletions

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@ -1,4 +1,4 @@
.\" $NetBSD: mb.9,v 1.1 2007/02/02 03:40:07 ad Exp $
.\" $NetBSD: mb.9,v 1.2 2007/02/02 07:35:28 wiz Exp $
.\"
.\" Copyright (c) 2007 The NetBSD Foundation, Inc.
.\" All rights reserved.
@ -35,7 +35,7 @@
.\" POSSIBILITY OF SUCH DAMAGE.
.\"
.Dd November 13, 2006
.Dt MUTEX 9
.Dt MB 9
.Os
.Sh NAME
.Nm mb ,
@ -70,9 +70,10 @@ and
.Fn mb_write
can be used to control the order in which memory acceses occur, and
thus the order in which those accesses become visible to other processors.
They can be used to implement "lockless" access to data structures where
They can be used to implement
.Dq lockless
access to data structures where
the necessary barrier conditions are well understood.
.Pp
.Sh FUNCTIONS
.Bl -tag -width abcd
.It Fn mb_memory ""
@ -98,13 +99,23 @@ to complete before execution continues.
Loads may be reordered ahead of or behind a call to
.Fn mb_write .
.El
.Sh SEE ALSO
.Xr bus_dma 9 ,
.Xr bus_space 9 ,
.Xr mutex 9 ,
.Xr rwlock 9
.Sh HISTORY
The memory barrier primitives first appeared in
.Nx 5.0 .
.Sh CAVEATS
Memory barriers cay be computationally expensive, as they are
considered "serializing" operations and may stall further execution
Memory barriers can be computationally expensive, as they are
considered
.Dq serializing
operations and may stall further execution
until the processor has drained internal buffers and re-synchronized.
.Pp
The memory barrier primitives control only the order of memory access.
They provide no guarantee that stores have been flused to the bus, or
They provide no guarantee that stores have been flushed to the bus, or
that loads have been made from the bus.
.Pp
The memory barrier primitives are guaranteed only to prevent reordering
@ -116,11 +127,3 @@ To guarantee ordering of access to device memory, the
and
.Xr bus_space 9
interfaces should be used.
.Sh SEE ALSO
.Xr bus_dma 9 ,
.Xr bus_space 9 ,
.Xr mutex 9 ,
.Xr rwlock 9
.Sh HISTORY
The memory barrier primitives first appeared in
.Nx 5.0 .