Adapt these for use on the Milan.
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@ -1,4 +1,4 @@
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/* $NetBSD: ser.c,v 1.12 2000/11/02 00:32:52 eeh Exp $ */
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/* $NetBSD: ser.c,v 1.13 2001/04/11 14:45:07 leo Exp $ */
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/*-
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* Copyright (c) 1997 The NetBSD Foundation, Inc.
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@ -104,6 +104,7 @@
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*/
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#include "opt_ddb.h"
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#include "opt_mbtype.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -125,9 +126,25 @@
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#include <machine/iomap.h>
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#include <machine/mfp.h>
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#include <atari/atari/intr.h>
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#include <atari/dev/ym2149reg.h>
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#include <atari/dev/serreg.h>
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#if !defined(_MILANHW_)
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#include <atari/dev/ym2149reg.h>
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#else
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/* MILAN has no ym2149 */
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#define ym2149_dtr(set) { \
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if (set) \
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single_inst_bset_b(MFP->mf_gpip, 0x08); \
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else single_inst_bclr_b(MFP->mf_gpip, 0x08); \
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}
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#define ym2149_rts(set) { \
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if (set) \
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single_inst_bset_b(MFP->mf_gpip, 0x01); \
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else single_inst_bclr_b(MFP->mf_gpip, 0x01); \
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}
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#endif /* _MILANHW_ */
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/* #define SER_DEBUG */
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#define SERUNIT(x) (minor(x) & 0x7ffff)
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@ -1,4 +1,4 @@
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/* $NetBSD: mfp.h,v 1.3 1997/07/15 08:26:08 leo Exp $ */
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/* $NetBSD: mfp.h,v 1.4 2001/04/11 14:45:07 leo Exp $ */
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/*
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* Copyright (c) 1995 Leo Weppelman.
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@ -32,6 +32,7 @@
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#ifndef _MACHINE_MFP_H
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#define _MACHINE_MFP_H
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/*
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* Atari TT hardware: MFP1/MFP2
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* Motorola 68901 Multi-Function Peripheral
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@ -40,34 +41,41 @@
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#define MFP ((struct mfp *)AD_MFP)
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#define MFP2 ((struct mfp *)AD_MFP2)
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#ifdef _MILANHW_
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#define __MR(n) (3 + (4 * n))
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#endif
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#ifdef _ATARIHW_
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#define __MR(n) (1 + (2 * n))
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#endif
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struct mfp {
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volatile u_char mfb[48]; /* use only the odd bytes */
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volatile u_char mfb[__MR(24)-1]; /* Sparse */
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};
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#define mf_gpip mfb[ 1] /* general purpose I/O interrupt port */
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#define mf_aer mfb[ 3] /* active edge register */
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#define mf_ddr mfb[ 5] /* data direction register */
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#define mf_iera mfb[ 7] /* interrupt enable register A */
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#define mf_ierb mfb[ 9] /* interrupt enable register B */
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#define mf_ipra mfb[11] /* interrupt pending register A */
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#define mf_iprb mfb[13] /* interrupt pending register B */
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#define mf_isra mfb[15] /* interrupt in-service register A */
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#define mf_isrb mfb[17] /* interrupt in-service register B */
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#define mf_imra mfb[19] /* interrupt mask register A */
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#define mf_imrb mfb[21] /* interrupt mask register B */
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#define mf_vr mfb[23] /* vector register */
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#define mf_tacr mfb[25] /* timer control register A */
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#define mf_tbcr mfb[27] /* timer control register B */
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#define mf_tcdcr mfb[29] /* timer control register C+D */
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#define mf_tadr mfb[31] /* timer data register A */
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#define mf_tbdr mfb[33] /* timer data register B */
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#define mf_tcdr mfb[35] /* timer data register C */
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#define mf_tddr mfb[37] /* timer data register D */
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#define mf_scr mfb[39] /* synchronous character register */
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#define mf_ucr mfb[41] /* USART control register */
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#define mf_rsr mfb[43] /* receiver status register */
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#define mf_tsr mfb[45] /* transmitter status register */
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#define mf_udr mfb[47] /* USART data register */
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#define mf_gpip mfb[__MR(0) ] /* gen-purp I/O interrupt port */
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#define mf_aer mfb[__MR(1) ] /* active edge register */
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#define mf_ddr mfb[__MR(2) ] /* data direction register */
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#define mf_iera mfb[__MR(3) ] /* interrupt enable register A */
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#define mf_ierb mfb[__MR(4) ] /* interrupt enable register B */
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#define mf_ipra mfb[__MR(5) ] /* interrupt pending register A */
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#define mf_iprb mfb[__MR(6) ] /* interrupt pending register B */
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#define mf_isra mfb[__MR(7) ] /* interrupt in-service register A */
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#define mf_isrb mfb[__MR(8) ] /* interrupt in-service register B */
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#define mf_imra mfb[__MR(9) ] /* interrupt mask register A */
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#define mf_imrb mfb[__MR(10)] /* interrupt mask register B */
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#define mf_vr mfb[__MR(11)] /* vector register */
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#define mf_tacr mfb[__MR(12)] /* timer control register A */
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#define mf_tbcr mfb[__MR(13)] /* timer control register B */
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#define mf_tcdcr mfb[__MR(14)] /* timer control register C+D */
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#define mf_tadr mfb[__MR(15)] /* timer data register A */
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#define mf_tbdr mfb[__MR(16)] /* timer data register B */
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#define mf_tcdr mfb[__MR(17)] /* timer data register C */
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#define mf_tddr mfb[__MR(18)] /* timer data register D */
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#define mf_scr mfb[__MR(19)] /* synchronous character register */
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#define mf_ucr mfb[__MR(20)] /* USART control register */
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#define mf_rsr mfb[__MR(21)] /* receiver status register */
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#define mf_tsr mfb[__MR(22)] /* transmitter status register */
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#define mf_udr mfb[__MR(23)] /* USART data register */
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/* names of IO port bits: */
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#define IO_PBSY 0x01 /* Parallel Busy */
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