enable to power off and reset card.
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uch
parent
c2e5d3b127
commit
3e92a012a2
@ -1,4 +1,4 @@
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/* $NetBSD: hd64461pcmcia.c,v 1.26 2004/07/11 16:04:58 uch Exp $ */
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/* $NetBSD: hd64461pcmcia.c,v 1.27 2004/07/14 14:33:23 uch Exp $ */
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/*-
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* Copyright (c) 2001, 2002, 2004 The NetBSD Foundation, Inc.
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@ -37,7 +37,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: hd64461pcmcia.c,v 1.26 2004/07/11 16:04:58 uch Exp $");
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__KERNEL_RCSID(0, "$NetBSD: hd64461pcmcia.c,v 1.27 2004/07/14 14:33:23 uch Exp $");
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#include "debug_hpcsh.h"
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@ -214,10 +214,8 @@ STATIC int hd64461pcmcia_channel0_intr(void *);
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STATIC int hd64461pcmcia_channel1_intr(void *);
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/* card status */
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STATIC enum hd64461pcmcia_event_type detect_card(enum controller_channel);
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STATIC void hd64461pcmcia_power_off(enum controller_channel)
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__attribute__((__unused__));
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STATIC void hd64461pcmcia_power_on(enum controller_channel)
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__attribute__((__unused__));
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STATIC void hd64461pcmcia_power_off(enum controller_channel);
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STATIC void hd64461pcmcia_power_on(enum controller_channel);
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/* memory window access ops */
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STATIC void hd64461pcmcia_memory_window_mode(enum controller_channel,
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enum memory_window_mode)__attribute__((__unused__));
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@ -365,26 +363,11 @@ hd64461pcmcia_attach_channel(struct hd64461pcmcia_softc *sc,
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struct hd64461pcmcia_channel *ch = &sc->sc_ch[channel];
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struct pcmciabus_attach_args paa;
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bus_addr_t membase;
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bus_addr_t gcr;
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uint8_t r;
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int i;
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ch->ch_parent = sc;
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ch->ch_channel = channel;
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/*
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* DRV (external buffer) high level
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*
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* XXX: This hack makes pcmcia cards "being used" at the boot
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* time (by WinCE or NetBSD) correctly detected.
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*/
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gcr = HD64461_PCCGCR(channel);
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r = hd64461_reg_read_1(gcr);
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if (r & HD64461_PCCGCR_DRVE) {
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r &= ~HD64461_PCCGCR_DRVE;
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hd64461_reg_write_1(gcr, r);
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}
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/*
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* Continuous 16-MB Area Mode
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*/
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@ -770,7 +753,7 @@ hd64461pcmcia_chip_socket_enable(pcmcia_chipset_handle_t pch)
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int channel = ch->ch_channel;
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bus_addr_t isr, gcr;
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u_int8_t r;
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int cardtype;
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int i, cardtype;
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DPRINTF("enable channel %d\n", channel);
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isr = HD64461_PCCISR(channel);
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@ -778,39 +761,37 @@ hd64461pcmcia_chip_socket_enable(pcmcia_chipset_handle_t pch)
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hd64461pcmcia_power_off(channel);
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hd64461pcmcia_power_on(channel);
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#if notyet
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{
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int i;
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/* assert reset */
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r = hd64461_reg_read_1(gcr);
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r |= HD64461_PCCGCR_PCCR;
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hd64461_reg_write_1(gcr, r);
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/*
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* hold RESET at least 10us.
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*/
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DELAY_MS(20);
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/* clear the reset flag */
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r &= ~HD64461_PCCGCR_PCCR;
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hd64461_reg_write_1(gcr, r);
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DELAY_MS(2000);
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/* assert reset */
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r = hd64461_reg_read_1(gcr);
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r |= HD64461_PCCGCR_PCCR;
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hd64461_reg_write_1(gcr, r);
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/* wait for the chip to finish initializing */
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for (i = 0; i < 10000; i++) {
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if ((hd64461_reg_read_1(isr) & HD64461_PCCISR_READY))
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goto reset_ok;
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DELAY_MS(500);
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/*
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* hold RESET at least 10us.
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*/
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DELAY_MS(20);
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if ((i > 5000) && (i % 100 == 99))
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printf(".");
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}
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printf("reset failed.\n");
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hd64461pcmcia_power_off(channel);
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return;
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reset_ok:
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/* clear the reset flag */
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r &= ~HD64461_PCCGCR_PCCR;
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hd64461_reg_write_1(gcr, r);
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DELAY_MS(2000);
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/* wait for the chip to finish initializing */
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for (i = 0; i < 10000; i++) {
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if ((hd64461_reg_read_1(isr) & HD64461_PCCISR_READY))
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goto reset_ok;
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DELAY_MS(500);
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if ((i > 5000) && (i % 100 == 99))
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printf(".");
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}
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#endif /* notyet */
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printf("reset failed.\n");
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hd64461pcmcia_power_off(channel);
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return;
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reset_ok:
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/* set Continuous 16-MB Area Mode */
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ch->ch_memory_window_mode = MEMWIN_16M_MODE;
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hd64461pcmcia_memory_window_mode(channel, ch->ch_memory_window_mode);
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@ -857,7 +838,6 @@ hd64461pcmcia_chip_socket_disable(pcmcia_chipset_handle_t pch)
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void
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hd64461pcmcia_power_off(enum controller_channel channel)
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{
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#if notyet
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u_int8_t r;
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u_int16_t r16;
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bus_addr_t scr, gcr;
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@ -888,15 +868,6 @@ hd64461pcmcia_power_off(enum controller_channel channel)
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r16 |= (channel == CHANNEL_0 ? HD64461_SYSSTBCR_SPC0ST :
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HD64461_SYSSTBCR_SPC1ST);
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hd64461_reg_write_2(HD64461_SYSSTBCR_REG16, r16);
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if (channel == CHANNEL_0) {
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/* GPIO Port A XXX Jornada690 specific? */
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r16 = hd64461_reg_read_2(HD64461_GPADR_REG16);
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r16 |= 0xf;
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hd64461_reg_write_2(HD64461_GPADR_REG16, r16);
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}
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#endif /* notyet */
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}
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void
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@ -922,7 +893,9 @@ hd64461pcmcia_power_on(enum controller_channel channel)
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}
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if (channel == CHANNEL_1) {
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/* GPIO Port C, Port D XXX HP620LX specific? */
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/* GPIO Port C, Port D -> PCC1 pin
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* I assume SYSCR[1:0] == 0
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*/
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hd64461_reg_write_2(HD64461_GPCCR_REG16, 0xa800);
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hd64461_reg_write_2(HD64461_GPDCR_REG16, 0xaa0a);
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}
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