8168H model didn't link up well. some models seems to require to enable TX/RX after configuration.
RTKQ_TXRXEN_LATER quirk flag added. it may be able to unify with RTKQ_RXDV_GATED flag?
This commit is contained in:
parent
0c707655af
commit
3e73e3f429
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@ -1,4 +1,4 @@
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/* $NetBSD: rtl8169.c,v 1.159 2019/05/30 02:32:18 msaitoh Exp $ */
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/* $NetBSD: rtl8169.c,v 1.160 2019/09/22 16:41:19 ryo Exp $ */
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/*
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* Copyright (c) 1997, 1998-2003
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@ -33,7 +33,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: rtl8169.c,v 1.159 2019/05/30 02:32:18 msaitoh Exp $");
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__KERNEL_RCSID(0, "$NetBSD: rtl8169.c,v 1.160 2019/09/22 16:41:19 ryo Exp $");
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/* $FreeBSD: /repoman/r/ncvs/src/sys/dev/re/if_re.c,v 1.20 2004/04/11 20:34:08 ru Exp $ */
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/*
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@ -607,12 +607,16 @@ re_attach(struct rtk_softc *sc)
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sc->sc_quirk |= RTKQ_NOJUMBO;
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break;
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case RTK_HWREV_8168E:
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case RTK_HWREV_8168H:
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case RTK_HWREV_8168H_SPIN1:
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sc->sc_quirk |= RTKQ_DESCV2 | RTKQ_NOEECMD |
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RTKQ_MACSTAT | RTKQ_CMDSTOP | RTKQ_PHYWAKE_PM |
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RTKQ_NOJUMBO;
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break;
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case RTK_HWREV_8168H:
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sc->sc_quirk |= RTKQ_DESCV2 | RTKQ_NOEECMD |
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RTKQ_MACSTAT | RTKQ_CMDSTOP | RTKQ_PHYWAKE_PM |
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RTKQ_NOJUMBO | RTKQ_RXDV_GATED | RTKQ_TXRXEN_LATER;
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break;
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case RTK_HWREV_8168E_VL:
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case RTK_HWREV_8168F:
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sc->sc_quirk |= RTKQ_DESCV2 | RTKQ_NOEECMD |
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@ -1873,7 +1877,8 @@ re_init(struct ifnet *ifp)
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/*
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* Enable transmit and receive.
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*/
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CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB | RTK_CMD_RX_ENB);
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if ((sc->sc_quirk & RTKQ_TXRXEN_LATER) == 0)
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CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB | RTK_CMD_RX_ENB);
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/*
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* Set the initial TX and RX configuration.
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@ -1914,6 +1919,12 @@ re_init(struct ifnet *ifp)
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*/
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rtk_setmulti(sc);
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/*
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* some chips require to enable TX/RX *AFTER* TX/RX configuration
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*/
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if ((sc->sc_quirk & RTKQ_TXRXEN_LATER) != 0)
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CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB | RTK_CMD_RX_ENB);
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/*
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* Enable interrupts.
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*/
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@ -1,4 +1,4 @@
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/* $NetBSD: rtl81x9var.h,v 1.56 2017/04/19 00:20:02 jmcneill Exp $ */
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/* $NetBSD: rtl81x9var.h,v 1.57 2019/09/22 16:41:19 ryo Exp $ */
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/*
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* Copyright (c) 1997, 1998
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@ -194,6 +194,7 @@ struct rtk_softc {
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#define RTKQ_PHYWAKE_PM 0x00000400 /* wake PHY from power down */
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#define RTKQ_RXDV_GATED 0x00000800
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#define RTKQ_IM_HW 0x00001000 /* HW interrupt mitigation */
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#define RTKQ_TXRXEN_LATER 0x00002000 /* TX/RX enable timing */
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bus_dma_tag_t sc_dmat;
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