- Unify the "rtwn" and "urtwn" register definitions and initialization

tables into common header files shared by both drivers.
- Fix some register and bit definitions, from OpenBSD and verified against
  the vendor driver.
- Add some additional register / descriptor defnitions, from OpenBSD.
This commit is contained in:
thorpej 2018-06-29 04:02:10 +00:00
parent 565352da0c
commit 3e554dfa58
7 changed files with 1776 additions and 3155 deletions

View File

@ -1,8 +1,9 @@
/* $NetBSD: if_urtwn_data.h,v 1.4 2016/10/12 03:23:29 nat Exp $ */
/* $OpenBSD: if_urtwnreg.h,v 1.3 2010/11/16 18:02:59 damien Exp $ */
/* $NetBSD: rtwn_data.h,v 1.1 2018/06/29 04:02:10 thorpej Exp $ */
/* $OpenBSD: r92creg.h,v 1.16 2017/09/22 13:41:56 kevlo Exp $ */
/*-
* Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
* Copyright (c) 2015 Stefan Sperling <stsp@openbsd.org>
* Copyright (c) 2016 Nathanial Sloss <nathanialsloss@yahoo.com.au>
*
* Permission to use, copy, modify, and distribute this software for any
@ -18,13 +19,38 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef _DEV_IC_RTWN_DATA_H_
#define _DEV_IC_RTWN_DATA_H_
/*
* MAC initialization values.
*/
static const struct {
uint16_t reg;
uint8_t val;
} rtl8192eu_mac[]={
} rtl8192ce_mac[] = {
{ 0x420, 0x80 }, { 0x423, 0x00 }, { 0x430, 0x00 }, { 0x431, 0x00 },
{ 0x432, 0x00 }, { 0x433, 0x01 }, { 0x434, 0x04 }, { 0x435, 0x05 },
{ 0x436, 0x06 }, { 0x437, 0x07 }, { 0x438, 0x00 }, { 0x439, 0x00 },
{ 0x43a, 0x00 }, { 0x43b, 0x01 }, { 0x43c, 0x04 }, { 0x43d, 0x05 },
{ 0x43e, 0x06 }, { 0x43f, 0x07 }, { 0x440, 0x5d }, { 0x441, 0x01 },
{ 0x442, 0x00 }, { 0x444, 0x15 }, { 0x445, 0xf0 }, { 0x446, 0x0f },
{ 0x447, 0x00 }, { 0x458, 0x41 }, { 0x459, 0xa8 }, { 0x45a, 0x72 },
{ 0x45b, 0xb9 }, { 0x460, 0x88 }, { 0x461, 0x88 }, { 0x462, 0x06 },
{ 0x463, 0x03 }, { 0x4c8, 0x04 }, { 0x4c9, 0x08 }, { 0x4cc, 0x02 },
{ 0x4cd, 0x28 }, { 0x4ce, 0x01 }, { 0x500, 0x26 }, { 0x501, 0xa2 },
{ 0x502, 0x2f }, { 0x503, 0x00 }, { 0x504, 0x28 }, { 0x505, 0xa3 },
{ 0x506, 0x5e }, { 0x507, 0x00 }, { 0x508, 0x2b }, { 0x509, 0xa4 },
{ 0x50a, 0x5e }, { 0x50b, 0x00 }, { 0x50c, 0x4f }, { 0x50d, 0xa4 },
{ 0x50e, 0x00 }, { 0x50f, 0x00 }, { 0x512, 0x1c }, { 0x514, 0x0a },
{ 0x515, 0x10 }, { 0x516, 0x0a }, { 0x517, 0x10 }, { 0x51a, 0x16 },
{ 0x524, 0x0f }, { 0x525, 0x4f }, { 0x546, 0x20 }, { 0x547, 0x00 },
{ 0x559, 0x02 }, { 0x55a, 0x02 }, { 0x55d, 0xff }, { 0x605, 0x30 },
{ 0x608, 0x0e }, { 0x609, 0x2a }, { 0x652, 0x20 }, { 0x63c, 0x0a },
{ 0x63d, 0x0e }, { 0x700, 0x21 }, { 0x701, 0x43 }, { 0x702, 0x65 },
{ 0x703, 0x87 }, { 0x708, 0x21 }, { 0x709, 0x43 }, { 0x70a, 0x65 },
{ 0x70b, 0x87 }
}, rtl8192eu_mac[] = {
{ 0x011, 0xeb }, { 0x012, 0x07 }, { 0x014, 0x75 }, { 0x303, 0xa7 },
{ 0x428, 0x0a }, { 0x429, 0x10 }, { 0x430, 0x00 }, { 0x431, 0x00 },
{ 0x432, 0x00 }, { 0x433, 0x01 }, { 0x434, 0x04 }, { 0x435, 0x05 },
@ -103,11 +129,11 @@ static const struct {
/*
* Baseband initialization values.
*/
struct urtwn_bb_prog {
size_t count;
struct rtwn_bb_prog {
int count;
const uint16_t *regs;
const uint32_t *vals;
size_t agccount;
int agccount;
const uint32_t *agcvals;
};
@ -179,6 +205,88 @@ static const uint32_t rtl8192ce_bb_vals[] = {
0x00000000, 0x00000300
};
static const uint32_t rtl8192ce_bb_vals_2t[] = {
0x0011800f, 0x00ffdb83, 0x80040002, 0x00000003, 0x0000fc00,
0x0000000a, 0x10005388, 0x020c3d10, 0x02200385, 0x00000000,
0x01000100, 0x00390004, 0x01000100, 0x00390004, 0x27272727,
0x27272727, 0x27272727, 0x27272727, 0x00010000, 0x00010000,
0x27272727, 0x27272727, 0x00000000, 0x00000000, 0x569a569a,
0x0c1b25a4, 0x66e60230, 0x061f0130, 0x27272727, 0x2b2b2b27,
0x07000700, 0x22184000, 0x08080808, 0x00000000, 0xc0083070,
0x000004d5, 0x00000000, 0xcc0000c0, 0x00000800, 0xfffffffe,
0x40302010, 0x00706050, 0x00000000, 0x00000023, 0x00000000,
0x81121313, 0x00d047c8, 0x80ff000c, 0x8c838300, 0x2e68120f,
0x9500bb78, 0x11144028, 0x00881117, 0x89140f00, 0x1a1b0000,
0x090e1317, 0x00000204, 0x00d30000, 0x101fbf00, 0x00000007,
0x48071d40, 0x03a05633, 0x000000e4, 0x6c6c6c6c, 0x08800000,
0x40000100, 0x08800000, 0x40000100, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x69e9ac44, 0x469652cf, 0x49795994,
0x0a97971c, 0x1f7c403f, 0x000100b7, 0xec020107, 0x007f037f,
0x69543420, 0x43bc0094, 0x69543420, 0x433c0094, 0x00000000,
0x5116848b, 0x47c00bff, 0x00000036, 0x2c7f000d, 0x018610db,
0x0000001f, 0x00b91612, 0x40000100, 0x20f60000, 0x40000100,
0x20200000, 0x00121820, 0x00000000, 0x00121820, 0x00007f7f,
0x00000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x28000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x64b22427,
0x00766932, 0x00222222, 0x00000000, 0x37644302, 0x2f97d40c,
0x00080740, 0x00020403, 0x0000907f, 0x20010201, 0xa0633333,
0x3333bc43, 0x7a8f5b6b, 0xcc979975, 0x00000000, 0x80608000,
0x00000000, 0x00027293, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x6437140a, 0x00000000, 0x00000000, 0x30032064,
0x4653de68, 0x04518a3c, 0x00002101, 0x2a201c16, 0x1812362e,
0x322c2220, 0x000e3c24, 0x2a2a2a2a, 0x2a2a2a2a, 0x03902a2a,
0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x00000000,
0x1000dc1f, 0x10008c1f, 0x02140102, 0x681604c2, 0x01007c00,
0x01004800, 0xfb000000, 0x000028d1, 0x1000dc1f, 0x10008c1f,
0x02140102, 0x28160d05, 0x00000010, 0x001b25a4, 0x63db25a4,
0x63db25a4, 0x0c1b25a4, 0x0c1b25a4, 0x0c1b25a4, 0x0c1b25a4,
0x63db25a4, 0x0c1b25a4, 0x63db25a4, 0x63db25a4, 0x63db25a4,
0x63db25a4, 0x001b25a4, 0x001b25a4, 0x6fdb25a4, 0x00000003,
0x00000000, 0x00000300
};
static const uint32_t rtl8192ce_bb_vals_1t[] = {
0x0011800f, 0x00ffdb83, 0x80040000, 0x00000001, 0x0000fc00,
0x0000000a, 0x10005388, 0x020c3d10, 0x02200385, 0x00000000,
0x01000100, 0x00390004, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00010000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x569a569a,
0x001b25a4, 0x66e60230, 0x061f0130, 0x00000000, 0x32323200,
0x07000700, 0x22004000, 0x00000808, 0x00000000, 0xc0083070,
0x000004d5, 0x00000000, 0xccc000c0, 0x00000800, 0xfffffffe,
0x40302010, 0x00706050, 0x00000000, 0x00000023, 0x00000000,
0x81121111, 0x00d047c8, 0x80ff000c, 0x8c838300, 0x2e68120f,
0x9500bb78, 0x11144028, 0x00881117, 0x89140f00, 0x1a1b0000,
0x090e1317, 0x00000204, 0x00d30000, 0x101fbf00, 0x00000007,
0x48071d40, 0x03a05611, 0x000000e4, 0x6c6c6c6c, 0x08800000,
0x40000100, 0x08800000, 0x40000100, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x69e9ac44, 0x469652cf, 0x49795994,
0x0a97971c, 0x1f7c403f, 0x000100b7, 0xec020107, 0x007f037f,
0x69543420, 0x43bc0094, 0x69543420, 0x433c0094, 0x00000000,
0x5116848b, 0x47c00bff, 0x00000036, 0x2c7f000d, 0x018610db,
0x0000001f, 0x00b91612, 0x40000100, 0x20f60000, 0x40000100,
0x20200000, 0x00121820, 0x00000000, 0x00121820, 0x00007f7f,
0x00000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x28000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x64b22427,
0x00766932, 0x00222222, 0x00000000, 0x37644302, 0x2f97d40c,
0x00080740, 0x00020401, 0x0000907f, 0x20010201, 0xa0633333,
0x3333bc43, 0x7a8f5b6b, 0xcc979975, 0x00000000, 0x80608000,
0x00000000, 0x00027293, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x6437140a, 0x00000000, 0x00000000, 0x30032064,
0x4653de68, 0x04518a3c, 0x00002101, 0x2a201c16, 0x1812362e,
0x322c2220, 0x000e3c24, 0x2a2a2a2a, 0x2a2a2a2a, 0x03902a2a,
0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x00000000,
0x1000dc1f, 0x10008c1f, 0x02140102, 0x681604c2, 0x01007c00,
0x01004800, 0xfb000000, 0x000028d1, 0x1000dc1f, 0x10008c1f,
0x02140102, 0x28160d05, 0x00000010, 0x001b25a4, 0x631b25a0,
0x631b25a0, 0x081b25a0, 0x081b25a0, 0x081b25a0, 0x081b25a0,
0x631b25a0, 0x081b25a0, 0x631b25a0, 0x631b25a0, 0x631b25a0,
0x631b25a0, 0x001b25a0, 0x001b25a0, 0x6b1b25a0, 0x00000003,
0x00000000, 0x00000300,
};
static const uint32_t rtl8192ce_agc_vals[] = {
0x7b000001, 0x7b010001, 0x7b020001, 0x7b030001, 0x7b040001,
0x7b050001, 0x7a060001, 0x79070001, 0x78080001, 0x77090001,
@ -214,7 +322,7 @@ static const uint32_t rtl8192ce_agc_vals[] = {
0x621b001e, 0x621c001e, 0x621d001e, 0x621e001e, 0x621f001e
};
static const struct urtwn_bb_prog rtl8192ce_bb_prog = {
static const struct rtwn_bb_prog rtl8192ce_bb_prog = {
__arraycount(rtl8192ce_bb_regs),
rtl8192ce_bb_regs,
rtl8192ce_bb_vals,
@ -222,6 +330,22 @@ static const struct urtwn_bb_prog rtl8192ce_bb_prog = {
rtl8192ce_agc_vals
};
static const struct rtwn_bb_prog rtl8192ce_bb_prog_2t = {
__arraycount(rtl8192ce_bb_regs),
rtl8192ce_bb_regs,
rtl8192ce_bb_vals_2t,
__arraycount(rtl8192ce_agc_vals),
rtl8192ce_agc_vals
};
static const struct rtwn_bb_prog rtl8192ce_bb_prog_1t = {
__arraycount(rtl8192ce_bb_regs),
rtl8192ce_bb_regs,
rtl8192ce_bb_vals_1t,
__arraycount(rtl8192ce_agc_vals),
rtl8192ce_agc_vals
};
/*
* RTL8188CU.
*/
@ -266,7 +390,7 @@ static const uint32_t rtl8192cu_bb_vals[] = {
0x00000000, 0x00000300
};
static const struct urtwn_bb_prog rtl8192cu_bb_prog = {
static const struct rtwn_bb_prog rtl8192cu_bb_prog = {
__arraycount(rtl8192ce_bb_regs),
rtl8192ce_bb_regs,
rtl8192cu_bb_vals,
@ -353,7 +477,7 @@ static const uint32_t rtl8188ce_agc_vals[] = {
0x621b001e, 0x621c001e, 0x621d001e, 0x621e001e, 0x621f001e
};
static const struct urtwn_bb_prog rtl8188ce_bb_prog = {
static const struct rtwn_bb_prog rtl8188ce_bb_prog = {
__arraycount(rtl8192ce_bb_regs),
rtl8192ce_bb_regs,
rtl8188ce_bb_vals,
@ -402,7 +526,7 @@ static const uint32_t rtl8188cu_bb_vals[] = {
0x00000000, 0x00000300
};
static const struct urtwn_bb_prog rtl8188cu_bb_prog = {
static const struct rtwn_bb_prog rtl8188cu_bb_prog = {
__arraycount(rtl8192ce_bb_regs),
rtl8192ce_bb_regs,
rtl8188cu_bb_vals,
@ -511,7 +635,7 @@ static const uint32_t rtl8188eu_agc_vals[] = {
0x407d0001, 0x407e0001, 0x407f0001
};
static const struct urtwn_bb_prog rtl8188eu_bb_prog = {
static const struct rtwn_bb_prog rtl8188eu_bb_prog = {
__arraycount(rtl8188eu_bb_regs),
rtl8188eu_bb_regs,
rtl8188eu_bb_vals,
@ -625,7 +749,7 @@ static const uint32_t rtl8192eu_agc_vals[] = {
0x407d0001, 0x407e0001, 0x407f0001,
};
static const struct urtwn_bb_prog rtl8192eu_bb_prog = {
static const struct rtwn_bb_prog rtl8192eu_bb_prog = {
__arraycount(rtl8192eu_bb_regs),
rtl8192eu_bb_regs,
rtl8192eu_bb_vals,
@ -736,7 +860,7 @@ static const uint32_t rtl8188ru_agc_vals[] = {
0x621b001e, 0x621c001e, 0x621d001e, 0x621e001e, 0x621f001e
};
static const struct urtwn_bb_prog rtl8188ru_bb_prog = {
static const struct rtwn_bb_prog rtl8188ru_bb_prog = {
__arraycount(rtl8188ru_bb_regs),
rtl8188ru_bb_regs,
rtl8188ru_bb_vals,
@ -747,8 +871,8 @@ static const struct urtwn_bb_prog rtl8188ru_bb_prog = {
/*
* RF initialization values.
*/
struct urtwn_rf_prog {
size_t count;
struct rtwn_rf_prog {
int count;
const uint8_t *regs;
const uint32_t *vals;
};
@ -812,7 +936,7 @@ static const uint32_t rtl8192ce_rf2_vals[] = {
0xe0330, 0xa0330, 0x60330, 0x20330
};
static const struct urtwn_rf_prog rtl8192ce_rf_prog[] = {
static const struct rtwn_rf_prog rtl8192ce_rf_prog[] = {
{
__arraycount(rtl8192ce_rf1_regs),
rtl8192ce_rf1_regs,
@ -852,7 +976,7 @@ static const uint32_t rtl8188ce_rf_vals[] = {
0x30159
};
static const struct urtwn_rf_prog rtl8188ce_rf_prog[] = {
static const struct rtwn_rf_prog rtl8188ce_rf_prog[] = {
{
__arraycount(rtl8192ce_rf1_regs),
rtl8192ce_rf1_regs,
@ -888,7 +1012,7 @@ static const uint32_t rtl8188cu_rf_vals[] = {
0x30159
};
static const struct urtwn_rf_prog rtl8188cu_rf_prog[] = {
static const struct rtwn_rf_prog rtl8188cu_rf_prog[] = {
{
__arraycount(rtl8192ce_rf1_regs),
rtl8192ce_rf1_regs,
@ -910,7 +1034,7 @@ static const uint8_t rtl8192eu_rf_regs[] = {
0x34, 0x34, 0x34, 0x34, 0x34, 0x00, 0x84, 0x86, 0x87, 0x8e,
0x8f, 0xef, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b,
0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b,
0xef, 0xfe, 0x18, 0xfe, 0xfe, 0xfe, 0xfe, 0x1e, 0x1f, 0x00,
0xef, 0xfe, 0x18, 0xfe, 0xfe, 0xfe, 0xfe, 0x1e, 0x1f, 0x00,
};
static const uint32_t rtl8192eu_rf_vals[] = {
@ -929,7 +1053,7 @@ static const uint32_t rtl8192eu_rf_vals[] = {
0xef7b0, 0xd4fb0, 0xcf060, 0xb0090, 0xa0080, 0x90080, 0x8f780,
0x787b0, 0x78730, 0x60fb0, 0x5ffa0, 0x40620, 0x37090, 0x20080,
0x1f060, 0x0ffb0, 0x000a0, 0x00000, 0x0fc07, 0x00000, 0x00000,
0x00000, 0x00000, 0x00001, 0x80000, 0x33e70,
0x00000, 0x00000, 0x00001, 0x80000, 0x33e70,
};
static const uint8_t rtl8192eu_rf2_regs[] = {
@ -941,7 +1065,7 @@ static const uint8_t rtl8192eu_rf2_regs[] = {
0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x00, 0x84, 0x86, 0x87,
0x8e, 0x8f, 0xef, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b,
0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b,
0x3b, 0xef, 0x00, 0xfe, 0xfe, 0xfe, 0xfe, 0x1e, 0x1f, 0x00,
0x3b, 0xef, 0x00, 0xfe, 0xfe, 0xfe, 0xfe, 0x1e, 0x1f, 0x00,
};
static const uint32_t rtl8192eu_rf2_vals[] = {
@ -957,10 +1081,10 @@ static const uint32_t rtl8192eu_rf2_vals[] = {
0xf07b0, 0xf02b0, 0xef7b0, 0xd4fb0, 0xcf060, 0xb0090, 0xa0080,
0x90080, 0x8f780, 0x787b0, 0x78730, 0x60fb0, 0x5ffa0, 0x40620,
0x37090, 0x20080, 0x1f060, 0x0ffb0, 0x000a0, 0x10159, 0x00000,
0x00000, 0x00000, 0x00000, 0x00001, 0x80000, 0x33e70,
0x00000, 0x00000, 0x00000, 0x00001, 0x80000, 0x33e70,
};
static const struct urtwn_rf_prog rtl8192eu_rf_prog[] = {
static const struct rtwn_rf_prog rtl8192eu_rf_prog[] = {
{
__arraycount(rtl8192eu_rf_regs),
rtl8192eu_rf_regs,
@ -1006,7 +1130,7 @@ static const uint32_t rtl8188eu_rf_vals[] = {
0x00000, 0x00000, 0x00001, 0x80000, 0x33e60
};
static const struct urtwn_rf_prog rtl8188eu_rf_prog[] = {
static const struct rtwn_rf_prog rtl8188eu_rf_prog[] = {
{
__arraycount(rtl8188eu_rf_regs),
rtl8188eu_rf_regs,
@ -1041,7 +1165,7 @@ static const uint32_t rtl8188ru_rf_vals[] = {
0x30159
};
static const struct urtwn_rf_prog rtl8188ru_rf_prog[] = {
static const struct rtwn_rf_prog rtl8188ru_rf_prog[] = {
{
__arraycount(rtl8192ce_rf1_regs),
rtl8192ce_rf1_regs,
@ -1049,18 +1173,18 @@ static const struct urtwn_rf_prog rtl8188ru_rf_prog[] = {
}
};
struct urtwn_txpwr {
struct rtwn_txpwr {
uint8_t pwr[3][28];
};
struct urtwn_r88e_txpwr {
struct rtwn_r88e_txpwr {
uint8_t pwr[6][28];
};
/*
* Per RF chain/group/rate Tx gain values.
*/
static const struct urtwn_txpwr rtl8192cu_txagc[] = {
static const struct rtwn_txpwr rtl8192cu_txagc[] = {
{ { /* Chain 0. */
{ /* Group 0. */
0x00, 0x00, 0x00, 0x00, /* CCK1~11. */
@ -1103,7 +1227,7 @@ static const struct urtwn_txpwr rtl8192cu_txagc[] = {
} }
};
static const struct urtwn_txpwr rtl8188ru_txagc[] = {
static const struct rtwn_txpwr rtl8188ru_txagc[] = {
{ { /* Chain 0. */
{ /* Group 0. */
0x00, 0x00, 0x00, 0x00, /* CCK1~11. */
@ -1126,7 +1250,7 @@ static const struct urtwn_txpwr rtl8188ru_txagc[] = {
} }
};
static const struct urtwn_r88e_txpwr rtl8188eu_txagc[] = {
static const struct rtwn_r88e_txpwr rtl8188eu_txagc[] = {
{ { /* Chain 0. */
{ /* Group 0. */
0x00, 0x00, 0x00, 0x00, /* CCK1~11. */
@ -1166,3 +1290,5 @@ static const struct urtwn_r88e_txpwr rtl8188eu_txagc[] = {
}
} }
};
#endif /* _DEV_IC_RTWN_DATA_H_ */

1555
sys/dev/ic/rtwnreg.h Normal file

File diff suppressed because it is too large Load Diff

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@ -1,4 +1,4 @@
/* $NetBSD: if_rtwn.c,v 1.16 2018/06/26 06:48:01 msaitoh Exp $ */
/* $NetBSD: if_rtwn.c,v 1.17 2018/06/29 04:02:10 thorpej Exp $ */
/* $OpenBSD: if_rtwn.c,v 1.5 2015/06/14 08:02:47 stsp Exp $ */
#define IEEE80211_NO_HT
/*-
@ -23,7 +23,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: if_rtwn.c,v 1.16 2018/06/26 06:48:01 msaitoh Exp $");
__KERNEL_RCSID(0, "$NetBSD: if_rtwn.c,v 1.17 2018/06/29 04:02:10 thorpej Exp $");
#include <sys/param.h>
#include <sys/sockio.h>
@ -59,6 +59,8 @@ __KERNEL_RCSID(0, "$NetBSD: if_rtwn.c,v 1.16 2018/06/26 06:48:01 msaitoh Exp $")
#include <dev/pci/pcivar.h>
#include <dev/pci/pcidevs.h>
#include <dev/ic/rtwnreg.h>
#include <dev/ic/rtwn_data.h>
#include <dev/pci/if_rtwnreg.h>
#ifdef RTWN_DEBUG
@ -103,7 +105,7 @@ CFATTACH_DECL_NEW(rtwn, sizeof(struct rtwn_softc), rtwn_match,
static int rtwn_alloc_rx_list(struct rtwn_softc *);
static void rtwn_reset_rx_list(struct rtwn_softc *);
static void rtwn_free_rx_list(struct rtwn_softc *);
static void rtwn_setup_rx_desc(struct rtwn_softc *, struct r92c_rx_desc *,
static void rtwn_setup_rx_desc(struct rtwn_softc *, struct r92c_rx_desc_pci *,
bus_addr_t, size_t, int);
static int rtwn_alloc_tx_list(struct rtwn_softc *, int);
static void rtwn_reset_tx_list(struct rtwn_softc *, int);
@ -138,7 +140,7 @@ static int rtwn_newstate(struct ieee80211com *, enum ieee80211_state,
static int rtwn_wme_update(struct ieee80211com *);
static void rtwn_update_avgrssi(struct rtwn_softc *, int, int8_t);
static int8_t rtwn_get_rssi(struct rtwn_softc *, int, void *);
static void rtwn_rx_frame(struct rtwn_softc *, struct r92c_rx_desc *,
static void rtwn_rx_frame(struct rtwn_softc *, struct r92c_rx_desc_pci *,
struct rtwn_rx_data *, int);
static int rtwn_tx(struct rtwn_softc *, struct mbuf *,
struct ieee80211_node *);
@ -465,7 +467,7 @@ rtwn_activate(device_t self, enum devact act)
}
static void
rtwn_setup_rx_desc(struct rtwn_softc *sc, struct r92c_rx_desc *desc,
rtwn_setup_rx_desc(struct rtwn_softc *sc, struct r92c_rx_desc_pci *desc,
bus_addr_t addr, size_t len, int idx)
{
@ -483,7 +485,7 @@ rtwn_alloc_rx_list(struct rtwn_softc *sc)
{
struct rtwn_rx_ring *rx_ring = &sc->rx_ring;
struct rtwn_rx_data *rx_data;
const size_t size = sizeof(struct r92c_rx_desc) * RTWN_RX_LIST_COUNT;
const size_t size = sizeof(struct r92c_rx_desc_pci) * RTWN_RX_LIST_COUNT;
int i, error = 0;
/* Allocate Rx descriptors. */
@ -596,7 +598,7 @@ rtwn_free_rx_list(struct rtwn_softc *sc)
if (rx_ring->desc) {
bus_dmamap_unload(sc->sc_dmat, rx_ring->map);
bus_dmamem_unmap(sc->sc_dmat, rx_ring->desc,
sizeof (struct r92c_rx_desc) * RTWN_RX_LIST_COUNT);
sizeof (struct r92c_rx_desc_pci) * RTWN_RX_LIST_COUNT);
bus_dmamem_free(sc->sc_dmat, &rx_ring->seg,
rx_ring->nsegs);
rx_ring->desc = NULL;
@ -625,7 +627,7 @@ rtwn_alloc_tx_list(struct rtwn_softc *sc, int qid)
{
struct rtwn_tx_ring *tx_ring = &sc->tx_ring[qid];
struct rtwn_tx_data *tx_data;
const size_t size = sizeof(struct r92c_tx_desc) * RTWN_TX_LIST_COUNT;
const size_t size = sizeof(struct r92c_tx_desc_pci) * RTWN_TX_LIST_COUNT;
int i = 0, error = 0;
error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0, BUS_DMA_NOWAIT,
@ -662,7 +664,7 @@ rtwn_alloc_tx_list(struct rtwn_softc *sc, int qid)
}
for (i = 0; i < RTWN_TX_LIST_COUNT; i++) {
struct r92c_tx_desc *desc = &tx_ring->desc[i];
struct r92c_tx_desc_pci *desc = &tx_ring->desc[i];
/* setup tx desc */
desc->nextdescaddr = htole32(tx_ring->map->dm_segs[0].ds_addr
@ -693,7 +695,7 @@ rtwn_reset_tx_list(struct rtwn_softc *sc, int qid)
int i;
for (i = 0; i < RTWN_TX_LIST_COUNT; i++) {
struct r92c_tx_desc *desc = &tx_ring->desc[i];
struct r92c_tx_desc_pci *desc = &tx_ring->desc[i];
struct rtwn_tx_data *tx_data = &tx_ring->tx_data[i];
memset(desc, 0, sizeof(*desc) -
@ -725,7 +727,7 @@ rtwn_free_tx_list(struct rtwn_softc *sc, int qid)
if (tx_ring->desc != NULL) {
bus_dmamap_unload(sc->sc_dmat, tx_ring->map);
bus_dmamem_unmap(sc->sc_dmat, tx_ring->desc,
sizeof (struct r92c_tx_desc) * RTWN_TX_LIST_COUNT);
sizeof (struct r92c_tx_desc_pci) * RTWN_TX_LIST_COUNT);
bus_dmamem_free(sc->sc_dmat, &tx_ring->seg,
tx_ring->nsegs);
}
@ -1663,7 +1665,7 @@ rtwn_get_rssi(struct rtwn_softc *sc, int rate, void *physt)
}
static void
rtwn_rx_frame(struct rtwn_softc *sc, struct r92c_rx_desc *rx_desc,
rtwn_rx_frame(struct rtwn_softc *sc, struct r92c_rx_desc_pci *rx_desc,
struct rtwn_rx_data *rx_data, int desc_idx)
{
struct ieee80211com *ic = &sc->sc_ic;
@ -1838,7 +1840,7 @@ rtwn_tx(struct rtwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
struct ieee80211_key *k = NULL;
struct rtwn_tx_ring *tx_ring;
struct rtwn_tx_data *data;
struct r92c_tx_desc *txd;
struct r92c_tx_desc_pci *txd;
uint16_t qos, seq;
uint8_t raid, type, tid, qid;
int hasqos, error;
@ -2030,7 +2032,7 @@ rtwn_tx_done(struct rtwn_softc *sc, int qid)
struct ifnet *ifp = IC2IFP(ic);
struct rtwn_tx_ring *tx_ring = &sc->tx_ring[qid];
struct rtwn_tx_data *tx_data;
struct r92c_tx_desc *tx_desc;
struct r92c_tx_desc_pci *tx_desc;
int i, s;
DPRINTFN(3, ("%s: %s: qid=%d\n", device_xname(sc->sc_dev), __func__,
@ -3539,7 +3541,7 @@ rtwn_softintr(void *xsc)
/* Vendor driver treats RX errors like ROK... */
if (status & RTWN_INT_ENABLE_RX) {
for (i = 0; i < RTWN_RX_LIST_COUNT; i++) {
struct r92c_rx_desc *rx_desc = &sc->rx_ring.desc[i];
struct r92c_rx_desc_pci *rx_desc = &sc->rx_ring.desc[i];
struct rtwn_rx_data *rx_data = &sc->rx_ring.rx_data[i];
if (le32toh(rx_desc->rxdw0) & R92C_RXDW0_OWN)

File diff suppressed because it is too large Load Diff

View File

@ -1,4 +1,4 @@
/* $NetBSD: if_urtwn.c,v 1.59 2018/06/26 06:48:02 msaitoh Exp $ */
/* $NetBSD: if_urtwn.c,v 1.60 2018/06/29 04:02:10 thorpej Exp $ */
/* $OpenBSD: if_urtwn.c,v 1.42 2015/02/10 23:25:46 mpi Exp $ */
/*-
@ -25,7 +25,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: if_urtwn.c,v 1.59 2018/06/26 06:48:02 msaitoh Exp $");
__KERNEL_RCSID(0, "$NetBSD: if_urtwn.c,v 1.60 2018/06/29 04:02:10 thorpej Exp $");
#ifdef _KERNEL_OPT
#include "opt_inet.h"
@ -73,9 +73,10 @@ __KERNEL_RCSID(0, "$NetBSD: if_urtwn.c,v 1.59 2018/06/26 06:48:02 msaitoh Exp $"
#include <dev/usb/usbdi_util.h>
#include <dev/usb/usbdevs.h>
#include <dev/ic/rtwnreg.h>
#include <dev/ic/rtwn_data.h>
#include <dev/usb/if_urtwnreg.h>
#include <dev/usb/if_urtwnvar.h>
#include <dev/usb/if_urtwn_data.h>
/*
* The sc_write_mtx locking is to prevent sequences of writes from
@ -1511,7 +1512,7 @@ urtwn_ra_init(struct urtwn_softc *sc)
struct ieee80211_rateset *rs = &ni->ni_rates;
struct r92c_fw_cmd_macid_cfg cmd;
uint32_t rates, basicrates;
uint32_t mask, rrsr_mask, rrsr_rate;
uint32_t rrsr_mask, rrsr_rate;
uint8_t mode;
size_t maxrate, maxbasicrate, i, j;
int error;
@ -1563,15 +1564,10 @@ urtwn_ra_init(struct urtwn_softc *sc)
}
/* Set rates mask for group addressed frames. */
cmd.macid = URTWN_MACID_BC | URTWN_MACID_VALID;
cmd.macid = RTWN_MACID_BC | RTWN_MACID_VALID;
if (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)
cmd.macid |= URTWN_MACID_SHORTGI;
mask = (mode << 28) | basicrates;
cmd.mask[0] = (uint8_t)mask;
cmd.mask[1] = (uint8_t)(mask >> 8);
cmd.mask[2] = (uint8_t)(mask >> 16);
cmd.mask[3] = (uint8_t)(mask >> 24);
cmd.macid |= RTWN_MACID_SHORTGI;
cmd.mask = htole32((mode << 28) | basicrates);
error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd));
if (error != 0) {
aprint_error_dev(sc->sc_dev,
@ -1581,18 +1577,13 @@ urtwn_ra_init(struct urtwn_softc *sc)
/* Set initial MRR rate. */
DPRINTFN(DBG_INIT, ("%s: %s: maxbasicrate=%zd\n",
device_xname(sc->sc_dev), __func__, maxbasicrate));
urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BC), maxbasicrate);
urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(RTWN_MACID_BC), maxbasicrate);
/* Set rates mask for unicast frames. */
cmd.macid = URTWN_MACID_BSS | URTWN_MACID_VALID;
cmd.macid = RTWN_MACID_BSS | RTWN_MACID_VALID;
if (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)
cmd.macid |= URTWN_MACID_SHORTGI;
mask = (mode << 28) | rates;
cmd.mask[0] = (uint8_t)mask;
cmd.mask[1] = (uint8_t)(mask >> 8);
cmd.mask[2] = (uint8_t)(mask >> 16);
cmd.mask[3] = (uint8_t)(mask >> 24);
cmd.macid |= RTWN_MACID_SHORTGI;
cmd.mask = htole32((mode << 28) | rates);
error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd));
if (error != 0) {
aprint_error_dev(sc->sc_dev, "could not add BSS station\n");
@ -1601,7 +1592,7 @@ urtwn_ra_init(struct urtwn_softc *sc)
/* Set initial MRR rate. */
DPRINTFN(DBG_INIT, ("%s: %s: maxrate=%zd\n", device_xname(sc->sc_dev),
__func__, maxrate));
urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BSS), maxrate);
urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(RTWN_MACID_BSS), maxrate);
rrsr_rate = ic->ic_fixed_rate;
if (rrsr_rate == -1)
@ -2310,7 +2301,7 @@ urtwn_rx_frame(struct urtwn_softc *sc, uint8_t *buf, int pktlen)
struct ifnet *ifp = ic->ic_ifp;
struct ieee80211_frame *wh;
struct ieee80211_node *ni;
struct r92c_rx_stat *stat;
struct r92c_rx_desc_usb *stat;
uint32_t rxdw0, rxdw3;
struct mbuf *m;
uint8_t rate;
@ -2320,7 +2311,7 @@ urtwn_rx_frame(struct urtwn_softc *sc, uint8_t *buf, int pktlen)
DPRINTFN(DBG_FN, ("%s: %s: buf=%p, pktlen=%d\n",
device_xname(sc->sc_dev), __func__, buf, pktlen));
stat = (struct r92c_rx_stat *)buf;
stat = (struct r92c_rx_desc_usb *)buf;
rxdw0 = le32toh(stat->rxdw0);
rxdw3 = le32toh(stat->rxdw3);
@ -2443,7 +2434,7 @@ urtwn_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
{
struct urtwn_rx_data *data = priv;
struct urtwn_softc *sc = data->sc;
struct r92c_rx_stat *stat;
struct r92c_rx_desc_usb *stat;
size_t pidx = data->pidx;
uint32_t rxdw0;
uint8_t *buf;
@ -2475,7 +2466,7 @@ urtwn_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
buf = data->buf;
/* Get the number of encapsulated frames. */
stat = (struct r92c_rx_stat *)buf;
stat = (struct r92c_rx_desc_usb *)buf;
npkts = MS(le32toh(stat->rxdw2), R92C_RXDW2_PKTCNT);
DPRINTFN(DBG_RX, ("%s: %s: Rx %d frames in one chunk\n",
device_xname(sc->sc_dev), __func__, npkts));
@ -2488,7 +2479,7 @@ urtwn_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
device_xname(sc->sc_dev), __func__, len));
break;
}
stat = (struct r92c_rx_stat *)buf;
stat = (struct r92c_rx_desc_usb *)buf;
rxdw0 = le32toh(stat->rxdw0);
pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN);
@ -2572,7 +2563,7 @@ urtwn_tx(struct urtwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni,
struct ieee80211com *ic = &sc->sc_ic;
struct ieee80211_frame *wh;
struct ieee80211_key *k = NULL;
struct r92c_tx_desc *txd;
struct r92c_tx_desc_usb *txd;
size_t i, padsize, xferlen, txd_len;
uint16_t seq, sum;
uint8_t raid, type, tid;
@ -2629,7 +2620,7 @@ urtwn_tx(struct urtwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni,
padsize = 0;
/* Fill Tx descriptor. */
txd = (struct r92c_tx_desc *)data->buf;
txd = (struct r92c_tx_desc_usb *)data->buf;
memset(txd, 0, txd_len + padsize);
txd->txdw0 |= htole32(
@ -2662,13 +2653,13 @@ urtwn_tx(struct urtwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni,
if (!ISSET(sc->chip, URTWN_CHIP_92C)) {
txd->txdw1 |= htole32(
SM(R88E_TXDW1_MACID, URTWN_MACID_BSS) |
SM(R88E_TXDW1_MACID, RTWN_MACID_BSS) |
SM(R92C_TXDW1_QSEL, tid) |
SM(R92C_TXDW1_RAID, raid) |
R92C_TXDW1_AGGBK);
} else
txd->txdw1 |= htole32(
SM(R92C_TXDW1_MACID, URTWN_MACID_BSS) |
SM(R92C_TXDW1_MACID, RTWN_MACID_BSS) |
SM(R92C_TXDW1_QSEL, tid) |
SM(R92C_TXDW1_RAID, raid) |
R92C_TXDW1_AGGBK);
@ -2704,7 +2695,7 @@ urtwn_tx(struct urtwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni,
DPRINTFN(DBG_TX, ("%s: %s: mgmt packet\n",
device_xname(sc->sc_dev), __func__));
txd->txdw1 |= htole32(
SM(R92C_TXDW1_MACID, URTWN_MACID_BSS) |
SM(R92C_TXDW1_MACID, RTWN_MACID_BSS) |
SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_MGNT) |
SM(R92C_TXDW1_RAID, R92C_RAID_11B));
@ -2717,7 +2708,7 @@ urtwn_tx(struct urtwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni,
DPRINTFN(DBG_TX, ("%s: %s: bc or mc packet\n",
device_xname(sc->sc_dev), __func__));
txd->txdw1 |= htole32(
SM(R92C_TXDW1_MACID, URTWN_MACID_BC) |
SM(R92C_TXDW1_MACID, RTWN_MACID_BC) |
SM(R92C_TXDW1_RAID, R92C_RAID_11B));
/* Force CCK1. */
@ -3668,7 +3659,7 @@ urtwn_mac_init(struct urtwn_softc *sc)
static void
urtwn_bb_init(struct urtwn_softc *sc)
{
const struct urtwn_bb_prog *prog;
const struct rtwn_bb_prog *prog;
uint32_t reg;
uint8_t crystalcap;
size_t i;
@ -3832,7 +3823,7 @@ urtwn_bb_init(struct urtwn_softc *sc)
static void
urtwn_rf_init(struct urtwn_softc *sc)
{
const struct urtwn_rf_prog *prog;
const struct rtwn_rf_prog *prog;
uint32_t reg, mask, saved;
size_t i, j, idx;
@ -4110,7 +4101,7 @@ urtwn_get_txpower(struct urtwn_softc *sc, size_t chain, u_int chan, u_int ht40m,
{
struct r92c_rom *rom = &sc->rom;
uint16_t cckpow, ofdmpow, htpow, diff, maxpow;
const struct urtwn_txpwr *base;
const struct rtwn_txpwr *base;
int ridx, group;
DPRINTFN(DBG_FN, ("%s: %s: chain=%zd, chan=%d\n",
@ -4223,7 +4214,7 @@ urtwn_r88e_get_txpower(struct urtwn_softc *sc, size_t chain, u_int chan,
u_int ht40m, uint16_t power[URTWN_RIDX_COUNT])
{
uint16_t cckpow, ofdmpow, bw20pow, htpow;
const struct urtwn_r88e_txpwr *base;
const struct rtwn_r88e_txpwr *base;
int ridx, group;
DPRINTFN(DBG_FN, ("%s: %s: chain=%zd, chan=%d\n",
@ -4435,7 +4426,7 @@ urtwn_iq_calib(struct urtwn_softc *sc, bool inited)
/* Save mac regs. */
iqkBackup[0] = urtwn_read_1(sc, R92C_TXPAUSE);
iqkBackup[1] = urtwn_read_1(sc, R92C_BCN_CTRL);
iqkBackup[2] = urtwn_read_1(sc, R92C_USTIME_TSF);
iqkBackup[2] = urtwn_read_1(sc, R92C_BCN_CTRL1);
iqkBackup[3] = urtwn_read_4(sc, R92C_GPIO_MUXCFG);
#ifdef notyet
@ -4478,10 +4469,11 @@ next_attempt:
if (sc->ntxchains > 1)
urtwn_bb_write(sc, R92C_LSSI_PARAM(1), R92C_IQK_LSSI_PARAM);
urtwn_write_1(sc, R92C_TXPAUSE, (~TP_STOPBECON) & TP_STOPALL);
urtwn_write_1(sc, R92C_TXPAUSE, (~R92C_TXPAUSE_BCN) & R92C_TXPAUSE_ALL);
urtwn_write_1(sc, R92C_BCN_CTRL, (iqkBackup[1] &
~R92C_BCN_CTRL_EN_BCN));
urtwn_write_1(sc, R92C_USTIME_TSF, (iqkBackup[2] & ~0x8));
urtwn_write_1(sc, R92C_BCN_CTRL1, (iqkBackup[2] &
~R92C_BCN_CTRL_EN_BCN));
urtwn_write_1(sc, R92C_GPIO_MUXCFG, (iqkBackup[3] &
~R92C_GPIO_MUXCFG_ENBT));
@ -4785,8 +4777,8 @@ urtwn_init(struct ifnet *ifp)
/* Initialize beacon parameters. */
urtwn_write_2(sc, R92C_BCN_CTRL, 0x1010);
urtwn_write_2(sc, R92C_TBTT_PROHIBIT, 0x6404);
urtwn_write_1(sc, R92C_DRVERLYINT, R92C_DRIVER_EARLY_INT_TIME);
urtwn_write_1(sc, R92C_BCNDMATIM, R92C_DMA_ATIME_INT_TIME);
urtwn_write_1(sc, R92C_DRVERLYINT, R92C_DRVERLYINT_INIT_TIME);
urtwn_write_1(sc, R92C_BCNDMATIM, R92C_BCNDMATIM_INIT_TIME);
urtwn_write_2(sc, R92C_BCNTCFG, 0x660f);
if (!ISSET(sc->chip, URTWN_CHIP_88E) &&

File diff suppressed because it is too large Load Diff

View File

@ -1,4 +1,4 @@
/* $NetBSD: if_urtwnvar.h,v 1.10 2016/10/12 03:23:29 nat Exp $ */
/* $NetBSD: if_urtwnvar.h,v 1.11 2018/06/29 04:02:10 thorpej Exp $ */
/* $OpenBSD: if_urtwnreg.h,v 1.3 2010/11/16 18:02:59 damien Exp $ */
/*-
@ -28,7 +28,7 @@
#define URTWN_HOST_CMD_RING_COUNT 32
#define URTWN_RXBUFSZ (16 * 1024)
#define URTWN_TXBUFSZ (sizeof(struct r92c_tx_desc) + IEEE80211_MAX_LEN + 8)
#define URTWN_TXBUFSZ (sizeof(struct r92c_tx_desc_usb) + IEEE80211_MAX_LEN + 8)
#define URTWN_RIDX_COUNT 28