From 3d776f64cfabf8e0c614432ece9d6f33b337043d Mon Sep 17 00:00:00 2001 From: scw Date: Sat, 28 Sep 2002 11:08:13 +0000 Subject: [PATCH] These hackish changes have been sitting around for a while. Commit them so they don't get lost. This driver will be overhauled later on anyway to make it shareable between sh[3-5]. --- sys/arch/sh5/dev/scif.c | 38 +++++++++++++++++++++++++------------- 1 file changed, 25 insertions(+), 13 deletions(-) diff --git a/sys/arch/sh5/dev/scif.c b/sys/arch/sh5/dev/scif.c index 597dfd5e4195..460c94e3e1ee 100644 --- a/sys/arch/sh5/dev/scif.c +++ b/sys/arch/sh5/dev/scif.c @@ -1,4 +1,4 @@ -/* $NetBSD: scif.c,v 1.3 2002/09/27 20:35:30 thorpej Exp $ */ +/* $NetBSD: scif.c,v 1.4 2002/09/28 11:08:13 scw Exp $ */ /*- * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu. All rights reserved. @@ -251,7 +251,7 @@ int scifisconsole = 0; #ifdef SCIFCN_SPEED unsigned int scifcn_speed = SCIFCN_SPEED; #else -unsigned int scifcn_speed = 9600; +unsigned int scifcn_speed = 38400; #endif #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ @@ -350,11 +350,11 @@ InitializeScif(bus_space_tag_t bt, bus_space_handle_t bh, unsigned int bps) /* Serial Mode Register */ /* 8bit,NonParity,Even,1Stop */ bus_space_write_2(bt, bh, SCIF_REG_SCSMR2, 0x00); - +#if 0 /* Bit Rate Register */ bus_space_write_1(bt, bh, SCIF_REG_SCBRR2, divrnd(cprc_clocks.cc_peripheral, 32 * bps) - 1); - +#endif /* * wait 1mSec, because Send/Recv must begin 1 bit period after * BRR is set. @@ -366,7 +366,9 @@ InitializeScif(bus_space_tag_t bt, bus_space_handle_t bh, unsigned int bps) /* Send permission, Receive permission ON */ bus_space_write_2(bt, bh, SCIF_REG_SCSCR2, - SCIF_SCSCR2_TE | SCIF_SCSCR2_RE); + SCIF_SCSCR2_TE | SCIF_SCSCR2_RE | 0x0a); + + bus_space_write_2(bt, bh, SCIF_REG_SCSPTR2, 0x85); /* Serial Status Register */ /* Clear Status */ @@ -412,6 +414,7 @@ scif_putc(bus_space_tag_t bt, bus_space_handle_t bh, unsigned char c) static unsigned char scif_getc(bus_space_tag_t bt, bus_space_handle_t bh) { +#if 0 u_int8_t c, err_c; u_int16_t err_c2; @@ -428,18 +431,15 @@ scif_getc(bus_space_tag_t bt, bus_space_handle_t bh) } c = bus_space_read_1(bt, bh, SCIF_REG_SCFDR2); - err_c = bus_space_read_2(bt, bh, SCIF_REG_SCFSR2); + err_c = bus_space_read_2(bt, bh, SCIF_REG_SCFSR2); bus_space_write_2(bt, bh, SCIF_REG_SCFSR2, - bus_space_read_2(bt, bh, SCIF_REG_SCFSR2) & - ~(SCIF_SCFSR2_ER | SCIF_SCFSR2_BRK | - SCIF_SCFSR2_RDF | SCIF_SCFSR2_DR)); + err_c & ~(SCIF_SCFSR2_ER | SCIF_SCFSR2_BRK | + SCIF_SCFSR2_RDF | SCIF_SCFSR2_DR)); err_c2 = bus_space_read_2(bt, bh, SCIF_REG_SCLSR2); - bus_space_write_2(bt, bh, SCIF_REG_SCLSR2, - bus_space_read_2(bt, bh, SCIF_REG_SCLSR2) & - ~SCIF_SCLSR2_ORER); + err_c2 & ~SCIF_SCLSR2_ORER); if ((err_c & (SCIF_SCFSR2_ER | SCIF_SCFSR2_BRK | SCIF_SCFSR2_FER | SCIF_SCFSR2_PER)) == 0) { @@ -447,6 +447,18 @@ scif_getc(bus_space_tag_t bt, bus_space_handle_t bh) return(c); } } +#else + unsigned char c; + + while (!(bus_space_read_2(bt, bh, SCIF_REG_SCFSR2) & SCIF_SCFSR2_DR)) + ; + + c = bus_space_read_1(bt, bh, SCIF_REG_SCFRD2); + + bus_space_write_2(bt, bh, SCIF_REG_SCFSR2, 0); + + return (c); +#endif } #if 0 @@ -486,7 +498,7 @@ scif_attach(struct device *parent, struct device *self, void *args) sc->sc_fifolen = 16; sc->sc_iot = pa->pa_bust; - bus_space_map(sc->sc_iot, pa->pa_offset, SCIF_REG_SZ, 0, sc->sc_ioh); + bus_space_map(sc->sc_iot, pa->pa_offset, SCIF_REG_SZ, 0, &sc->sc_ioh); if (scifisconsole || kgdb_attached) { /* InitializeScif(scifcn_speed); */