CPU support for 4000/90 (KA49).
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/*
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* Copyright (c) 1999 Ludd, University of Lule}, Sweden.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed at Ludd, University of
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* Lule}, Sweden and its contributors.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/systm.h>
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#include <machine/clock.h>
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#include <machine/cpu.h>
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#include <machine/scb.h>
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static void ka49_conf __P((void));
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static void ka49_memerr __P((void));
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static int ka49_mchk __P((caddr_t));
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static void ka49_halt __P((void));
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static void ka49_reboot __P((int));
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static void ka49_softmem __P((int));
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static void ka49_hardmem __P((int));
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static void ka49_steal_pages __P((void));
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static void ka49_cache_enable __P((void));
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static void ka49_halt __P((void));
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/*
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* Declaration of 49-specific calls.
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*/
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struct cpu_dep ka49_calls = {
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ka49_steal_pages,
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ka49_mchk,
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ka49_memerr,
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ka49_conf,
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chip_clkread,
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chip_clkwrite,
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16, /* ~VUPS */
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2, /* SCB pages */
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ka49_halt,
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ka49_reboot,
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};
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void
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ka49_conf()
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{
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printf("cpu0: KA49\n");
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/* Why??? */
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{ volatile int *hej = (void *)mfpr(PR_ISP); *hej = *hej; hej[-1] = hej[-1];}
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/*
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* Setup parameters necessary to read time from clock chip.
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*/
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clk_adrshift = 1; /* Addressed at long's... */
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clk_tweak = 2; /* ...and shift two */
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clk_page = (short *)vax_map_physmem(0x25400000, 1);
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}
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/*
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* Why may we get memory errors during startup???
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*/
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void
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ka49_hardmem(arg)
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{
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if (cold == 0)
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printf("Hard memory error\n");
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splhigh();
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}
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void
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ka49_softmem(arg)
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{
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if (cold == 0)
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printf("Soft memory error\n");
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splhigh();
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}
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/*
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* KA49-specific IPRs. KA49 has the funny habit to control all caches
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* via IPRs.
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*/
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#define PR_CCTL 0xa0
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#define CCTL_ENABLE 0x00000001
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#define CCTL_SSIZE 0x00000002
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#define CCTL_VSIZE 0x00000004
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#define CCTL_SW_ETM 0x40000000
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#define CCTL_HW_ETM 0x80000000
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#define PR_BCETSTS 0xa3
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#define PR_BCEDSTS 0xa6
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#define PR_NESTS 0xae
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#define PR_VMAR 0xd0
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#define PR_VTAG 0xd1
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#define PR_ICSR 0xd3
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#define ICSR_ENABLE 0x01
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#define PR_PCCTL 0xf8
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#define PCCTL_P_EN 0x10
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#define PCCTL_I_EN 0x02
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#define PCCTL_D_EN 0x01
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void
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ka49_cache_enable()
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{
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int start, slut;
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/*
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* Turn caches off.
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*/
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mtpr(0, PR_ICSR);
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mtpr(0, PR_PCCTL);
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mtpr(mfpr(PR_CCTL) | CCTL_SW_ETM, PR_CCTL);
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/*
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* Invalidate caches.
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*/
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mtpr(mfpr(PR_CCTL) | 0x10, PR_CCTL); /* Set cache size */
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mtpr(mfpr(PR_BCETSTS), PR_BCETSTS); /* Clear error bits */
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mtpr(mfpr(PR_BCEDSTS), PR_BCEDSTS); /* Clear error bits */
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mtpr(mfpr(PR_NESTS), PR_NESTS); /* Clear error bits */
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start = 0x01400000;
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slut = 0x01440000;
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/* Flush cache lines */
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for (; start < slut; start += 0x20)
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mtpr(0, start);
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mtpr((mfpr(PR_CCTL) & ~(CCTL_SW_ETM|CCTL_ENABLE)) | CCTL_HW_ETM,
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PR_CCTL);
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start = 0x01000000;
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slut = 0x01040000;
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/* clear tag and valid */
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for (; start < slut; start += 0x20)
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mtpr(0, start);
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mtpr(mfpr(PR_CCTL) | 0x10 | CCTL_ENABLE, PR_CCTL); /* enab. bcache */
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start = 0x01800000;
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slut = 0x01802000;
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/* Clear primary cache */
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for (; start < slut; start += 0x20)
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mtpr(0, start);
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/* Flush the pipes (via REI) */
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asm("movpsl -(sp); movab 1f,-(sp); rei; 1:;");
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/* Enable primary cache */
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mtpr(PCCTL_P_EN|PCCTL_I_EN|PCCTL_D_EN, PR_PCCTL);
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/* Enable the VIC */
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start = 0;
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slut = 0x800;
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for (; start < slut; start += 0x20) {
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mtpr(start, PR_VMAR);
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mtpr(0, PR_VTAG);
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}
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mtpr(ICSR_ENABLE, PR_ICSR);
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}
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void
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ka49_memerr()
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{
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printf("Memory err!\n");
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}
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int
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ka49_mchk(addr)
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caddr_t addr;
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{
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panic("Machine check");
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return 0;
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}
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void
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ka49_steal_pages()
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{
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/*
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* Get the soft and hard memory error vectors now.
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*/
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scb_vecalloc(0x54, ka49_softmem, 0, 0);
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scb_vecalloc(0x60, ka49_hardmem, 0, 0);
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/* Turn on caches (to speed up execution a bit) */
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ka49_cache_enable();
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}
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static void
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ka49_halt()
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{
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asm("halt");
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}
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static void
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ka49_reboot(arg)
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int arg;
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{
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asm("halt");
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: locore.c,v 1.39 1999/08/07 10:36:49 ragge Exp $ */
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/* $NetBSD: locore.c,v 1.40 1999/08/27 20:02:05 ragge Exp $ */
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/*
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* Copyright (c) 1994, 1998 Ludd, University of Lule}, Sweden.
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* All rights reserved.
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@ -67,9 +67,11 @@ extern struct cpu_dep ka820_calls;
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extern struct cpu_dep ka43_calls;
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extern struct cpu_dep ka46_calls;
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extern struct cpu_dep ka48_calls;
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extern struct cpu_dep ka49_calls;
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extern struct cpu_dep ka410_calls;
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extern struct cpu_dep ka630_calls;
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extern struct cpu_dep ka650_calls;
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extern struct cpu_dep ka660_calls;
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extern struct cpu_dep ka670_calls;
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/*
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@ -151,7 +153,7 @@ start()
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#endif
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#if VAX49
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case VAX_BTYP_49:
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dep_call = &ka48_calls;
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dep_call = &ka49_calls;
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strcat(cpu_model, "4000/90");
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break;
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#endif
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@ -184,6 +186,12 @@ start()
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}
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break;
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#endif
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#if VAX660
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case VAX_BTYP_660:
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dep_call = &ka660_calls;
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strcpy(cpu_model,"VAX 4000/200");
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break;
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#endif
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#if VAX670
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case VAX_BTYP_670:
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dep_call = &ka670_calls;
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