From 3c5d2c7facf8715cb14802fb082720db350bace9 Mon Sep 17 00:00:00 2001 From: msaitoh Date: Fri, 29 Sep 2000 08:08:37 +0000 Subject: [PATCH] avoid SH7709A's serious bug (it fails to read IPR* registers under particular circumstances) --- sys/arch/evbsh3/conf/COMPUTEXEVB | 4 +-- sys/arch/evbsh3/evbsh3/shb.c | 46 ++++++++++++++++++++++++++++++-- 2 files changed, 46 insertions(+), 4 deletions(-) diff --git a/sys/arch/evbsh3/conf/COMPUTEXEVB b/sys/arch/evbsh3/conf/COMPUTEXEVB index 3e75affcde6b..362ac7fe2868 100644 --- a/sys/arch/evbsh3/conf/COMPUTEXEVB +++ b/sys/arch/evbsh3/conf/COMPUTEXEVB @@ -1,4 +1,4 @@ -# $NetBSD: COMPUTEXEVB,v 1.7 2000/09/26 22:20:03 msaitoh Exp $ +# $NetBSD: COMPUTEXEVB,v 1.8 2000/09/29 08:08:38 msaitoh Exp $ # # GENERIC -- everything that's currently supported # @@ -14,7 +14,7 @@ options MINIROOTSIZE=3074 # size of memory disk, in blocks maxusers 32 # estimated number of users # CPU support. At least one is REQUIRED. -options SH7709A # 100MHz +options SH7709A,SH7709A_BROKEN_IPR # 100MHz options PCLOCK=25000000 # 25.000MHz options IOM_ROM_BEGIN=0x00000000 options IOM_ROM_SIZE=0x00100000 # 1MB diff --git a/sys/arch/evbsh3/evbsh3/shb.c b/sys/arch/evbsh3/evbsh3/shb.c index c3653c0c3ece..855962f617d8 100644 --- a/sys/arch/evbsh3/evbsh3/shb.c +++ b/sys/arch/evbsh3/evbsh3/shb.c @@ -1,4 +1,4 @@ -/* $NetBSD: shb.c,v 1.11 2000/08/17 13:07:51 msaitoh Exp $ */ +/* $NetBSD: shb.c,v 1.12 2000/09/29 08:08:37 msaitoh Exp $ */ /*- * Copyright (c) 1993, 1994 Charles Hannum. All rights reserved. @@ -375,7 +375,6 @@ fakeintr(arg) #define IRQ_BIT(irq_num) (1 << (irq_num)) - /*ARGSUSED*/ int /* 1 = check ipending on return, 0 = fast intr return */ intrhandler(p1, p2, p3, p4, frame) @@ -502,20 +501,48 @@ check_ipending(p1, p2, p3, p4, frame) } #if !defined(SH4) + +#ifdef SH7709A_BROKEN_IPR /* broken IPR patch */ + +#define IPRA 0 +#define IPRB 1 +#define IPRC 2 +#define IPRD 3 +#define IPRE 4 + +static unsigned short ipr[ 5 ]; + +#endif /* SH7709A_BROKEN_IPR */ + void mask_irq(irq) int irq; { switch (irq) { case TMU1_IRQ: +#ifdef SH7709A_BROKEN_IPR + ipr[IPRA] &= ~((15)<<8); + SHREG_IPRA = ipr[IPRA]; +#else SHREG_IPRA &= ~((15)<<8); +#endif break; case SCI_IRQ: +#ifdef SH7709A_BROKEN_IPR + ipr[IPRB] &= ~((15)<<4); + SHREG_IPRB = ipr[IPRB]; +#else SHREG_IPRB &= ~((15)<<4); +#endif break; #if defined(SH7709) || defined(SH7709A) || defined(SH7729) case SCIF_IRQ: +#ifdef SH7709A_BROKEN_IPR + ipr[IPRE] &= ~((15)<<4); + SHREG_IPRE = ipr[IPRE]; +#else SHREG_IPRE &= ~((15)<<4); +#endif break; #endif #if 0 @@ -545,14 +572,29 @@ unmask_irq(irq) switch (irq) { case TMU1_IRQ: +#ifdef SH7709A_BROKEN_IPR + ipr[ IPRA ] |= ((15 - irq)<<8); + SHREG_IPRA = ipr[ IPRA ]; +#else SHREG_IPRA |= ((15 - irq)<<8); +#endif break; case SCI_IRQ: +#ifdef SH7709A_BROKEN_IPR + ipr[IPRB] |= ((15 - irq)<<4); + SHREG_IPRB = ipr[IPRB]; +#else SHREG_IPRB |= ((15 - irq)<<4); +#endif break; #if defined(SH7709) || defined(SH7709A) || defined(SH7729) case SCIF_IRQ: +#ifdef SH7709A_BROKEN_IPR + ipr[ IPRE ] |= ((15 - irq)<<4); + SHREG_IPRE = ipr[ IPRE ]; +#else SHREG_IPRE |= ((15 - irq)<<4); +#endif break; #endif #if 0