No longer use size_t in the chip structure.
This commit is contained in:
ahoka
parent
2e03ba1139
commit
3c5212aaaa
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@ -1,4 +1,4 @@
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/* $NetBSD: nand.c,v 1.18 2012/10/31 18:58:08 riz Exp $ */
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/* $NetBSD: nand.c,v 1.19 2012/11/02 17:14:41 ahoka Exp $ */
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/*-
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* Copyright (c) 2010 Department of Software Engineering,
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@ -34,7 +34,7 @@
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/* Common driver for NAND chips implementing the ONFI 2.2 specification */
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: nand.c,v 1.18 2012/10/31 18:58:08 riz Exp $");
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__KERNEL_RCSID(0, "$NetBSD: nand.c,v 1.19 2012/11/02 17:14:41 ahoka Exp $");
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#include "locators.h"
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@ -402,13 +402,13 @@ nand_scan_media(device_t self, struct nand_chip *chip)
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#endif
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aprint_normal_dev(self,
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"page size: %zu bytes, spare size: %zu bytes, "
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"block size: %zu bytes\n",
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"page size: %" PRIu32 " bytes, spare size: %" PRIu32 " bytes, "
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"block size: %" PRIu32 " bytes\n",
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chip->nc_page_size, chip->nc_spare_size, chip->nc_block_size);
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aprint_normal_dev(self,
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"LUN size: %" PRIu32 " blocks, LUNs: %" PRIu8
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", total storage size: %zu MB\n",
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", total storage size: %" PRIu64 " MB\n",
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chip->nc_lun_blocks, chip->nc_num_luns,
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chip->nc_size / 1024 / 1024);
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@ -441,7 +441,7 @@ nand_scan_media(device_t self, struct nand_chip *chip)
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ecc->necc_offset = 80;
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break;
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default:
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panic("OOB size %zu is unexpected", chip->nc_spare_size);
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panic("OOB size %" PRIu32 " is unexpected", chip->nc_spare_size);
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}
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ecc->necc_steps = chip->nc_page_size / ecc->necc_block_size;
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@ -597,7 +597,7 @@ nand_address_column(device_t self, size_t row, size_t column)
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struct nand_chip *chip = &sc->sc_chip;
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uint8_t i;
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DPRINTF(("addressing row: 0x%jx column: %zu\n",
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DPRINTF(("addressing row: 0x%jx column: %" PRIu32 "\n",
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(uintmax_t )row, column));
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/* XXX TODO */
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@ -727,18 +727,18 @@ nand_default_read_page(device_t self, size_t offset, uint8_t *data)
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case NAND_ECC_CORRECTED:
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aprint_error_dev(self,
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"data corrected with ECC at page offset 0x%jx "
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"block %zu\n", (uintmax_t)offset, b);
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"block %" PRIu32 "\n", (uintmax_t)offset, b);
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break;
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case NAND_ECC_TWOBIT:
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aprint_error_dev(self,
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"uncorrectable ECC error at page offset 0x%jx "
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"block %zu\n", (uintmax_t)offset, b);
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"block %" PRIu32 "\n", (uintmax_t)offset, b);
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return EIO;
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break;
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case NAND_ECC_INVALID:
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aprint_error_dev(self,
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"invalid ECC in oob at page offset 0x%jx "
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"block %zu\n", (uintmax_t)offset, b);
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"block %" PRIu32 "\n", (uintmax_t)offset, b);
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return EIO;
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break;
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default:
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@ -1153,8 +1153,8 @@ nand_flash_write_unaligned(device_t self, flash_off_t offset, size_t len,
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} else {
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/* XXX debug */
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if (left > chip->nc_page_size) {
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printf("left: %zu, i: %d, count: %zu\n",
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(size_t )left, i, count);
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printf("left: %" PRIu32 ", i: %d, count: %" PRIu32 "\n",
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left, i, count);
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}
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KASSERT(left > chip->nc_page_size);
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@ -1232,7 +1232,7 @@ nand_flash_write(device_t self, flash_off_t offset, size_t len, size_t *retlen,
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}
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out:
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mutex_exit(&sc->sc_device_lock);
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DPRINTF(("page programming: retlen: %zu, len: %zu\n", *retlen, len));
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DPRINTF(("page programming: retlen: %" PRIu32 ", len: %" PRIu32 "\n", *retlen, len));
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return error;
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}
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@ -1324,11 +1324,11 @@ nand_flash_read(device_t self, flash_off_t offset, size_t len, size_t *retlen,
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*retlen = 0;
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DPRINTF(("nand_flash_read: off: 0x%jx, len: %zu\n",
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DPRINTF(("nand_flash_read: off: 0x%jx, len: %" PRIu32 "\n",
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(uintmax_t)offset, len));
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if (__predict_false((offset + len) > chip->nc_size)) {
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DPRINTF(("nand_flash_read: read (off: 0x%jx, len: %zu),"
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DPRINTF(("nand_flash_read: read (off: 0x%jx, len: %" PRIu32 "),"
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" is over device size (%ju)\n", (uintmax_t)offset,
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len, (uintmax_t)chip->nc_size));
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return EINVAL;
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@ -1,4 +1,4 @@
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/* $NetBSD: nand.h,v 1.14 2012/10/31 18:58:08 riz Exp $ */
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/* $NetBSD: nand.h,v 1.15 2012/11/02 17:14:41 ahoka Exp $ */
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/*-
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* Copyright (c) 2010 Department of Software Engineering,
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@ -110,19 +110,19 @@ struct nand_chip {
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struct nand_ecc *nc_ecc; /* ecc information */
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uint8_t *nc_oob_cache; /* buffer for oob cache */
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uint8_t *nc_page_cache; /* buffer for page cache */
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uint8_t *nc_ecc_cache;
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size_t nc_size; /* storage size in bytes */
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size_t nc_page_size; /* page size in bytes */
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size_t nc_block_pages; /* block size in pages */
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size_t nc_block_size; /* block size in bytes */
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size_t nc_spare_size; /* spare (oob) size in bytes */
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uint8_t *nc_ecc_cache; /* buffer for ecc */
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uint64_t nc_size; /* storage size in bytes */
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uint32_t nc_page_size; /* page size in bytes */
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uint32_t nc_block_pages; /* block size in pages */
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uint32_t nc_block_size; /* block size in bytes */
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uint32_t nc_spare_size; /* spare (oob) size in bytes */
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uint32_t nc_lun_blocks; /* LUN size in blocks */
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uint32_t nc_flags; /* bitfield flags */
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uint32_t nc_quirks; /* bitfield quirks */
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unsigned int nc_page_shift; /* page shift for page alignment */
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unsigned int nc_page_mask; /* page mask for page alignment */
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unsigned int nc_block_shift; /* write shift */
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unsigned int nc_block_mask; /* write mask */
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uint32_t nc_page_shift; /* page shift for page alignment */
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uint32_t nc_page_mask; /* page mask for page alignment */
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uint32_t nc_block_shift; /* write shift */
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uint32_t nc_block_mask; /* write mask */
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uint8_t nc_num_luns; /* number of LUNs */
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uint8_t nc_manf_id; /* manufacturer id */
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uint8_t nc_dev_id; /* device id */
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@ -1,4 +1,4 @@
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/* $NetBSD: nand_micron.c,v 1.6 2011/07/15 19:19:57 cliff Exp $ */
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/* $NetBSD: nand_micron.c,v 1.7 2012/11/02 17:14:41 ahoka Exp $ */
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/*-
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* Copyright (c) 2011 Department of Software Engineering,
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@ -39,7 +39,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: nand_micron.c,v 1.6 2011/07/15 19:19:57 cliff Exp $");
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__KERNEL_RCSID(0, "$NetBSD: nand_micron.c,v 1.7 2012/11/02 17:14:41 ahoka Exp $");
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#include "nand.h"
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#include "onfi.h"
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@ -159,7 +159,7 @@ mt29fxgx_parameters(device_t self, struct nand_chip * const chip,
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chip->nc_size = MT29FxG_PAGESIZE * MT29FxG_BLOCK_PAGES *
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dp->lun_blocks * dp->num_luns;
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aprint_normal_dev(self, "%s %s, size %zuMB\n",
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aprint_normal_dev(self, "%s %s, size %" PRIu64 "MB\n",
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vendor, dp->name, chip->nc_size >> 20);
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return 0;
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