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/* $NetBSD: footbridge_io.c,v 1.16 2009/12/15 21:38:20 skrll Exp $ */
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/* $NetBSD: footbridge_io.c,v 1.17 2010/11/18 18:06:21 skrll Exp $ */
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/*
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/*
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* Copyright (c) 1997 Causality Limited
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* Copyright (c) 1997 Causality Limited
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@ -39,7 +39,7 @@
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*/
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*/
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#include <sys/cdefs.h>
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: footbridge_io.c,v 1.16 2009/12/15 21:38:20 skrll Exp $");
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__KERNEL_RCSID(0, "$NetBSD: footbridge_io.c,v 1.17 2010/11/18 18:06:21 skrll Exp $");
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#include <sys/param.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/systm.h>
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@ -210,17 +210,16 @@ footbridge_mem_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags, bus_s
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/* Now map the pages */
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/* Now map the pages */
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/* The cookie is the physical base address for the I/O area */
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/* The cookie is the physical base address for the I/O area */
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for (pa = startpa; pa < endpa; pa+=PAGE_SIZE, va += PAGE_SIZE)
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for (pa = startpa; pa < endpa; pa+=PAGE_SIZE, va += PAGE_SIZE) {
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{
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pmap_enter(pmap_kernel(), va, (bus_addr_t)t + pa, VM_PROT_READ | VM_PROT_WRITE,
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pmap_enter(pmap_kernel(), va, (bus_addr_t)t + pa, VM_PROT_READ | VM_PROT_WRITE,
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VM_PROT_READ | VM_PROT_WRITE| PMAP_WIRED);
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VM_PROT_READ | VM_PROT_WRITE| PMAP_WIRED);
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if ((flags & BUS_SPACE_MAP_CACHEABLE) == 0) {
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if ((flags & BUS_SPACE_MAP_CACHEABLE) == 0) {
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pt_entry_t *pte;
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pt_entry_t *pte;
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pte = vtopte(va);
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pte = vtopte(va);
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*pte &= ~L2_S_CACHE_MASK;
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*pte &= ~L2_S_CACHE_MASK;
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PTE_SYNC(pte);
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PTE_SYNC(pte);
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}
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}
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}
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}
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pmap_update(pmap_kernel());
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pmap_update(pmap_kernel());
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/* if (bpa >= DC21285_PCI_MEM_VSIZE && bpa != DC21285_ARMCSR_VBASE)
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/* if (bpa >= DC21285_PCI_MEM_VSIZE && bpa != DC21285_ARMCSR_VBASE)
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