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Pull up following revision(s) (requested by msaitoh in ticket #649): 

sys/dev/mii/ihphy.c: revision 1.15

 Remove extra 10ms delay in ihphy_reset(). The delay are in if_wm.c side.
It's required for hardware full reset and it't not requred on soft reset.

 When ihphy.c was added in 9 years ago, some workaround code were not in
if_wm.c yet and the initialization code was not good.
This commit is contained in:
martin 2020-01-26 11:11:13 +00:00
parent ead075f9f9
commit 3ba0477766
1 changed files with 2 additions and 10 deletions
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12
sys/dev/mii/ihphy.c
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@ -1,4 +1,4 @@
/* $NetBSD: ihphy.c,v 1.14 2019/03/25 07:34:13 msaitoh Exp $ */
/* $NetBSD: ihphy.c,v 1.14.4.1 2020/01/26 11:11:13 martin Exp $ */
/*-
* Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
@ -60,7 +60,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: ihphy.c,v 1.14 2019/03/25 07:34:13 msaitoh Exp $");
__KERNEL_RCSID(0, "$NetBSD: ihphy.c,v 1.14.4.1 2020/01/26 11:11:13 martin Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -291,14 +291,6 @@ ihphy_reset(struct mii_softc *sc)
PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_ISO);
/*
* Regarding reset, the data sheet specifies (page 55):
*
* "After PHY reset, a delay of 10 ms is required before
* any register access using MDIO."
*/
delay(10000);
/* Wait another 100ms for it to complete. */
for (i = 0; i < 100; i++) {
PHY_READ(sc, MII_BMCR, &reg);