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* Define the 8-input, 16-input, and 32-input descriptors. 

* Adjust descriptor sync'ing to work with the additional descriptor
  formats.
This commit is contained in:
thorpej 2002-08-03 21:58:55 +00:00
parent a39c3378b6
commit 3b50c1710c
2 changed files with 81 additions and 10 deletions
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13
sys/arch/arm/xscale/iopaau.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: iopaau.c,v 1.5 2002/08/03 21:31:16 thorpej Exp $ */
/* $NetBSD: iopaau.c,v 1.6 2002/08/03 21:58:55 thorpej Exp $ */
/*
* Copyright (c) 2002 Wasabi Systems, Inc.
@ -43,7 +43,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: iopaau.c,v 1.5 2002/08/03 21:31:16 thorpej Exp $");
__KERNEL_RCSID(0, "$NetBSD: iopaau.c,v 1.6 2002/08/03 21:58:55 thorpej Exp $");
#include <sys/param.h>
#include <sys/pool.h>
@ -295,14 +295,14 @@ iopaau_func_fill_immed_setup(struct iopaau_softc *sc,
cur->d_dar = dmamap->dm_segs[seg].ds_addr;
cur->d_bc = dmamap->dm_segs[seg].ds_len;
cur->d_dc = AAU_DC_B1_CC(AAU_DC_CC_FILL) | AAU_DC_DWE;
SYNC_DESC_4(cur);
SYNC_DESC(cur, sizeof(struct aau_desc_4));
}
*prevp = NULL;
*prevpa = 0;
cur->d_dc |= AAU_DC_IE;
SYNC_DESC_4(cur);
SYNC_DESC(cur, sizeof(struct aau_desc_4));
sc->sc_lastdesc = cur;
@ -385,6 +385,7 @@ iopaau_func_xor_1_4_setup(struct iopaau_softc *sc, struct dmover_request *dreq)
struct aau_desc_4 **prevp, *cur;
int ninputs = dreq->dreq_assignment->das_algdesc->dad_ninputs;
int i, error, seg;
size_t descsz = AAU_DESC_SIZE(ninputs);
KASSERT(ninputs <= AAU_MAX_INPUTS);
@ -499,14 +500,14 @@ iopaau_func_xor_1_4_setup(struct iopaau_softc *sc, struct dmover_request *dreq)
cur->d_dar = dmamap->dm_segs[seg].ds_addr;
cur->d_bc = dmamap->dm_segs[seg].ds_len;
cur->d_dc = iopaau_dc_inputs[ninputs] | AAU_DC_DWE;
SYNC_DESC_4(cur);
SYNC_DESC(cur, descsz);
}
*prevp = NULL;
*prevpa = 0;
cur->d_dc |= AAU_DC_IE;
SYNC_DESC_4(cur);
SYNC_DESC(cur, descsz);
sc->sc_lastdesc = cur;

78
sys/arch/arm/xscale/iopaaureg.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: iopaaureg.h,v 1.2 2002/08/02 06:52:17 thorpej Exp $ */
/* $NetBSD: iopaaureg.h,v 1.3 2002/08/03 21:58:56 thorpej Exp $ */
/*
* Copyright (c) 2002 Wasabi Systems, Inc.
@ -68,11 +68,71 @@ struct aau_desc_4 {
uint32_t d_dc; /* descriptor control */
} __attribute__((__packed__));
struct aau_desc_8 {
struct aau_desc_8 *d_next; /* pointer to next (va) */
uint32_t d_pa; /* our physical address */
/* Hardware portion -- must be 32-byte aligned. */
uint32_t d_nda; /* next descriptor address */
uint32_t d_sar[4]; /* source address */
uint32_t d_dar; /* destination address */
uint32_t d_bc; /* byte count */
uint32_t d_dc; /* descriptor control */
/* Mini Descriptor */
uint32_t d_sar5_8[4]; /* source address */
} __attribute__((__packed__));
struct aau_desc_16 {
struct aau_desc_16 *d_next; /* pointer to next (va) */
uint32_t d_pa; /* our physical address */
/* Hardware portion -- must be 32-byte aligned. */
uint32_t d_nda; /* next descriptor address */
uint32_t d_sar[4]; /* source address */
uint32_t d_dar; /* destination address */
uint32_t d_bc; /* byte count */
uint32_t d_dc; /* descriptor control */
/* Mini Descriptor */
uint32_t d_sar5_8[4]; /* source address */
/* Extended Descriptor 0 */
uint32_t d_edc0; /* ext. descriptor control */
uint32_t d_sar9_16[8]; /* source address */
} __attribute__((__packed__));
struct aau_desc_32 {
struct aau_desc_32 *d_next; /* pointer to next (va) */
uint32_t d_pa; /* our physical address */
/* Hardware portion -- must be 32-byte aligned. */
uint32_t d_nda; /* next descriptor address */
uint32_t d_sar[4]; /* source address */
uint32_t d_dar; /* destination address */
uint32_t d_bc; /* byte count */
uint32_t d_dc; /* descriptor control */
/* Mini Descriptor */
uint32_t d_sar5_8[4]; /* source address */
/* Extended Descriptor 0 */
uint32_t d_edc0; /* ext. descriptor control */
uint32_t d_sar9_16[8]; /* source address */
/* Extended Descriptor 1 */
uint32_t d_edc1; /* ext. descriptor control */
uint32_t d_sar17_24[8]; /* source address */
/* Extended Descriptor 2 */
uint32_t d_edc2; /* ext. descriptor control */
uint32_t d_sar25_32[8]; /* source address */
} __attribute__((__packed__));
#define AAU_DESC_SIZE(ninputs) \
((ninputs > 16) ? sizeof(struct aau_desc_32) : \
(ninputs > 8) ? sizeof(struct aau_desc_16) : \
(ninputs > 4) ? sizeof(struct aau_desc_8) : \
sizeof(struct aau_desc_4))
#define SYNC_DESC_4_OFFSET offsetof(struct aau_desc_4, d_nda)
#define SYNC_DESC_4_SIZE (sizeof(struct aau_desc_4) - SYNC_DESC_4_OFFSET)
#define SYNC_DESC_4(d) \
cpu_dcache_wbinv_range(((vaddr_t)(d)) + SYNC_DESC_4_OFFSET, \
SYNC_DESC_4_SIZE)
#define SYNC_DESC(d, size) \
cpu_dcache_wbinv_range(((vaddr_t)(d)) + SYNC_DESC_4_OFFSET, (size))
/* Descriptor control */
#define AAU_DC_IE (1U << 0) /* interrupt enable */
@ -97,6 +157,16 @@ struct aau_desc_4 {
#define AAU_DC_CC_FILL 2U /* fill command */
#define AAU_DC_CC_DIRECT_FILL 7U /* direct fill (copy) */
/* Extended descriptor control */
#define AAU_EDC_B1_CC(x) ((x) << 1) /* block command/control */
#define AAU_EDC_B2_CC(x) ((x) << 4) /* block command/control */
#define AAU_EDC_B3_CC(x) ((x) << 7) /* block command/control */
#define AAU_EDC_B4_CC(x) ((x) << 10) /* block command/control */
#define AAU_EDC_B5_CC(x) ((x) << 13) /* block command/control */
#define AAU_EDC_B6_CC(x) ((x) << 16) /* block command/control */
#define AAU_EDC_B7_CC(x) ((x) << 19) /* block command/control */
#define AAU_EDC_B8_CC(x) ((x) << 22) /* block command/control */
/* Hardware registers */
#define AAU_ACR 0x00 /* accelerator control */
#define AAU_ASR 0x04 /* accelerator status */