Change to use pxapcic from sa11xx_pcic.
Support multiple socket. But not tested.
This commit is contained in:
kiyohara
parent
e0c180145d
commit
3af5743d0a
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@ -1,4 +1,4 @@
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# $NetBSD: GUMSTIX,v 1.11 2007/03/14 12:27:21 drochner Exp $
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# $NetBSD: GUMSTIX,v 1.12 2007/04/20 13:00:08 kiyohara Exp $
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#
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# GUMSTIX -- Gumstix, Inc. gumstix platforms kernel
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#
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@ -209,9 +209,11 @@ options GXIO_BLUETOOTH_ON_HWUART # Bluetooth module on HWUART
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sm0 at gxio? addr 0x04000300 gpirq 36 # etherstix, net{MMC,CF,DUO}
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sm1 at gxio? addr 0x08000300 gpirq 27 # netDUO(2nd NIC)
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# PCMCIA/CF card
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gxpcic* at gxio? addr 0x20000000 gpirq 11 # cfstix, netCF
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pcmcia* at gxpcic?
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# integrated PCMCIA/CF controller
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pxapcic0 at pxaip? # cfstix, netCF
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# PCMCIA bus support
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pcmcia* at pxapcic?
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# PCMCIA serial interfaces
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com* at pcmcia? function ? # Modems and serial cards
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@ -1,4 +1,4 @@
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# $NetBSD: files.gumstix,v 1.3 2007/02/20 17:23:09 kiyohara Exp $
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# $NetBSD: files.gumstix,v 1.4 2007/04/20 13:00:08 kiyohara Exp $
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#
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# Genetec corp. G4255EB evaluation board configuration info
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#
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@ -22,7 +22,6 @@ file arch/evbarm/gumstix/gxio.c gxio
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attach sm at gxio with sm_gxio
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file arch/evbarm/gumstix/if_sm_gxio.c sm_gxio
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device gxpcic: pcmciabus
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attach gxpcic at gxio
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file arch/arm/sa11x0/sa11xx_pcic.c gxpcic
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file arch/evbarm/gumstix/gxpcic.c gxpcic
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# PCMCIA/CF socket and GPIO controllers
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attach pxapcic at pxaip with pxapcic_gxpcic
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file arch/evbarm/gumstix/gxpcic.c pxapcic_gxpcic
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@ -1,4 +1,4 @@
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/* $NetBSD: gumstix_machdep.c,v 1.3 2007/01/18 10:06:47 kiyohara Exp $ */
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/* $NetBSD: gumstix_machdep.c,v 1.4 2007/04/20 13:00:08 kiyohara Exp $ */
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/*
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* Copyright (C) 2005, 2006, 2007 WIDE Project and SOUM Corporation.
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* All rights reserved.
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@ -292,6 +292,7 @@ int comcnspeed = CONSPEED;
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int comcnmode = CONMODE;
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extern void gxio_config_pin(void);
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extern void gxio_config_busheader(char *);
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/*
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* void cpu_reboot(int howto, char *bootstr)
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@ -936,7 +937,6 @@ read_system_serial()
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static void
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process_kernel_args(int argc, char *argv[])
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{
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extern char busheader[MAX_BOOT_STRING];
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static const char busheader_name[] = "busheader=";
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int i, j;
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@ -951,8 +951,8 @@ process_kernel_args(int argc, char *argv[])
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for (i = 1, j = 0; i < argc; i++) {
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if (!strncmp(argv[i], busheader_name, strlen(busheader_name))) {
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strncpy(busheader,
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argv[i] + strlen(busheader_name), MAX_BOOT_STRING);
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/* configure for GPIOs of busheader side */
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gxio_config_busheader(argv[i] + strlen(busheader_name));
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continue;
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}
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if (j == MAX_BOOT_STRING) {
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@ -1,4 +1,4 @@
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/* $NetBSD: gxio.c,v 1.3 2007/01/18 10:06:47 kiyohara Exp $ */
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/* $NetBSD: gxio.c,v 1.4 2007/04/20 13:00:08 kiyohara Exp $ */
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/*
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* Copyright (C) 2005, 2006, 2007 WIDE Project and SOUM Corporation.
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* All rights reserved.
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@ -31,7 +31,7 @@
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: gxio.c,v 1.3 2007/01/18 10:06:47 kiyohara Exp $");
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__KERNEL_RCSID(0, "$NetBSD: gxio.c,v 1.4 2007/04/20 13:00:08 kiyohara Exp $");
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#include "opt_gxio.h"
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@ -58,7 +58,7 @@ struct gpioconf {
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};
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struct gxioconf {
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const char *name;
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void (*config)(struct gxio_softc *);
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void (*config)(void);
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};
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static int gxiomatch(struct device *, struct cfdata *, void *);
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@ -67,14 +67,15 @@ static int gxiosearch(struct device *, struct cfdata *, const int *, void *);
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static int gxioprint(void *, const char *);
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void gxio_config_pin(void);
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static void
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gxio_config_gpio(struct gxio_softc *, const struct gxioconf *, char *);
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static void cfstix_config(struct gxio_softc *);
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static void etherstix_config(struct gxio_softc *);
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static void netcf_config(struct gxio_softc *);
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static void netduommc_config(struct gxio_softc *);
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static void netduo_config(struct gxio_softc *);
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static void netmmc_config(struct gxio_softc *);
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void gxio_config_busheader(char *);
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static void gxio_config_gpio(const struct gxioconf *, char *);
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static void cfstix_config(void);
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static void etherstix_config(void);
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static void netcf_config(void);
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static void netduommc_config(void);
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static void netduo_config(void);
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static void netmmc_config(void);
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static void wifistix_cf_config(void);
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CFATTACH_DECL(
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gxio, sizeof(struct gxio_softc), gxiomatch, gxioattach, NULL, NULL);
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@ -137,6 +138,7 @@ static const struct gxioconf busheader_conf[] = {
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{ "netduo-mmc", netduommc_config },
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{ "netduo", netduo_config },
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{ "netmmc", netmmc_config },
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{ "wifistix-cf", wifistix_cf_config },
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{ "wifistix", cfstix_config },
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{ NULL }
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};
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@ -173,11 +175,8 @@ gxioattach(struct device *parent, struct device *self, void *aux)
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PXA2X0_MEMCTL_BASE, PXA2X0_MEMCTL_SIZE, 0, &sc->sc_ioh))
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return;
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/* configuration for GPIOs of busheader side */
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gxio_config_gpio(sc, busheader_conf, busheader);
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/*
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* Attach each gumstix expantion of busheader side devices
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* Attach each gumstix expansion of busheader side devices
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*/
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config_search_ia(gxiosearch, self, "gxio", NULL);
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}
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@ -231,9 +230,15 @@ gxio_config_pin()
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pxa2x0_gpio_set_function(gpioconf[i].pin, gpioconf[i].value);
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}
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void
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gxio_config_busheader(char *expansion)
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{
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gxio_config_gpio(busheader_conf, expansion);
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}
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static void
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gxio_config_gpio(struct gxio_softc *sc,
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const struct gxioconf *gxioconflist, char *expansion)
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gxio_config_gpio(const struct gxioconf *gxioconflist, char *expansion)
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{
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int i, rv;
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@ -243,7 +248,7 @@ gxio_config_gpio(struct gxio_softc *sc,
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rv = strncmp(expansion, gxioconflist[i].name,
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strlen(gxioconflist[i].name) + 1);
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if (rv == 0) {
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gxioconflist[i].config(sc);
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gxioconflist[i].config();
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break;
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}
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}
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@ -251,21 +256,17 @@ gxio_config_gpio(struct gxio_softc *sc,
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static void
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cfstix_config(struct gxio_softc *sc)
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cfstix_config()
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{
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u_int gpio, npoe_fn;
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, MEMCTL_MECR,
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bus_space_read_4(sc->sc_iot, sc->sc_ioh, MEMCTL_MECR) & ~MECR_NOS);
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pxa2x0_gpio_set_function(8, GPIO_OUT | GPIO_SET); /* RESET */
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delay(50);
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pxa2x0_gpio_set_function(8, GPIO_OUT | GPIO_CLR);
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pxa2x0_gpio_set_function(4, GPIO_IN); /* nBVD1/~nSTSCHG */
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pxa2x0_gpio_set_function(27, GPIO_IN); /* ~INPACK */
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pxa2x0_gpio_set_function(11, GPIO_IN); /* nPCD1 */
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pxa2x0_gpio_set_function(26, GPIO_IN); /* PRDY/~IRQ */
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#if 1
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/* this configuration set by pxapcic_attach_common()::pxa2x0_pcic.c */
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#else
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pxa2x0_gpio_set_function(11, GPIO_IN); /* PCD1 */
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pxa2x0_gpio_set_function(26, GPIO_IN); /* PRDY1/~IRQ1 */
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#endif
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pxa2x0_gpio_set_function(4, GPIO_IN); /* BVD1/~STSCHG1 */
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for (gpio = 48, npoe_fn = 0; gpio <= 53 ; gpio++)
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npoe_fn |= pxa2x0_gpio_get_function(gpio);
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@ -276,15 +277,15 @@ cfstix_config(struct gxio_softc *sc)
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pxa2x0_gpio_set_function(50, GPIO_ALT_FN_2_OUT); /* nPIOR */
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pxa2x0_gpio_set_function(51, GPIO_ALT_FN_2_OUT); /* nPIOW */
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pxa2x0_gpio_set_function(52, GPIO_ALT_FN_2_OUT); /* nPCE1 */
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pxa2x0_gpio_set_function(53, GPIO_ALT_FN_2_OUT); /* nPCE2 */
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pxa2x0_gpio_set_function(54, GPIO_ALT_FN_2_OUT); /* pSKTSEL */
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pxa2x0_gpio_set_function(55, GPIO_ALT_FN_2_OUT); /* nPREG */
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pxa2x0_gpio_set_function(56, GPIO_ALT_FN_1_IN); /* nPWAIT */
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pxa2x0_gpio_set_function(57, GPIO_ALT_FN_1_IN); /* nIOIS16 */
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}
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/* ARGSUSED */
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static void
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etherstix_config(struct gxio_softc *sc)
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etherstix_config()
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{
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pxa2x0_gpio_set_function(49, GPIO_ALT_FN_2_OUT); /* nPWE */
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@ -296,27 +297,27 @@ etherstix_config(struct gxio_softc *sc)
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}
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static void
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netcf_config(struct gxio_softc *sc)
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netcf_config()
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{
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etherstix_config(sc);
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cfstix_config(sc);
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etherstix_config();
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cfstix_config();
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}
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static void
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netduommc_config(struct gxio_softc *sc)
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netduommc_config()
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{
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netduo_config(sc);
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netduo_config();
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/* mmc not yet... */
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}
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static void
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netduo_config(struct gxio_softc *sc)
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netduo_config()
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{
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etherstix_config(sc);
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etherstix_config();
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pxa2x0_gpio_set_function(78, GPIO_ALT_FN_2_OUT); /* nCS 2 */
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pxa2x0_gpio_set_function(52, GPIO_OUT | GPIO_SET); /* RESET 2 */
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@ -326,10 +327,25 @@ netduo_config(struct gxio_softc *sc)
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}
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static void
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netmmc_config(struct gxio_softc *sc)
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netmmc_config()
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{
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etherstix_config(sc);
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etherstix_config();
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/* mmc not yet... */
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}
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static void
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wifistix_cf_config()
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{
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#if 1
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/* this configuration set by pxapcic_attach_common()::pxa2x0_pcic.c */
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#else
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pxa2x0_gpio_set_function(36, GPIO_IN); /* PCD2 */
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pxa2x0_gpio_set_function(27, GPIO_IN); /* PRDY2/~IRQ2 */
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#endif
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pxa2x0_gpio_set_function(18, GPIO_IN); /* BVD2/~STSCHG2 */
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cfstix_config();
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: gxpcic.c,v 1.3 2007/01/18 10:02:55 kiyohara Exp $ */
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/* $NetBSD: gxpcic.c,v 1.4 2007/04/20 13:00:08 kiyohara Exp $ */
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/*
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* Copyright (C) 2005, 2006 WIDE Project and SOUM Corporation.
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* All rights reserved.
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@ -80,7 +80,7 @@
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#include <arch/arm/xscale/pxa2x0var.h>
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#include <arch/arm/xscale/pxa2x0reg.h>
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#include <arch/arm/sa11x0/sa11xx_pcicvar.h>
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#include <arch/arm/xscale/pxa2x0_pcic.h>
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#include <arch/evbarm/gumstix/gumstixvar.h>
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@ -92,43 +92,31 @@
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#define HAVE_CARD(r) (!((r) & GPIO_SET))
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#define GXIO_GPIO8_RESET 8
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#define GXIO_GPIRQ11_nCD 11
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#define GXIO_GPIO26_READY 26
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#define GXIO_GPIRQ11_CD1 11
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#define GXIO_GPIRQ26_PRDY1 26
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#define GXIO_GPIRQ27_PRDY2 27
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#define GXIO_GPIRQ36_CD2 36
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struct gxpcic_softc;
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struct gxpcic_socket {
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struct sapcic_socket ss; /* inherit socket for sa11x0 pcic */
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};
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static int gxpcic_match(struct device *, struct cfdata *, void *);
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static void gxpcic_attach(struct device *, struct device *, void *);
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static void gxpcic_pcic_socket_setup(struct pxapcic_socket *);
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struct gxpcic_softc {
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struct sapcic_softc sc_pc; /* inherit SA11xx pcic */
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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int sc_gpirq;
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struct gxpcic_socket sc_socket[2];
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int sc_cards;
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};
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static int gxpcic_match(struct device *, struct cfdata *, void *);
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static void gxpcic_attach(struct device *, struct device *, void *);
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static int gxpcic_card_detect(void *);
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static int gxpcic_read(struct sapcic_socket *, int);
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static void gxpcic_write(struct sapcic_socket *, int, int);
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static void gxpcic_set_power(struct sapcic_socket *, int);
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static void gxpcic_clear_intr(int);
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static void *gxpcic_intr_establish(struct sapcic_socket *, int,
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static u_int gxpcic_read(struct pxapcic_socket *, int);
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static void gxpcic_write(struct pxapcic_socket *, int, u_int);
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static void gxpcic_set_power(struct pxapcic_socket *, int);
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static void gxpcic_clear_intr(struct pxapcic_socket *);
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static void *gxpcic_intr_establish(struct pxapcic_socket *, int,
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int (*)(void *), void *);
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static void gxpcic_intr_disestablish(struct sapcic_socket *, void *);
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static void gxpcic_intr_disestablish(struct pxapcic_socket *, void *);
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__inline void gxpcic_cpld_clk(void);
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__inline u_char gxpcic_cpld_read_bits(int bits);
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static int gxpcic_count_slot(struct pxapcic_softc *);
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CFATTACH_DECL(gxpcic, sizeof(struct gxpcic_softc),
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CFATTACH_DECL(pxapcic_gxpcic, sizeof(struct pxapcic_softc),
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gxpcic_match, gxpcic_attach, NULL, NULL);
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static struct sapcic_tag gxpcic_tag = {
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static struct pxapcic_tag gxpcic_pcic_functions = {
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gxpcic_read,
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gxpcic_write,
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gxpcic_set_power,
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@ -137,6 +125,14 @@ static struct sapcic_tag gxpcic_tag = {
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gxpcic_intr_disestablish,
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};
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static struct {
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int cd;
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int prdy;
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} gxpcic_slot_irqs[] = {
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{ GXIO_GPIRQ11_CD1, GXIO_GPIRQ26_PRDY1 },
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{ GXIO_GPIRQ36_CD2, GXIO_GPIRQ27_PRDY2 }
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};
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static int
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gxpcic_match(struct device *parent, struct cfdata *cf, void *aux)
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@ -144,11 +140,13 @@ gxpcic_match(struct device *parent, struct cfdata *cf, void *aux)
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struct {
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int gpio;
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u_int fn;
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} gpiomodes[] = {
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} pcic_gpiomodes[] = {
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{ 48, GPIO_ALT_FN_2_OUT }, /* nPOE */
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{ 49, GPIO_ALT_FN_2_OUT }, /* nPWE */
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{ 50, GPIO_ALT_FN_2_OUT }, /* nPIOR */
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{ 51, GPIO_ALT_FN_2_OUT }, /* nPIOW */
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{ 52, GPIO_ALT_FN_2_OUT }, /* nPCE1 */
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{ 53, GPIO_ALT_FN_2_OUT }, /* nPCE2 */
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{ 54, GPIO_ALT_FN_2_OUT }, /* pSKTSEL */
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{ 55, GPIO_ALT_FN_2_OUT }, /* nPREG */
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{ 56, GPIO_ALT_FN_1_IN }, /* nPWAIT */
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|
|
@ -158,13 +156,17 @@ gxpcic_match(struct device *parent, struct cfdata *cf, void *aux)
|
|||
u_int reg;
|
||||
int i;
|
||||
|
||||
for (i = 0; gpiomodes[i].gpio != -1; i++) {
|
||||
reg = pxa2x0_gpio_get_function(gpiomodes[i].gpio);
|
||||
if (GPIO_FN(reg) != GPIO_FN(gpiomodes[i].fn) ||
|
||||
GPIO_FN_IS_OUT(reg) != GPIO_FN_IS_OUT(gpiomodes[i].fn))
|
||||
/*
|
||||
* Check GPIO configuration. If you use these, it is sure already
|
||||
* to have been set by gxio.
|
||||
*/
|
||||
for (i = 0; pcic_gpiomodes[i].gpio != -1; i++) {
|
||||
reg = pxa2x0_gpio_get_function(pcic_gpiomodes[i].gpio);
|
||||
if (GPIO_FN(reg) != GPIO_FN(pcic_gpiomodes[i].fn) ||
|
||||
GPIO_FN_IS_OUT(reg) != GPIO_FN_IS_OUT(pcic_gpiomodes[i].fn))
|
||||
break;
|
||||
}
|
||||
if (gpiomodes[i].gpio != -1)
|
||||
if (pcic_gpiomodes[i].gpio != -1)
|
||||
return 0;
|
||||
|
||||
return 1; /* match */
|
||||
|
|
@ -173,166 +175,85 @@ gxpcic_match(struct device *parent, struct cfdata *cf, void *aux)
|
|||
static void
|
||||
gxpcic_attach(struct device *parent, struct device *self, void *aux)
|
||||
{
|
||||
struct gxio_softc *gxsc = device_private(parent);
|
||||
struct gxpcic_softc *sc = device_private(self);
|
||||
struct gxio_attach_args *gxa = aux;
|
||||
struct pcmciabus_attach_args paa;
|
||||
int mecr, val, i, n;
|
||||
struct pxapcic_softc *sc = (struct pxapcic_softc *)self;
|
||||
struct pxaip_attach_args *pxa = (struct pxaip_attach_args *)aux;
|
||||
int nslot, i;
|
||||
|
||||
aprint_normal("\n");
|
||||
aprint_naive("\n");
|
||||
sc->sc_iot = pxa->pxa_iot;
|
||||
|
||||
sc->sc_iot = sc->sc_pc.sc_iot = gxa->gxa_iot;
|
||||
sc->sc_ioh = gxsc->sc_ioh;
|
||||
sc->sc_gpirq = gxa->gxa_gpirq;
|
||||
sc->sc_cards = 0;
|
||||
nslot = gxpcic_count_slot(sc);
|
||||
|
||||
n = bus_space_read_4(sc->sc_iot, sc->sc_ioh, MEMCTL_MECR) & MECR_NOS ?
|
||||
2 : 1;
|
||||
for (i = 0; i < n; i++) {
|
||||
sc->sc_socket[i].ss.sc = &sc->sc_pc;
|
||||
sc->sc_socket[i].ss.socket = 0;
|
||||
sc->sc_socket[i].ss.pcictag_cookie = NULL;
|
||||
sc->sc_socket[i].ss.pcictag = &gxpcic_tag;
|
||||
sc->sc_socket[i].ss.event_thread = NULL;
|
||||
sc->sc_socket[i].ss.event = 0;
|
||||
sc->sc_socket[i].ss.laststatus = SAPCIC_CARD_INVALID;
|
||||
sc->sc_socket[i].ss.shutdown = 0;
|
||||
|
||||
/* 3.3V only? */
|
||||
sc->sc_socket[i].ss.power_capability = SAPCIC_POWER_3V;
|
||||
|
||||
bus_space_write_4(sc->sc_iot, sc->sc_ioh, MEMCTL_MCMEM(i),
|
||||
MC_TIMING_VAL(10,10,30));
|
||||
bus_space_write_4(sc->sc_iot, sc->sc_ioh, MEMCTL_MCATT(i),
|
||||
MC_TIMING_VAL(10,10,30));
|
||||
bus_space_write_4(sc->sc_iot, sc->sc_ioh, MEMCTL_MCIO(i),
|
||||
MC_TIMING_VAL(6,6,17));
|
||||
|
||||
paa.paa_busname = "pcmcia";
|
||||
paa.pct = (pcmcia_chipset_tag_t)&sa11x0_pcmcia_functions;
|
||||
paa.pch = (pcmcia_chipset_handle_t)&sc->sc_socket[i].ss;
|
||||
paa.iobase = 0;
|
||||
paa.iosize = 0x4000000;
|
||||
|
||||
sc->sc_socket[i].ss.pcmcia =
|
||||
(struct device *)config_found_ia(&sc->sc_pc.sc_dev,
|
||||
"pcmciabus", &paa, NULL);
|
||||
|
||||
/* interrupt for card insertion/removal */
|
||||
gxio_intr_establish(sc, GXIO_GPIRQ11_nCD, IST_EDGE_BOTH,
|
||||
IPL_BIO, gxpcic_card_detect, &sc->sc_socket[i]);
|
||||
|
||||
/* if card was insert then set CIT */
|
||||
val = pxa2x0_gpio_get_function(GXIO_GPIRQ11_nCD);
|
||||
if (HAVE_CARD(val)) {
|
||||
mecr = bus_space_read_4(
|
||||
sc->sc_iot, sc->sc_ioh, MEMCTL_MECR);
|
||||
bus_space_write_4(sc->sc_iot,
|
||||
sc->sc_ioh, MEMCTL_MECR, mecr | MECR_CIT);
|
||||
}
|
||||
|
||||
/* schedule kthread creation */
|
||||
kthread_create(sapcic_kthread_create, &sc->sc_socket[i].ss);
|
||||
for (i = 0; i < nslot; i++) {
|
||||
sc->sc_irqpin[i] = gxpcic_slot_irqs[i].prdy;
|
||||
sc->sc_irqcfpin[i] = gxpcic_slot_irqs[i].cd;
|
||||
}
|
||||
sc->sc_nslots = nslot;
|
||||
|
||||
pxapcic_attach_common(sc, &gxpcic_pcic_socket_setup);
|
||||
}
|
||||
|
||||
static int
|
||||
gxpcic_card_detect(void *arg)
|
||||
static void
|
||||
gxpcic_pcic_socket_setup(struct pxapcic_socket *so)
|
||||
{
|
||||
struct gxpcic_socket *socket = arg;
|
||||
struct gxpcic_softc *sc = (struct gxpcic_softc *)socket->ss.sc;
|
||||
int sock_no = socket->ss.socket;
|
||||
int mecr, last, val, s;
|
||||
struct pxapcic_softc *sc = so->sc;
|
||||
|
||||
s = splbio();
|
||||
last = sc->sc_cards;
|
||||
val = pxa2x0_gpio_get_function(GXIO_GPIRQ11_nCD);
|
||||
if (HAVE_CARD(val)) {
|
||||
sc->sc_cards |= 1<<sock_no;
|
||||
/* if it is the first card, turn on expansion memory control. */
|
||||
if (last == 0) {
|
||||
mecr = bus_space_read_4(
|
||||
sc->sc_iot, sc->sc_ioh, MEMCTL_MECR);
|
||||
bus_space_write_4(sc->sc_iot,
|
||||
sc->sc_ioh, MEMCTL_MECR, mecr | MECR_CIT);
|
||||
}
|
||||
} else {
|
||||
sc->sc_cards &= ~(1<<sock_no);
|
||||
/* if we loast all cards, turn off expansion memory control. */
|
||||
if (sc->sc_cards == 0) {
|
||||
mecr = bus_space_read_4(
|
||||
sc->sc_iot, sc->sc_ioh, MEMCTL_MECR);
|
||||
bus_space_write_4(sc->sc_iot,
|
||||
sc->sc_ioh, MEMCTL_MECR, mecr & ~MECR_CIT);
|
||||
}
|
||||
}
|
||||
splx(s);
|
||||
/* 3.3V only? */
|
||||
so->power_capability = PXAPCIC_POWER_3V;
|
||||
so->pcictag_cookie = NULL;
|
||||
so->pcictag = &gxpcic_pcic_functions;
|
||||
|
||||
DPRINTF(("%s: card %d %s\n", sc->sc_pc.sc_dev.dv_xname, sock_no,
|
||||
HAVE_CARD(val) ? "inserted" : "removed"));
|
||||
|
||||
sapcic_intr(arg);
|
||||
|
||||
return 1;
|
||||
bus_space_write_4(sc->sc_iot, sc->sc_memctl_ioh,
|
||||
MEMCTL_MCMEM(so->socket), MC_TIMING_VAL(9 ,9, 29));
|
||||
bus_space_write_4(sc->sc_iot, sc->sc_memctl_ioh,
|
||||
MEMCTL_MCATT(so->socket), MC_TIMING_VAL(9 ,9, 29));
|
||||
bus_space_write_4(sc->sc_iot, sc->sc_memctl_ioh,
|
||||
MEMCTL_MCIO(so->socket), MC_TIMING_VAL(5 ,5, 16));
|
||||
}
|
||||
|
||||
/* ARGSUSED */
|
||||
static int
|
||||
gxpcic_read(struct sapcic_socket *so, int which)
|
||||
static u_int
|
||||
gxpcic_read(struct pxapcic_socket *so, int which)
|
||||
{
|
||||
int reg;
|
||||
|
||||
switch (which) {
|
||||
case SAPCIC_STATUS_CARD:
|
||||
reg = pxa2x0_gpio_get_function(GXIO_GPIRQ11_nCD);
|
||||
case PXAPCIC_CARD_STATUS:
|
||||
reg = pxa2x0_gpio_get_function(gxpcic_slot_irqs[so->socket].cd);
|
||||
return (HAVE_CARD(reg) ?
|
||||
SAPCIC_CARD_VALID : SAPCIC_CARD_INVALID);
|
||||
PXAPCIC_CARD_VALID : PXAPCIC_CARD_INVALID);
|
||||
|
||||
case SAPCIC_STATUS_READY:
|
||||
reg = pxa2x0_gpio_get_function(GXIO_GPIO26_READY);
|
||||
case PXAPCIC_CARD_READY:
|
||||
reg = pxa2x0_gpio_get_function(
|
||||
gxpcic_slot_irqs[so->socket].prdy);
|
||||
return (reg & GPIO_SET ? 1 : 0);
|
||||
|
||||
default:
|
||||
panic("%s: bogus register", __FUNCTION__);
|
||||
}
|
||||
/* NOTREACHED */
|
||||
}
|
||||
|
||||
/* ARGSUSED */
|
||||
static void
|
||||
gxpcic_write(struct sapcic_socket *so, int which, int arg)
|
||||
gxpcic_write(struct pxapcic_socket *so, int which, u_int arg)
|
||||
{
|
||||
|
||||
switch (which) {
|
||||
case SAPCIC_CONTROL_RESET:
|
||||
#if 0 /* XXXX: Our PXA2x0 no necessary ??? */
|
||||
if (arg)
|
||||
pxa2x0_gpio_set_function(GXIO_GPIO8_RESET, GPIO_SET);
|
||||
else
|
||||
pxa2x0_gpio_set_function(GXIO_GPIO8_RESET, GPIO_CLR);
|
||||
#endif
|
||||
break;
|
||||
|
||||
case SAPCIC_CONTROL_LINEENABLE:
|
||||
break;
|
||||
|
||||
case SAPCIC_CONTROL_WAITENABLE:
|
||||
break;
|
||||
|
||||
case SAPCIC_CONTROL_POWERSELECT:
|
||||
case PXAPCIC_CARD_POWER:
|
||||
case PXAPCIC_CARD_RESET:
|
||||
/* We can't */
|
||||
break;
|
||||
|
||||
default:
|
||||
panic("%s: bogus register", __FUNCTION__);
|
||||
}
|
||||
/* NOTREACHED */
|
||||
}
|
||||
|
||||
static void
|
||||
gxpcic_set_power(struct sapcic_socket *__so, int arg)
|
||||
gxpcic_set_power(struct pxapcic_socket *__so, int arg)
|
||||
{
|
||||
|
||||
if(arg != SAPCIC_POWER_OFF && arg != SAPCIC_POWER_3V)
|
||||
if(arg != PXAPCIC_POWER_OFF && arg != PXAPCIC_POWER_3V)
|
||||
panic("%s: bogus arg\n", __FUNCTION__);
|
||||
|
||||
/* 3.3V only? */
|
||||
|
|
@ -340,34 +261,102 @@ gxpcic_set_power(struct sapcic_socket *__so, int arg)
|
|||
|
||||
/* ARGSUSED */
|
||||
static void
|
||||
gxpcic_clear_intr(int arg)
|
||||
gxpcic_clear_intr(struct pxapcic_socket *so)
|
||||
{
|
||||
|
||||
/* nothing to do */
|
||||
}
|
||||
|
||||
static void *
|
||||
gxpcic_intr_establish(struct sapcic_socket *so, int level,
|
||||
gxpcic_intr_establish(struct pxapcic_socket *so, int level,
|
||||
int (* ih_fun)(void *), void *ih_arg)
|
||||
{
|
||||
__attribute__((unused))struct gxpcic_softc *sc =
|
||||
(struct gxpcic_softc *)so->sc;
|
||||
int gpirq;
|
||||
|
||||
gpirq = GXIO_GPIO26_READY;
|
||||
|
||||
DPRINTF(("%s: card %d gpio %d\n",
|
||||
sc->sc_pc.sc_dev.dv_xname, so->socket, gpirq));
|
||||
|
||||
return gxio_intr_establish(sc, gpirq, IST_EDGE_FALLING, level,
|
||||
ih_fun, ih_arg);
|
||||
return pxa2x0_gpio_intr_establish(so->irqpin, IST_EDGE_FALLING,
|
||||
level, ih_fun, ih_arg);
|
||||
}
|
||||
|
||||
/* ARGSUSED */
|
||||
static void
|
||||
gxpcic_intr_disestablish(struct sapcic_socket *so, void *ih)
|
||||
gxpcic_intr_disestablish(struct pxapcic_socket *so, void *ih)
|
||||
{
|
||||
__attribute__((unused))struct gxpcic_softc *sc =
|
||||
(struct gxpcic_softc *)so->sc;
|
||||
|
||||
gxio_intr_disestablish(sc, ih);
|
||||
pxa2x0_gpio_intr_disestablish(ih);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* XXXXX: slot count functions from Linux
|
||||
*/
|
||||
__inline void
|
||||
gxpcic_cpld_clk()
|
||||
{
|
||||
|
||||
pxa2x0_gpio_set_function(48, GPIO_OUT | GPIO_CLR);
|
||||
pxa2x0_gpio_set_function(48, GPIO_OUT | GPIO_SET);
|
||||
}
|
||||
|
||||
__inline u_char
|
||||
gxpcic_cpld_read_bits(int bits)
|
||||
{
|
||||
u_int shift = 0, gpio;
|
||||
u_char result = 0;
|
||||
|
||||
while (bits--) {
|
||||
gpio = pxa2x0_gpio_get_function(11);
|
||||
result |= ((gpio & GPIO_SET) == GPIO_SET) << shift;
|
||||
shift++;
|
||||
gxpcic_cpld_clk();
|
||||
}
|
||||
return result;
|
||||
}
|
||||
|
||||
/*
|
||||
* We use the CPLD on the CF-CF card to read a value from a shift register.
|
||||
* If we can read that magic sequence, then we have 2 CF cards; otherwise
|
||||
* we assume just one. The CPLD will send the value of the shift register
|
||||
* on GPIO11 (the CD line for slot 0) when RESET is held in reset. We use
|
||||
* GPIO48 (nPWE) as a clock signal, GPIO52/53 (card enable for both cards)
|
||||
* to control read/write to the shift register.
|
||||
*/
|
||||
static int
|
||||
gxpcic_count_slot(struct pxapcic_softc *sc)
|
||||
{
|
||||
u_int poe, pce1, pce2;
|
||||
int nslot;
|
||||
|
||||
poe = pxa2x0_gpio_get_function(48);
|
||||
pce1 = pxa2x0_gpio_get_function(52);
|
||||
pce2 = pxa2x0_gpio_get_function(53);
|
||||
|
||||
/* Reset */
|
||||
pxa2x0_gpio_set_function(8, GPIO_OUT | GPIO_SET);
|
||||
|
||||
/* Setup the shift register */
|
||||
pxa2x0_gpio_set_function(52, GPIO_OUT | GPIO_SET);
|
||||
pxa2x0_gpio_set_function(53, GPIO_OUT | GPIO_CLR);
|
||||
|
||||
/* Tick the clock to program the shift register */
|
||||
gxpcic_cpld_clk();
|
||||
|
||||
/* Now set shift register into read mode */
|
||||
pxa2x0_gpio_set_function(52, GPIO_OUT | GPIO_CLR);
|
||||
pxa2x0_gpio_set_function(53, GPIO_OUT | GPIO_SET);
|
||||
|
||||
/* We can read the bits now -- 0xc2 means "Dual compact flash" */
|
||||
if (gxpcic_cpld_read_bits(8) != 0xc2)
|
||||
/* We do not have 2 CF slots */
|
||||
nslot = 1;
|
||||
else
|
||||
/* We have 2 CF slots */
|
||||
nslot = 2;
|
||||
|
||||
delay(50);
|
||||
pxa2x0_gpio_set_function(8, GPIO_OUT | GPIO_CLR); /* clr RESET */
|
||||
|
||||
pxa2x0_gpio_set_function(48, poe);
|
||||
pxa2x0_gpio_set_function(52, pce1);
|
||||
pxa2x0_gpio_set_function(53, pce2);
|
||||
|
||||
return nslot;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue