Support for the RL02 disk at the PDP11 frontend console added.

This commit is contained in:
ragge 1996-03-08 12:32:47 +00:00
parent 2732f4510b
commit 3ac9ff6af4
4 changed files with 333 additions and 3 deletions

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@ -1,4 +1,4 @@
/* $NetBSD: conf.c,v 1.17 1996/03/07 23:22:38 ragge Exp $ */
/* $NetBSD: conf.c,v 1.18 1996/03/08 12:32:47 ragge Exp $ */
/*-
* Copyright (c) 1982, 1986 The Regents of the University of California.
@ -239,7 +239,7 @@ cdev_decl(dmf);
#include "np.h"
cdev_decl(np);
#if VAX8600 && 0
#if VAX8600
#define NCRL 1
#else
#define NCRL 0

251
sys/arch/vax/vax/crl.c Normal file
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@ -0,0 +1,251 @@
/* $NetBSD: crl.c,v 1.1 1996/03/08 12:32:50 ragge Exp $ */
/*-
* Copyright (c) 1982, 1986 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)crl.c 7.5 (Berkeley) 5/9/91
*/
/*
* TO DO (tef 7/18/85):
* 1) change printf's to log() instead???
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/conf.h>
#include <sys/proc.h>
#include <sys/user.h>
#include <sys/buf.h>
#include <machine/cpu.h>
#include <machine/mtpr.h>
#include <machine/sid.h>
#include <machine/scb.h>
#include <vax/vax/crl.h>
struct {
short crl_state; /* open and busy flags */
short crl_active; /* driver state flag */
struct buf *crl_buf; /* buffer we're using */
ushort *crl_xaddr; /* transfer address */
short crl_errcnt;
} crltab;
struct {
int crl_cs; /* saved controller status */
int crl_ds; /* saved drive status */
} crlstat;
void crlintr();
struct ivec_dsp crl_intr;
void
crlattach()
{
extern struct ivec_dsp idsptch;
bcopy(&idsptch, &crl_intr, sizeof(struct ivec_dsp));
scb->scb_csrint = &crl_intr;
crl_intr.hoppaddr = crlintr;
}
/*ARGSUSED*/
crlopen(dev, flag)
dev_t dev;
int flag;
{
struct buf *geteblk();
if (cpunumber != VAX_8600)
return (ENXIO);
if (crltab.crl_state != CRL_IDLE)
return (EALREADY);
crltab.crl_state = CRL_OPEN;
crltab.crl_buf = geteblk(512);
return (0);
}
/*ARGSUSED*/
crlclose(dev, flag)
dev_t dev;
int flag;
{
brelse(crltab.crl_buf);
crltab.crl_state = CRL_IDLE;
}
/*ARGSUSED*/
crlrw(dev, uio, flag)
dev_t dev;
struct uio *uio;
int flag;
{
register struct buf *bp;
register int i;
register int s;
int error;
if (uio->uio_resid == 0)
return (0);
s = spl4();
while (crltab.crl_state & CRL_BUSY)
sleep((caddr_t)&crltab, PRIBIO);
crltab.crl_state |= CRL_BUSY;
splx(s);
bp = crltab.crl_buf;
error = 0;
while ((i = imin(CRLBYSEC, uio->uio_resid)) > 0) {
bp->b_blkno = uio->uio_offset>>9;
if (bp->b_blkno >= MAXSEC || (uio->uio_offset & 0x1FF) != 0) {
error = EIO;
break;
}
if (uio->uio_rw == UIO_WRITE) {
error = uiomove(bp->b_un.b_addr, i, uio);
if (error)
break;
}
bp->b_flags = uio->uio_rw == UIO_WRITE ? B_WRITE : B_READ;
s = spl4();
crlstart();
while ((bp->b_flags & B_DONE) == 0)
sleep((caddr_t)bp, PRIBIO);
splx(s);
if (bp->b_flags & B_ERROR) {
error = EIO;
break;
}
if (uio->uio_rw == UIO_READ) {
error = uiomove(bp->b_un.b_addr, i, uio);
if (error)
break;
}
}
crltab.crl_state &= ~CRL_BUSY;
wakeup((caddr_t)&crltab);
return (error);
}
crlstart()
{
register struct buf *bp;
bp = crltab.crl_buf;
crltab.crl_errcnt = 0;
crltab.crl_xaddr = (ushort *) bp->b_un.b_addr;
bp->b_resid = 0;
if ((mfpr(PR_STXCS) & STXCS_RDY) == 0)
/* not ready to receive order */
return;
if ((bp->b_flags&(B_READ|B_WRITE)) == B_READ) {
crltab.crl_active = CRL_F_READ;
mtpr(bp->b_blkno<<8 | STXCS_IE | CRL_F_READ, PR_STXCS);
} else {
crltab.crl_active = CRL_F_WRITE;
mtpr(bp->b_blkno<<8 | STXCS_IE | CRL_F_WRITE, PR_STXCS);
}
#ifdef lint
crlintr();
#endif
}
void
crlintr()
{
register struct buf *bp;
int i;
bp = crltab.crl_buf;
i = mfpr(PR_STXCS);
switch ((i>>24) & 0xFF) {
case CRL_S_XCMPLT:
switch (crltab.crl_active) {
case CRL_F_RETSTS:
crlstat.crl_ds = mfpr(PR_STXDB);
printf("crlcs=0x%b, crlds=0x%b\n", crlstat.crl_cs,
CRLCS_BITS, crlstat.crl_ds, CRLDS_BITS);
break;
case CRL_F_READ:
case CRL_F_WRITE:
bp->b_flags |= B_DONE;
}
crltab.crl_active = 0;
wakeup((caddr_t)bp);
break;
case CRL_S_XCONT:
switch (crltab.crl_active) {
case CRL_F_WRITE:
mtpr(*crltab.crl_xaddr++, PR_STXDB);
mtpr(bp->b_blkno<<8 | STXCS_IE | CRL_F_WRITE, PR_STXCS);
break;
case CRL_F_READ:
*crltab.crl_xaddr++ = mfpr(PR_STXDB);
mtpr(bp->b_blkno<<8 | STXCS_IE | CRL_F_READ, PR_STXCS);
}
break;
case CRL_S_ABORT:
crltab.crl_active = CRL_F_RETSTS;
mtpr(STXCS_IE | CRL_F_RETSTS, PR_STXCS);
bp->b_flags |= B_DONE|B_ERROR;
break;
case CRL_S_RETSTS:
crlstat.crl_cs = mfpr(PR_STXDB);
mtpr(STXCS_IE | CRL_S_RETSTS, PR_STXCS);
break;
case CRL_S_HNDSHK:
printf("crl: hndshk error\n"); /* dump out some status too? */
crltab.crl_active = 0;
bp->b_flags |= B_DONE|B_ERROR;
wakeup((caddr_t)bp);
break;
case CRL_S_HWERR:
printf("crl: hard error sn%d\n", bp->b_blkno);
crltab.crl_active = CRL_F_ABORT;
mtpr(STXCS_IE | CRL_F_ABORT, PR_STXCS);
break;
}
}

78
sys/arch/vax/vax/crl.h Normal file
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@ -0,0 +1,78 @@
/* $NetBSD: crl.h,v 1.1 1996/03/08 12:32:53 ragge Exp $ */
/*
* @(#)crl.h 7.1 (Berkeley) 6/5/86
*/
/****************************************************************
* *
* Licensed from Digital Equipment Corporation *
* Copyright (c) *
* Digital Equipment Corporation *
* Maynard, Massachusetts *
* 1985, 1986 *
* All rights reserved. *
* *
* The Information in this software is subject to change *
* without notice and should not be construed as a commitment *
* by Digital Equipment Corporation. Digital makes no *
* representations about the suitability of this software for *
* any purpose. It is supplied "As Is" without expressed or *
* implied warranty. *
* *
* If the Regents of the University of California or its *
* licensees modify the software in a manner creating *
* diriviative copyright rights, appropriate copyright *
* legends may be placed on the drivative work in addition *
* to that set forth above. *
****************************************************************/
/*
* Console RL02 status of current transfer (read only)
*/
#define CRL_S_XCMPLT 1 /* transaction complete */
#define CRL_S_XCONT 2 /* continue transaction */
#define CRL_S_ABORT 3 /* transation abort */
#define CRL_S_RETSTS 4 /* return device status */
#define CRL_S_HNDSHK 0x80 /* handshake err during transaction */
#define CRL_S_HWERR 0x81 /* hardware err during transaction */
/*
* Console RL02 function codes
*/
#define CRL_F_NOOP 0 /* No operation */
#define CRL_F_RSTSTS 2 /* reset and return device status */
#define CRL_F_ABORT 3 /* abort transfer */
#define CRL_F_RETSTS 4 /* read device status */
#define CRL_F_WRITE 5 /* write block data */
#define CRL_F_READ 6 /* read block data */
/*
* Console sectoring information.
* The console understands the rl02 as having 512 byte sectors.
*/
#define CRLBYSEC 512 /* bytes/sector */
#define MAXSEC 20480 /* sectors/rl02 */
/*
* STXCS bit definitions
*/
#define STXCS_RDY 0x00000080 /* ready bit */
#define STXCS_IE 0x00000040 /* interrupt enable */
#define CRLERRS 5 /* number of retries before quitting */
/*
* The state byte is used to retain exclusivity,
* and contains the busy flag.
*/
#define CRL_IDLE 0
#define CRL_OPEN 1
#define CRL_BUSY 2
#define CRLDS_BITS \
"\20\20WDE\17CHE\16WL\15SKTO\14SPE\13WGE\12VC\11DSE\
\10DT\7HS\6CO\5HO\4BH\3STC\2STB\1STA"
#define CRLCS_BITS \
"\20\20CE\17DE\16NXM\15DLT\14DCRC\13OPI\1DRDY"

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@ -1,4 +1,4 @@
/* $NetBSD: ka860.c,v 1.1 1996/03/07 23:22:48 ragge Exp $ */
/* $NetBSD: ka860.c,v 1.2 1996/03/08 12:32:54 ragge Exp $ */
/*
* Copyright (c) 1986, 1988 Regents of the University of California.
* All rights reserved.
@ -300,6 +300,7 @@ ka86_conf(parent, self, aux)
mtpr(0x8000, PR_ACCS);
} else
printf("no FPA\n");
crlattach();
}
int