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Don't enable I/O or memory access here! These bits in the PCI CSR are

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set up by the firmware, and indicate which mapping types the system
supports.
This commit is contained in:
thorpej 1999-03-24 01:07:59 +00:00
parent ac0f626cca
commit 3993ee01e4
1 changed files with 6 additions and 10 deletions
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16
sys/dev/pci/if_vr.c
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@ -1,4 +1,4 @@
/* $NetBSD: if_vr.c,v 1.18 1999/02/12 00:36:48 thorpej Exp $ */
/* $NetBSD: if_vr.c,v 1.19 1999/03/24 01:07:59 thorpej Exp $ */
/*-
* Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
@ -146,8 +146,6 @@
#define VR_USEIOSPACE
#define ETHER_CRC_LEN 4 /* XXX Should be in a common header. */
/*
* Various supported device vendors/types and their names.
*/
@ -1573,16 +1571,14 @@ vr_attach(parent, self, aux)
}
}
/* Make sure bus mastering is enabled. */
command = PCI_CONF_READ(PCI_COMMAND_STATUS_REG);
command |= PCI_COMMAND_MASTER_ENABLE;
PCI_CONF_WRITE(PCI_COMMAND_STATUS_REG, command);
/*
* Map control/status registers.
*/
command = PCI_CONF_READ(PCI_COMMAND_STATUS_REG);
command |= (PCI_COMMAND_IO_ENABLE |
PCI_COMMAND_MEM_ENABLE |
PCI_COMMAND_MASTER_ENABLE);
PCI_CONF_WRITE(PCI_COMMAND_STATUS_REG, command);
command = PCI_CONF_READ(PCI_COMMAND_STATUS_REG);
{
bus_space_tag_t iot, memt;
bus_space_handle_t ioh, memh;