cast to appropriate types.
This commit is contained in:
parent
59f433dfc5
commit
39052f3b3d
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@ -1,4 +1,4 @@
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/* $NetBSD: softfloat-macros,v 1.2 2009/02/16 10:23:35 tron Exp $ */
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/* $NetBSD: softfloat-macros,v 1.3 2012/03/21 02:32:26 christos Exp $ */
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/*
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===============================================================================
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@ -464,10 +464,10 @@ INLINE void mul64To128( bits64 a, bits64 b, bits64 *z0Ptr, bits64 *z1Ptr )
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bits32 aHigh, aLow, bHigh, bLow;
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bits64 z0, zMiddleA, zMiddleB, z1;
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aLow = a;
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aHigh = a>>32;
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bLow = b;
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bHigh = b>>32;
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aLow = (bits32)a;
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aHigh = (bits32)(a>>32);
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bLow = (bits32)b;
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bHigh = (bits32)(b>>32);
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z1 = ( (bits64) aLow ) * bLow;
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zMiddleA = ( (bits64) aLow ) * bHigh;
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zMiddleB = ( (bits64) aHigh ) * bLow;
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@ -616,7 +616,7 @@ static bits32 estimateSqrt32( int16 aExp, bits32 a )
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z = 0x8000 + ( a>>17 ) - sqrtEvenAdjustments[ idx ];
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z = a / z + z;
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z = ( 0x20000 <= z ) ? 0xFFFF8000 : ( z<<15 );
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if ( z <= a ) return (bits32) ( ( (sbits32) a )>>1 );
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if ( z <= a ) return (bits32) ( ( (bits32) a )>>1 );
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}
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return ( (bits32) ( ( ( (bits64) a )<<31 ) / z ) ) + ( z>>1 );
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@ -682,7 +682,7 @@ static int8 countLeadingZeros64( bits64 a )
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else {
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a >>= 32;
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}
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shiftCount += countLeadingZeros32( a );
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shiftCount += (int8)countLeadingZeros32( (bits32)a );
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return shiftCount;
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: softfloat.c,v 1.9 2012/03/20 21:34:51 martin Exp $ */
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/* $NetBSD: softfloat.c,v 1.10 2012/03/21 02:32:26 christos Exp $ */
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/*
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* This version hacked for use with gcc -msoft-float by bjh21.
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@ -46,7 +46,7 @@ this code that are retained.
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#include <sys/cdefs.h>
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#if defined(LIBC_SCCS) && !defined(lint)
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__RCSID("$NetBSD: softfloat.c,v 1.9 2012/03/20 21:34:51 martin Exp $");
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__RCSID("$NetBSD: softfloat.c,v 1.10 2012/03/21 02:32:26 christos Exp $");
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#endif /* LIBC_SCCS and not lint */
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#ifdef SOFTFLOAT_FOR_GCC
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@ -137,10 +137,10 @@ static int32 roundAndPackInt32( flag zSign, bits64 absZ )
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}
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}
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}
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roundBits = absZ & 0x7F;
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roundBits = (int8)(absZ & 0x7F);
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absZ = ( absZ + roundIncrement )>>7;
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absZ &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );
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z = absZ;
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z = (int32)absZ;
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if ( zSign ) z = - z;
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if ( ( absZ>>32 ) || ( z && ( ( z < 0 ) ^ zSign ) ) ) {
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float_raise( float_flag_invalid );
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@ -340,7 +340,7 @@ static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig )
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isTiny =
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( float_detect_tininess == float_tininess_before_rounding )
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|| ( zExp < -1 )
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|| ( zSig + roundIncrement < 0x80000000 );
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|| ( zSig + roundIncrement < 0x80000000U );
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shift32RightJamming( zSig, - zExp, &zSig );
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zExp = 0;
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roundBits = zSig & 0x7F;
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@ -395,7 +395,7 @@ Returns the exponent bits of the double-precision floating-point value `a'.
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INLINE int16 extractFloat64Exp( float64 a )
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{
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return ( FLOAT64_DEMANGLE(a)>>52 ) & 0x7FF;
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return (int16)((FLOAT64_DEMANGLE(a) >> 52) & 0x7FF);
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}
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@ -407,7 +407,7 @@ Returns the sign bit of the double-precision floating-point value `a'.
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INLINE flag extractFloat64Sign( float64 a )
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{
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return FLOAT64_DEMANGLE(a)>>63;
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return (flag)(FLOAT64_DEMANGLE(a) >> 63);
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}
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@ -497,7 +497,7 @@ static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig )
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}
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}
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}
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roundBits = zSig & 0x3FF;
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roundBits = (int16)(zSig & 0x3FF);
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if ( 0x7FD <= (bits16) zExp ) {
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if ( ( 0x7FD < zExp )
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|| ( ( zExp == 0x7FD )
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isTiny =
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( float_detect_tininess == float_tininess_before_rounding )
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|| ( zExp < -1 )
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|| ( zSig + roundIncrement < LIT64( 0x8000000000000000 ) );
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|| ( zSig + roundIncrement < (bits64)LIT64( 0x8000000000000000 ) );
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shift64RightJamming( zSig, - zExp, &zSig );
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zExp = 0;
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roundBits = zSig & 0x3FF;
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roundBits = (int16)(zSig & 0x3FF);
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if ( isTiny && roundBits ) float_raise( float_flag_underflow );
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}
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}
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@ -876,7 +876,7 @@ Returns the exponent bits of the quadruple-precision floating-point value
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INLINE int32 extractFloat128Exp( float128 a )
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{
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return ( a.high>>48 ) & 0x7FFF;
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return (int32)((a.high >> 48) & 0x7FFF);
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}
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@ -888,7 +888,7 @@ Returns the sign bit of the quadruple-precision floating-point value `a'.
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INLINE flag extractFloat128Sign( float128 a )
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{
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return a.high>>63;
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return (flag)(a.high >> 63);
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}
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@ -1124,7 +1124,7 @@ float32 int32_to_float32( int32 a )
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if ( a == 0 ) return 0;
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if ( a == (sbits32) 0x80000000 ) return packFloat32( 1, 0x9E, 0 );
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zSign = ( a < 0 );
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return normalizeRoundAndPackFloat32( zSign, 0x9C, zSign ? - a : a );
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return normalizeRoundAndPackFloat32(zSign, 0x9C, (uint32)(zSign ? - a : a));
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}
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@ -1936,7 +1936,7 @@ float32 float32_mul( float32 a, float32 b )
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aSig = ( aSig | 0x00800000 )<<7;
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bSig = ( bSig | 0x00800000 )<<8;
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shift64RightJamming( ( (bits64) aSig ) * bSig, 32, &zSig64 );
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zSig = zSig64;
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zSig = (bits32)zSig64;
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if ( 0 <= (sbits32) ( zSig<<1 ) ) {
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zSig <<= 1;
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--zExp;
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aSig >>= 1;
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++zExp;
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}
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zSig = ( ( (bits64) aSig )<<32 ) / bSig;
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zSig = (bits32)(((bits64) aSig) << 32) / bSig;
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if ( ( zSig & 0x3F ) == 0 ) {
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zSig |= ( (bits64) bSig * zSig != ( (bits64) aSig )<<32 );
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}
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@ -2379,7 +2379,7 @@ int32 float64_to_int32_round_to_zero( float64 a )
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shiftCount = 0x433 - aExp;
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savedASig = aSig;
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aSig >>= shiftCount;
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z = aSig;
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z = (int32)aSig;
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if ( aSign ) z = - z;
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if ( ( z < 0 ) ^ aSign ) {
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invalid:
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@ -2514,7 +2514,7 @@ float32 float64_to_float32( float64 a )
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return packFloat32( aSign, 0xFF, 0 );
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}
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shift64RightJamming( aSig, 22, &aSig );
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zSig = aSig;
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zSig = (bits32)aSig;
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if ( aExp || zSig ) {
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zSig |= 0x40000000;
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aExp -= 0x381;
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shiftCount = 0x402F - aExp;
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savedASig = aSig0;
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aSig0 >>= shiftCount;
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z = aSig0;
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z = (int32)aSig0;
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if ( aSign ) z = - z;
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if ( ( z < 0 ) ^ aSign ) {
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invalid:
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}
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aSig0 |= ( aSig1 != 0 );
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shift64RightJamming( aSig0, 18, &aSig0 );
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zSig = aSig0;
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zSig = (bits32)aSig0;
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if ( aExp || zSig ) {
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zSig |= 0x40000000;
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aExp -= 0x3F81;
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if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( 0, 0, 0, 0 );
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normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
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}
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zExp = ( ( aExp - 0x3FFF )>>1 ) + 0x3FFE;
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zExp = ( (unsigned int)(aExp - 0x3FFF) >> 1) + 0x3FFE;
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aSig0 |= LIT64( 0x0001000000000000 );
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zSig0 = estimateSqrt32( aExp, aSig0>>17 );
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zSig0 = estimateSqrt32((int16)aExp, (bits32)(aSig0>>17));
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shortShift128Left( aSig0, aSig1, 13 - ( aExp & 1 ), &aSig0, &aSig1 );
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zSig0 = estimateDiv128To64( aSig0, aSig1, zSig0<<32 ) + ( zSig0<<30 );
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doubleZSig0 = zSig0<<1;
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shiftCount = 0x433 - aExp;
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savedASig = aSig;
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aSig >>= shiftCount;
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z = aSig;
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z = (uint32)aSig;
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if ( ( aSig<<shiftCount ) != savedASig ) {
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float_exception_flags |= float_flag_inexact;
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: softfloat-specialize,v 1.6 2011/03/06 10:27:37 martin Exp $ */
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/* $NetBSD: softfloat-specialize,v 1.7 2012/03/21 02:32:26 christos Exp $ */
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/* This is a derivative work. */
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flag float32_is_nan( float32 a )
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{
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return ( 0xFF000000 < (bits32) ( a<<1 ) );
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return ( (bits32)0xFF000000 < (bits32) ( a<<1 ) );
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}
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static float32 commonNaNToFloat32( commonNaNT a )
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{
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return ( ( (bits32) a.sign )<<31 ) | 0x7FC00000 | ( a.high>>41 );
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return ( ( (bits32) a.sign )<<31 ) | 0x7FC00000 | (bits32)( a.high>>41 );
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}
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flag float64_is_nan( float64 a )
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{
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return ( LIT64( 0xFFE0000000000000 ) <
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return ( (bits64)LIT64( 0xFFE0000000000000 ) <
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(bits64) ( FLOAT64_DEMANGLE(a)<<1 ) );
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}
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commonNaNT z;
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if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
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z.sign = FLOAT64_DEMANGLE(a)>>63;
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z.sign = (flag)(FLOAT64_DEMANGLE(a)>>63);
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z.low = 0;
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z.high = FLOAT64_DEMANGLE(a)<<12;
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return z;
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{
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return
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( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) )
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( (bits64)LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) )
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&& ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
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}
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commonNaNT z;
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if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
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z.sign = a.high>>63;
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z.sign = (flag)(a.high>>63);
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shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
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return z;
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