Forgot to commit the register definition for PIIX_UDMATIM.
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/* $NetBSD: pciide_piix_reg.h,v 1.10 2005/12/11 12:22:50 christos Exp $ */
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/* $NetBSD: pciide_piix_reg.h,v 1.11 2006/06/17 17:45:52 jmcneill Exp $ */
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/*
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* Copyright (c) 1998 Manuel Bouyer.
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/* Control register */
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#define PIIX_UDMACTL_DRV_EN(channel, drive) (0x01 << ((channel) * 2 + (drive)))
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/* Ultra DMA/33 timing register (PIIX4 only) */
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#define PIIX_UDMATIM 0x4a
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#define PIIX_UDMATIM_SHIFT 16
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#define PIIX_UDMATIM_SET(x, channel, drive) \
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(((x) << ((channel * 8) + (drive * 4))) << PIIX_UDMATIM_SHIFT)
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