Don't mess with Cyrix configuration bits that are hardware-specific. Move
all of the cache-enabling junk into an #ifdef. Print a warning even if the cache is enabled.
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@ -37,7 +37,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)locore.s 7.3 (Berkeley) 5/13/91
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* $Id: locore.s,v 1.78 1994/08/03 06:22:26 mycroft Exp $
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* $Id: locore.s,v 1.79 1994/08/03 22:11:53 mycroft Exp $
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*/
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/*
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@ -245,44 +245,44 @@ is486: movl $CPU_486,_cpu-KERNBASE
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/* Set cache parameters */
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invd # Start with guaranteed clean cache
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movb $0xc0,%al # Configuration Register index (CCR0)
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#ifdef CYRIX_CACHE_WORKS
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movb $CCR0,%al # Configuration Register index (CCR0)
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outb %al,$0x22
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# movb $0x22,%al # Configuration Register CCR0 data
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movb $0x02,%al # Configuration Register CCR0 data
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outb %al,$0x23
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movb $0xc1,%al # CCR1
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outb %al,$0x22
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xorb %al,%al
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inb $0x23,%al
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andb $~CCR0_NC0,%al
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orb $CCR0_NC1,%al
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outb %al,$0x23
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/* clear non-cacheable region 1 */
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movb $0xc6,%al
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movb $(NCR1+2),%al
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outb %al,$0x22
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xorb %al,%al
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movb $NCR_SIZE_0K,%al
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outb %al,$0x23
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/* clear non-cacheable region 2 */
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movb $0xc9,%al
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movb $(NCR2+2),%al
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outb %al,$0x22
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xorb %al,%al
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movb $NCR_SIZE_0K,%al
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outb %al,$0x23
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/* clear non-cacheable region 3 */
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movb $0xcc,%al
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movb $(NCR3+2),%al
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outb %al,$0x22
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xorb %al,%al
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movb $NCR_SIZE_0K,%al
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outb %al,$0x23
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/* clear non-cacheable region 4 */
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movb $0xcf,%al
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movb $(NCR4+2),%al
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outb %al,$0x22
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xorb %al,%al
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movb $NCR_SIZE_0K,%al
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outb %al,$0x23
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/* enable caching in CR0 */
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movl %cr0,%eax
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#ifdef notyet_cyrix
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andl $~(CR0_CD|CR0_NW),%eax
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#else
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orl $CR0_CD,%eax
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invd
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#endif
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movl %eax,%cr0
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#else
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/* disable caching in CR0 */
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movl %cr0,%eax
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orl $CR0_CD,%eax
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movl %eax,%cr0
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#endif
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invd
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jmp 2f
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@ -559,16 +559,18 @@ reloc_gdt:
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1:
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#endif
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#ifndef notyet_cyrix
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cmp $CPU_486DLC,_cpu
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jne 1f
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pushl $2f
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call _printf
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addl $4,%esp
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jmp 1f
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2: .asciz "WARNING: CYRIX 486DLC DETECTED; CACHE DISABLED.\n"
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1:
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#ifdef CYRIX_CACHE_WORKS
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2: .asciz "WARNING: CYRIX 486DLC CACHE ENABLED.\n"
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#else
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2: .asciz "WARNING: CYRIX 486DLC CACHE DISABLED BY DEFAULT.\n"
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#endif
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1:
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INTRFASTEXIT
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/* NOTREACHED */
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