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Split the two kernels to include only support for the device it describes

This commit is contained in:
reinoud 2014-09-26 16:30:32 +00:00
parent a1379155fa
commit 3868855777
2 changed files with 20 additions and 43 deletions
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13
sys/arch/evbarm/conf/ODROID-U
View File

@ -1,7 +1,7 @@
#
# $NetBSD: ODROID-U,v 1.15 2014/09/26 15:33:33 reinoud Exp $
# $NetBSD: ODROID-U,v 1.16 2014/09/26 16:30:32 reinoud Exp $
#
# ODROID-U -- ODROID-U series Exynos Kernel
# ODROID-U -- ODROID-U{2,3} series Exynos4x12(P) based kernel
#
include "arch/evbarm/conf/std.odroid"
@ -18,11 +18,11 @@ options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT
# CPU options
options CPU_CORTEX
options CPU_CORTEXA9
options EXYNOS4120
options EXYNOS4212
options EXYNOS4412
options EXYNOS4412P
#options MULTIPROCESSOR
options PMAPCOUNTERS
options BUSDMA_COUNTERS
options EXYNOS_CONSOLE_EARLY
@ -161,6 +161,7 @@ options OHCI_DEBUG
options UHUB_DEBUG
options USBVERBOSE
# Valid options for BOOT_ARGS:
# single Boot to single user only
# kdb Give control to kernel debugger
@ -181,8 +182,8 @@ cpu0 at mainbus?
# A9 core devices
armperiph0 at mainbus?
arml2cc0 at armperiph? # L2 Cache Controller
armgic0 at armperiph? # Interrupt Controller
arml2cc0 at armperiph? # L2 Cache Controller
# Exynos SoC
exyo0 at mainbus?
@ -215,11 +216,7 @@ ukphy* at mii? phy ? # generic unknown PHYs
exyoiic0 at exyo0
iic* at exyoiic?
# serial console connectivity
# UARTS
# sscom0 attached to expansion port
# sscom1 is default serial UART console, enable for low-level console:
options SSCOM1CONSOLE, CONSPEED=115200
# include all USB devices

36
sys/arch/evbarm/conf/ODROID-XU
View File

@ -1,7 +1,7 @@
#
# $NetBSD: ODROID-XU,v 1.1 2014/09/26 15:33:58 reinoud Exp $
# $NetBSD: ODROID-XU,v 1.2 2014/09/26 16:30:32 reinoud Exp $
#
# ODROID -- ODROID series Exynos Kernel
# ODROID-XU -- ODROID-XU Exynos5410 based kernel
#
include "arch/evbarm/conf/std.odroid"
@ -16,25 +16,18 @@ options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT
#options NTP # NTP phase/frequency locked loop
# CPU options
#options CPU_CORTEX
#options CPU_CORTEXA9
#options CPU_CORTEXA7
#options CPU_CORTEXA15
#options EXYNOS4120
#options EXYNOS4212
#options EXYNOS4412
#options EXYNOS4412P
options EXYNOS5260
options CPU_CORTEX
options CPU_CORTEXA7
options CPU_CORTEXA15
options EXYNOS5410
options EXYNOS5420
options EXYNOS5440
options EXYNOS5422
#options MULTIPROCESSOR
options PMAPCOUNTERS
options BUSDMA_COUNTERS
options EXYNOS_CONSOLE_EARLY
#options UVMHIST
options USBHIST
options USBHIST_SIZE=100000
#options UVMHIST_PRINT,KERNHIST_DELAY=0
options __HAVE_MM_MD_DIRECT_MAPPED_PHYS
options PMAP_NEED_ALLOC_POOLPAGE
@ -148,7 +141,7 @@ options KTRACE # system call tracing, a la ktrace(1)
#options PERFCTRS # performance counters
options DIAGNOSTIC # internal consistency checks
options DEBUG
#options LOCKDEBUG
options LOCKDEBUG
#options PMAP_DEBUG # Enable pmap_debug_level code
#options IPKDB # remote kernel debugging
options VERBOSE_INIT_ARM # verbose bootstraping messages
@ -188,22 +181,12 @@ cpu0 at mainbus?
# A9 core devices
armperiph0 at mainbus?
ifdef EXYNOS4
arml2cc0 at armperiph? # L2 Cache Controller
endif
armgic0 at armperiph? # Interrupt Controller
#ifdef EXYNOS5
armgtmr0 at armperiph? # Generic Timer
#endif
# Exynos SoC
exyo0 at mainbus?
# Integrated Samsung devices
ifdef EXYNOS4
mct0 at exyo0
endif
# Integrated Samsung UARTs
#sscom* at exyo0 port ? # UART ?
sscom2 at exyo0 port 2 # UART2
@ -236,9 +219,6 @@ iic* at exyoiic?
# serial console connectivity
# UARTS
# sscom0 is default serial UART console, enable for low-level console:
# sscomX attached to expansion port
options SSCOM0CONSOLE, CONSPEED=115200
# include all USB devices