Split the two kernels to include only support for the device it describes
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reinoud
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a1379155fa
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3868855777
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@ -1,7 +1,7 @@
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#
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# $NetBSD: ODROID-U,v 1.15 2014/09/26 15:33:33 reinoud Exp $
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# $NetBSD: ODROID-U,v 1.16 2014/09/26 16:30:32 reinoud Exp $
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#
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# ODROID-U -- ODROID-U series Exynos Kernel
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# ODROID-U -- ODROID-U{2,3} series Exynos4x12(P) based kernel
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#
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include "arch/evbarm/conf/std.odroid"
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@ -18,19 +18,19 @@ options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT
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# CPU options
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options CPU_CORTEX
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options CPU_CORTEXA9
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options EXYNOS4120
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options EXYNOS4212
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options EXYNOS4412
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options EXYNOS4412P
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#options MULTIPROCESSOR
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options PMAPCOUNTERS
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options BUSDMA_COUNTERS
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options EXYNOS_CONSOLE_EARLY
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#options UVMHIST
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#options UVMHIST_PRINT,KERNHIST_DELAY=0
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#options KERNHIST
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#options USBHIST
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#options USBHIST_SIZE=100000
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#options UVMHIST
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#options UVMHIST_PRINT,KERNHIST_DELAY=0
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#options KERNHIST
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#options USBHIST
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#options USBHIST_SIZE=100000
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options __HAVE_MM_MD_DIRECT_MAPPED_PHYS
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options PMAP_NEED_ALLOC_POOLPAGE
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@ -161,6 +161,7 @@ options OHCI_DEBUG
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options UHUB_DEBUG
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options USBVERBOSE
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# Valid options for BOOT_ARGS:
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# single Boot to single user only
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# kdb Give control to kernel debugger
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@ -181,8 +182,8 @@ cpu0 at mainbus?
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# A9 core devices
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armperiph0 at mainbus?
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arml2cc0 at armperiph? # L2 Cache Controller
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armgic0 at armperiph? # Interrupt Controller
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arml2cc0 at armperiph? # L2 Cache Controller
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# Exynos SoC
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exyo0 at mainbus?
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@ -215,11 +216,7 @@ ukphy* at mii? phy ? # generic unknown PHYs
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exyoiic0 at exyo0
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iic* at exyoiic?
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# serial console connectivity
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# UARTS
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# sscom0 attached to expansion port
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# sscom1 is default serial UART console, enable for low-level console:
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options SSCOM1CONSOLE, CONSPEED=115200
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# include all USB devices
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@ -1,7 +1,7 @@
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#
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# $NetBSD: ODROID-XU,v 1.1 2014/09/26 15:33:58 reinoud Exp $
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# $NetBSD: ODROID-XU,v 1.2 2014/09/26 16:30:32 reinoud Exp $
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#
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# ODROID -- ODROID series Exynos Kernel
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# ODROID-XU -- ODROID-XU Exynos5410 based kernel
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#
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include "arch/evbarm/conf/std.odroid"
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@ -16,25 +16,18 @@ options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT
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#options NTP # NTP phase/frequency locked loop
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# CPU options
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#options CPU_CORTEX
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#options CPU_CORTEXA9
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#options CPU_CORTEXA7
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#options CPU_CORTEXA15
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#options EXYNOS4120
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#options EXYNOS4212
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#options EXYNOS4412
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#options EXYNOS4412P
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options EXYNOS5260
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options CPU_CORTEX
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options CPU_CORTEXA7
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options CPU_CORTEXA15
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options EXYNOS5410
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options EXYNOS5420
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options EXYNOS5440
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options EXYNOS5422
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#options MULTIPROCESSOR
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options PMAPCOUNTERS
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options BUSDMA_COUNTERS
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options EXYNOS_CONSOLE_EARLY
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#options UVMHIST
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options USBHIST
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options USBHIST
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options USBHIST_SIZE=100000
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#options UVMHIST_PRINT,KERNHIST_DELAY=0
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options __HAVE_MM_MD_DIRECT_MAPPED_PHYS
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options PMAP_NEED_ALLOC_POOLPAGE
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@ -148,7 +141,7 @@ options KTRACE # system call tracing, a la ktrace(1)
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#options PERFCTRS # performance counters
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options DIAGNOSTIC # internal consistency checks
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options DEBUG
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#options LOCKDEBUG
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options LOCKDEBUG
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#options PMAP_DEBUG # Enable pmap_debug_level code
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#options IPKDB # remote kernel debugging
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options VERBOSE_INIT_ARM # verbose bootstraping messages
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@ -188,22 +181,12 @@ cpu0 at mainbus?
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# A9 core devices
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armperiph0 at mainbus?
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ifdef EXYNOS4
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arml2cc0 at armperiph? # L2 Cache Controller
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endif
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armgic0 at armperiph? # Interrupt Controller
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#ifdef EXYNOS5
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armgtmr0 at armperiph? # Generic Timer
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#endif
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# Exynos SoC
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exyo0 at mainbus?
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# Integrated Samsung devices
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ifdef EXYNOS4
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mct0 at exyo0
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endif
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# Integrated Samsung UARTs
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#sscom* at exyo0 port ? # UART ?
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sscom2 at exyo0 port 2 # UART2
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@ -231,14 +214,11 @@ iic* at exyoiic?
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# SATA
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#ahcisata* at exyno0
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#atabus* at ata?
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#atabus* at ata?
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#wd* at atabus? drive ?
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# serial console connectivity
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# UARTS
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# sscom0 is default serial UART console, enable for low-level console:
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# sscomX attached to expansion port
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options SSCOM0CONSOLE, CONSPEED=115200
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# include all USB devices
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