No functional change intended:
- Use "do {} while (/*CONSTCOND*/false)" for null DPRINTF().
- Reduce indent level of wm_linkintr_gmii().
This commit is contained in:
msaitoh
parent
8b9c2e1032
commit
383c964987
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@ -1,4 +1,4 @@
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/* $NetBSD: if_wm.c,v 1.617 2019/01/22 03:42:27 msaitoh Exp $ */
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/* $NetBSD: if_wm.c,v 1.618 2019/01/24 04:50:04 msaitoh Exp $ */
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/*
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* Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
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@ -83,7 +83,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.617 2019/01/22 03:42:27 msaitoh Exp $");
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__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.618 2019/01/24 04:50:04 msaitoh Exp $");
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#ifdef _KERNEL_OPT
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#include "opt_net_mpsafe.h"
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@ -160,7 +160,7 @@ int wm_debug = WM_DEBUG_TX | WM_DEBUG_RX | WM_DEBUG_LINK | WM_DEBUG_GMII
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#define DPRINTF(x, y) if (wm_debug & (x)) printf y
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#else
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#define DPRINTF(x, y) /* nothing */
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#define DPRINTF(x, y) do { } while (/*CONSTCOND*/false)
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#endif /* WM_DEBUG */
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#ifdef NET_MPSAFE
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@ -3975,10 +3975,9 @@ wm_get_cfg_done(struct wm_softc *sc)
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break;
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delay(1000);
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}
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if (i >= WM_PHY_CFG_TIMEOUT) {
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if (i >= WM_PHY_CFG_TIMEOUT)
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DPRINTF(WM_DEBUG_GMII, ("%s: %s failed\n",
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device_xname(sc->sc_dev), __func__));
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}
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break;
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case WM_T_ICH8:
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case WM_T_ICH9:
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@ -4091,11 +4090,10 @@ wm_write_smbus_addr(struct wm_softc *sc)
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HV_SMB_ADDR_FREQ_LOW);
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phy_data |= __SHIFTIN((freq & 0x02) != 0,
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HV_SMB_ADDR_FREQ_HIGH);
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} else {
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} else
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DPRINTF(WM_DEBUG_INIT,
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("%s: %s Unsupported SMB frequency in PHY\n",
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device_xname(sc->sc_dev), __func__));
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}
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}
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return wm_gmii_hv_writereg_locked(sc->sc_dev, 2, HV_SMB_ADDR,
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@ -8955,142 +8953,142 @@ wm_rxeof(struct wm_rxqueue *rxq, u_int limit)
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static void
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wm_linkintr_gmii(struct wm_softc *sc, uint32_t icr)
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{
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uint32_t status, reg;
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bool link;
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KASSERT(WM_CORE_LOCKED(sc));
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DPRINTF(WM_DEBUG_LINK, ("%s: %s:\n", device_xname(sc->sc_dev),
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__func__));
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if (icr & ICR_LSC) {
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uint32_t status = CSR_READ(sc, WMREG_STATUS);
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uint32_t reg;
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bool link;
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link = status & STATUS_LU;
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if (link) {
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DPRINTF(WM_DEBUG_LINK, ("%s: LINK: LSC -> up %s\n",
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device_xname(sc->sc_dev),
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(status & STATUS_FD) ? "FDX" : "HDX"));
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} else {
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DPRINTF(WM_DEBUG_LINK, ("%s: LINK: LSC -> down\n",
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if ((icr & ICR_LSC) == 0) {
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if (icr & ICR_RXSEQ)
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DPRINTF(WM_DEBUG_LINK,
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("%s: LINK Receive sequence error\n",
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device_xname(sc->sc_dev)));
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}
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if ((sc->sc_type == WM_T_ICH8) && (link == false))
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wm_gig_downshift_workaround_ich8lan(sc);
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return;
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}
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if ((sc->sc_type == WM_T_ICH8)
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&& (sc->sc_phytype == WMPHY_IGP_3)) {
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wm_kmrn_lock_loss_workaround_ich8lan(sc);
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}
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DPRINTF(WM_DEBUG_LINK, ("%s: LINK: LSC -> mii_pollstat\n",
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/* Link status changed */
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status = CSR_READ(sc, WMREG_STATUS);
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link = status & STATUS_LU;
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if (link)
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DPRINTF(WM_DEBUG_LINK, ("%s: LINK: LSC -> up %s\n",
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device_xname(sc->sc_dev),
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(status & STATUS_FD) ? "FDX" : "HDX"));
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else
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DPRINTF(WM_DEBUG_LINK, ("%s: LINK: LSC -> down\n",
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device_xname(sc->sc_dev)));
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mii_pollstat(&sc->sc_mii);
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if (sc->sc_type == WM_T_82543) {
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int miistatus, active;
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if ((sc->sc_type == WM_T_ICH8) && (link == false))
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wm_gig_downshift_workaround_ich8lan(sc);
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/*
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* With 82543, we need to force speed and
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* duplex on the MAC equal to what the PHY
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* speed and duplex configuration is.
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*/
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miistatus = sc->sc_mii.mii_media_status;
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if (miistatus & IFM_ACTIVE) {
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active = sc->sc_mii.mii_media_active;
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sc->sc_ctrl &= ~(CTRL_SPEED_MASK | CTRL_FD);
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switch (IFM_SUBTYPE(active)) {
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case IFM_10_T:
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sc->sc_ctrl |= CTRL_SPEED_10;
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break;
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case IFM_100_TX:
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sc->sc_ctrl |= CTRL_SPEED_100;
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break;
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case IFM_1000_T:
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sc->sc_ctrl |= CTRL_SPEED_1000;
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break;
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default:
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/*
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* fiber?
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* Shoud not enter here.
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*/
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printf("unknown media (%x)\n", active);
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break;
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}
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if (active & IFM_FDX)
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sc->sc_ctrl |= CTRL_FD;
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CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
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}
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} else if (sc->sc_type == WM_T_PCH) {
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wm_k1_gig_workaround_hv(sc,
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((sc->sc_mii.mii_media_status & IFM_ACTIVE) != 0));
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}
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if ((sc->sc_type == WM_T_ICH8)
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&& (sc->sc_phytype == WMPHY_IGP_3)) {
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wm_kmrn_lock_loss_workaround_ich8lan(sc);
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}
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DPRINTF(WM_DEBUG_LINK, ("%s: LINK: LSC -> mii_pollstat\n",
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device_xname(sc->sc_dev)));
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mii_pollstat(&sc->sc_mii);
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if (sc->sc_type == WM_T_82543) {
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int miistatus, active;
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/*
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* I217 Packet Loss issue:
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* ensure that FEXTNVM4 Beacon Duration is set correctly
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* on power up.
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* Set the Beacon Duration for I217 to 8 usec
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* With 82543, we need to force speed and
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* duplex on the MAC equal to what the PHY
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* speed and duplex configuration is.
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*/
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if (sc->sc_type >= WM_T_PCH_LPT) {
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reg = CSR_READ(sc, WMREG_FEXTNVM4);
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reg &= ~FEXTNVM4_BEACON_DURATION;
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reg |= FEXTNVM4_BEACON_DURATION_8US;
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CSR_WRITE(sc, WMREG_FEXTNVM4, reg);
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miistatus = sc->sc_mii.mii_media_status;
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if (miistatus & IFM_ACTIVE) {
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active = sc->sc_mii.mii_media_active;
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sc->sc_ctrl &= ~(CTRL_SPEED_MASK | CTRL_FD);
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switch (IFM_SUBTYPE(active)) {
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case IFM_10_T:
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sc->sc_ctrl |= CTRL_SPEED_10;
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break;
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case IFM_100_TX:
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sc->sc_ctrl |= CTRL_SPEED_100;
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break;
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case IFM_1000_T:
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sc->sc_ctrl |= CTRL_SPEED_1000;
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break;
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default:
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/*
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* fiber?
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* Shoud not enter here.
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*/
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printf("unknown media (%x)\n", active);
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break;
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}
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if (active & IFM_FDX)
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sc->sc_ctrl |= CTRL_FD;
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CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
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}
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/* Work-around I218 hang issue */
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if ((sc->sc_pcidevid == PCI_PRODUCT_INTEL_I218_LM) ||
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(sc->sc_pcidevid == PCI_PRODUCT_INTEL_I218_V) ||
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(sc->sc_pcidevid == PCI_PRODUCT_INTEL_I218_LM3) ||
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(sc->sc_pcidevid == PCI_PRODUCT_INTEL_I218_V3))
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wm_k1_workaround_lpt_lp(sc, link);
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if (sc->sc_type >= WM_T_PCH_LPT) {
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/*
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* Set platform power management values for Latency
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* Tolerance Reporting (LTR)
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*/
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wm_platform_pm_pch_lpt(sc,
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((sc->sc_mii.mii_media_status & IFM_ACTIVE) != 0));
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}
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/* Clear link partner's EEE ability */
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sc->eee_lp_ability = 0;
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/* FEXTNVM6 K1-off workaround */
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if (sc->sc_type == WM_T_PCH_SPT) {
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reg = CSR_READ(sc, WMREG_FEXTNVM6);
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if (CSR_READ(sc, WMREG_PCIEANACFG)
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& FEXTNVM6_K1_OFF_ENABLE)
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reg |= FEXTNVM6_K1_OFF_ENABLE;
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else
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reg &= ~FEXTNVM6_K1_OFF_ENABLE;
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CSR_WRITE(sc, WMREG_FEXTNVM6, reg);
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}
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if (!link)
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return;
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switch (sc->sc_type) {
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case WM_T_PCH2:
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wm_k1_workaround_lv(sc);
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/* FALLTHROUGH */
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case WM_T_PCH:
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if (sc->sc_phytype == WMPHY_82578)
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wm_link_stall_workaround_hv(sc);
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break;
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default:
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break;
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}
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/* Enable/Disable EEE after link up */
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if (sc->sc_phytype > WMPHY_82579)
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wm_set_eee_pchlan(sc);
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} else if (icr & ICR_RXSEQ) {
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DPRINTF(WM_DEBUG_LINK, ("%s: LINK Receive sequence error\n",
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device_xname(sc->sc_dev)));
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} else if (sc->sc_type == WM_T_PCH) {
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wm_k1_gig_workaround_hv(sc,
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((sc->sc_mii.mii_media_status & IFM_ACTIVE) != 0));
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}
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/*
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* I217 Packet Loss issue:
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* ensure that FEXTNVM4 Beacon Duration is set correctly
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* on power up.
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* Set the Beacon Duration for I217 to 8 usec
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*/
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if (sc->sc_type >= WM_T_PCH_LPT) {
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reg = CSR_READ(sc, WMREG_FEXTNVM4);
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reg &= ~FEXTNVM4_BEACON_DURATION;
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reg |= FEXTNVM4_BEACON_DURATION_8US;
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CSR_WRITE(sc, WMREG_FEXTNVM4, reg);
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}
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/* Work-around I218 hang issue */
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if ((sc->sc_pcidevid == PCI_PRODUCT_INTEL_I218_LM) ||
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(sc->sc_pcidevid == PCI_PRODUCT_INTEL_I218_V) ||
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(sc->sc_pcidevid == PCI_PRODUCT_INTEL_I218_LM3) ||
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(sc->sc_pcidevid == PCI_PRODUCT_INTEL_I218_V3))
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wm_k1_workaround_lpt_lp(sc, link);
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if (sc->sc_type >= WM_T_PCH_LPT) {
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/*
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* Set platform power management values for Latency
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* Tolerance Reporting (LTR)
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*/
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wm_platform_pm_pch_lpt(sc,
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((sc->sc_mii.mii_media_status & IFM_ACTIVE) != 0));
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}
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/* Clear link partner's EEE ability */
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sc->eee_lp_ability = 0;
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/* FEXTNVM6 K1-off workaround */
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if (sc->sc_type == WM_T_PCH_SPT) {
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reg = CSR_READ(sc, WMREG_FEXTNVM6);
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if (CSR_READ(sc, WMREG_PCIEANACFG) & FEXTNVM6_K1_OFF_ENABLE)
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reg |= FEXTNVM6_K1_OFF_ENABLE;
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else
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reg &= ~FEXTNVM6_K1_OFF_ENABLE;
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CSR_WRITE(sc, WMREG_FEXTNVM6, reg);
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}
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if (!link)
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return;
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switch (sc->sc_type) {
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case WM_T_PCH2:
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wm_k1_workaround_lv(sc);
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/* FALLTHROUGH */
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case WM_T_PCH:
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if (sc->sc_phytype == WMPHY_82578)
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wm_link_stall_workaround_hv(sc);
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break;
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default:
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break;
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}
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/* Enable/Disable EEE after link up */
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if (sc->sc_phytype > WMPHY_82579)
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wm_set_eee_pchlan(sc);
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}
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/*
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@ -9143,10 +9141,9 @@ wm_linkintr_tbi(struct wm_softc *sc, uint32_t icr)
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}
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/* Update LED */
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wm_tbi_serdes_set_linkled(sc);
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} else if (icr & ICR_RXSEQ) {
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} else if (icr & ICR_RXSEQ)
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DPRINTF(WM_DEBUG_LINK, ("%s: LINK: Receive sequence error\n",
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device_xname(sc->sc_dev)));
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}
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}
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/*
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@ -9219,10 +9216,9 @@ wm_linkintr_serdes(struct wm_softc *sc, uint32_t icr)
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}
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/* Update LED */
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wm_tbi_serdes_set_linkled(sc);
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} else {
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} else
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DPRINTF(WM_DEBUG_LINK, ("%s: LINK: Receive sequence error\n",
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device_xname(sc->sc_dev)));
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}
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}
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/*
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@ -9264,10 +9260,9 @@ wm_intr_legacy(void *arg)
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icr = CSR_READ(sc, WMREG_ICR);
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if ((icr & sc->sc_icr) == 0)
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break;
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if (handled == 0) {
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if (handled == 0)
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DPRINTF(WM_DEBUG_TX,
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("%s: INTx: got intr\n",device_xname(sc->sc_dev)));
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}
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if (rndval == 0)
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rndval = icr;
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@ -11888,14 +11883,13 @@ wm_check_for_link(struct wm_softc *sc)
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__func__));
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CSR_WRITE(sc, WMREG_TXCW, sc->sc_txcw);
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CSR_WRITE(sc, WMREG_CTRL, (ctrl & ~CTRL_SLU));
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} else if (signal && ((rxcw & RXCW_C) != 0)) {
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} else if (signal && ((rxcw & RXCW_C) != 0))
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DPRINTF(WM_DEBUG_LINK, ("%s: %s: /C/",
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device_xname(sc->sc_dev), __func__));
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} else {
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else
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DPRINTF(WM_DEBUG_LINK, ("%s: %s: linkup %08x,%08x,%08x\n",
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device_xname(sc->sc_dev), __func__, rxcw, ctrl,
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status));
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}
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return 0;
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}
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@ -13275,12 +13269,11 @@ wm_nvm_validate_checksum(struct wm_softc *sc)
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|| (sc->sc_type == WM_T_PCH2) || (sc->sc_type == WM_T_PCH_LPT)) {
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/* XXX PCH_SPT? */
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wm_nvm_read(sc, csum_wordaddr, 1, &eeprom_data);
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if ((eeprom_data & valid_checksum) == 0) {
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if ((eeprom_data & valid_checksum) == 0)
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DPRINTF(WM_DEBUG_NVM,
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("%s: NVM need to be updated (%04x != %04x)\n",
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device_xname(sc->sc_dev), eeprom_data,
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valid_checksum));
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}
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}
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if ((wm_debug & WM_DEBUG_NVM) != 0) {
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