diff --git a/sys/arch/arm/altera/cycv_platform.c b/sys/arch/arm/altera/cycv_platform.c
index 84f06efc08c6..a7fce62abfd6 100644
--- a/sys/arch/arm/altera/cycv_platform.c
+++ b/sys/arch/arm/altera/cycv_platform.c
@@ -1,4 +1,4 @@
-/* $NetBSD: cycv_platform.c,v 1.4 2018/10/20 06:35:34 skrll Exp $ */
+/* $NetBSD: cycv_platform.c,v 1.5 2018/10/28 14:58:20 aymeric Exp $ */
 
 /* This file is in the public domain. */
 
@@ -6,7 +6,7 @@
 #include "opt_multiprocessor.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cycv_platform.c,v 1.4 2018/10/20 06:35:34 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cycv_platform.c,v 1.5 2018/10/28 14:58:20 aymeric Exp $");
 
 #define	_ARM32_BUS_DMA_PRIVATE
 #include <sys/param.h>
@@ -79,11 +79,11 @@ cycv_mpstart(void)
 	 * it was unmapped by u-boot in favor of the SDRAM. Plus the dtb is
 	 * stored very low in RAM so we can't re-map the Boot ROM easily.
 	 */
-	pmap_map_chunk(cpu_ttb, CYCV_SDRAM_VBASE, CYCV_SDRAM_BASE, L1_S_SIZE,
-	    VM_PROT_READ|VM_PROT_WRITE, PMAP_NOCACHE);
+	pmap_map_chunk(kernel_l1pt.pv_va, CYCV_SDRAM_VBASE, CYCV_SDRAM_BASE,
+		L1_S_SIZE, VM_PROT_READ|VM_PROT_WRITE, PMAP_NOCACHE);
 	*(volatile uint32_t *) CYCV_SDRAM_VBASE =
 	    htole32(0xea000000 | ((startfunc - 8 - 0x0) >> 2));
-	pmap_unmap_chunk(cpu_ttb, CYCV_SDRAM_BASE, L1_S_SIZE);
+	pmap_unmap_chunk(kernel_l1pt.pv_va, CYCV_SDRAM_VBASE, L1_S_SIZE);
 
 	arm_cpu_max = 2;