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Put page mapping code into a C module.

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Remove old 040 version of page mapping--new way handles 040, too.
Derived from hp300 pmap_boostrap.c.
This commit is contained in:
briggs 1995-06-21 03:19:35 +00:00
parent 4a9e8ef39f
commit 37b6dc390f
2 changed files with 570 additions and 420 deletions
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420
sys/arch/mac68k/mac68k/mac68k_init.c
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/* $NetBSD: mac68k_init.c,v 1.6 1994/10/26 08:47:07 cgd Exp $ */
/*
* Copyright (C) 1994 Allen K. Briggs
* All rights reserved.
*
* Large parts of this file are copied from the amiga_init.c file from
* the NetBSD/Amiga port as of the summer of 1994. The following fine
* authors are credited in that file:
* Markus Wild, Bryan Ford, Niklas Hallqvist, and Michael L. Hitch
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/types.h>
#include <sys/malloc.h>
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/errno.h>
#include <sys/proc.h>
#include <sys/user.h>
#include <sys/buf.h>
#include <vm/vm.h>
#include <vm/pmap.h>
#include <machine/vmparam.h>
#include <machine/pte.h>
#include <machine/cpu.h>
/* Let us map a 68040 system at (close to) boot time. */
extern u_int Sysptmap, Sysptsize, Sysseg, Umap, proc0paddr;
extern u_int Sysseg1;
extern u_long esym; /* Set in machdep.c:getenvvars() */
static u_int Sysseg1_pa;
extern volatile unsigned char *sccA;
extern volatile unsigned char *Via1Base;
extern unsigned char *ASCBase;
extern unsigned long videoaddr;
static void
debug_translate(u_int val)
{
u_int *p, f;
strprintf("translate", val);
p = (u_int *) Sysseg1_pa;
/* Get root index */
f = (val&SG_IMASK1) >> SG_ISHIFT1;
strprintf(" root index", f);
p = (u_int *) (p[f] & ~0xf);
/* Get segment index */
f = (val&SG_IMASK2) >> SG_040ISHIFT;
strprintf(" segment index", f);
if (p[f]) {
p = (u_int *) (p[f] & ~0xf);
/* Get page index */
f = (val & SG_040PMASK) >> SG_PSHIFT;
strprintf(" page index", f);
if (p[f]) {
f = p[f] & ~0xf;
strprintf(" into", f + (val & 0xfff));
return;
}
}
strprintf(" into nothing", 0);
}
/*
* We only have a minimal stack when this is called. Assuming that
* we're dealing with what I will call a Quadra 700-class machine,
* the main memory is currently mapped pretty close to logical==physical,
* the MMU is enabled, and the current page tables are at the end of
* physical RAM.
*
* Several of the techniques were scammed from the Amiga code.
*
* On the list of "to-do"s is a clean-up of this code to allow for
* more 040-like action--right now, the 040 is pretty much emulating
* an 851/030 mmu style.
*/
void
map040(void)
{
extern void etext(); /* Okaaaaay... */
u_int vstart, vend, pstart, pend, avail;
u_int Sysseg_pa, /*Sysseg1_pa,*/ Sysptmap_pa, umap_pa;
u_int pt, ptpa, ptextra, ptsize;
u_int p0_ptpa, p0_u_area_pa, i;
u_int sg_proto, pg_proto;
u_int *sg, *pg, *pg2;
u_int oldIOBase, oldNBBase;
oldIOBase = IOBase;
oldNBBase = NuBusBase;
/* init "tracking" values */
vend = get_top_of_ram();
avail = vend;
vstart = mac68k_round_page(esym);
pstart = vstart + load_addr;
pend = vend + load_addr;
avail -= vstart;
/*
* Allocate the kernel 1st level segment table.
*/
Sysseg1_pa = pstart;
Sysseg1 = vstart;
vstart += NBPG;
pstart += NBPG;
avail -= NBPG;
/*
* Allocate the kernel segment table.
*/
Sysseg_pa = pstart;
Sysseg = vstart;
vstart += NBPG * 16;
pstart += NBPG * 16;
avail -= NBPG * 16;
/*
* Allocate initial page table pages.
*/
pt = vstart;
ptpa = pstart;
ptextra = IIOMAPSIZE + NBMAPSIZE;
ptsize = (Sysptsize + howmany(ptextra, NPTEPG)) << PGSHIFT;
vstart += ptsize;
pstart += ptsize;
avail -= ptsize;
/*
* Allocate kernel page table map.
*/
Sysptmap = vstart;
Sysptmap_pa = pstart;
vstart += NBPG * Sysptsize;
pstart += NBPG * Sysptsize;
avail -= NBPG * Sysptsize;
/*
* Set Sysmap; mapped after page table pages.
*/
Sysmap = (struct pte *) (ptsize << (12));
/*
* Initialize segment table and page table map.
*/
sg_proto = Sysseg_pa | SG_RW | SG_V;
/*
* Map all level 1 entries to the segment table.
*/
sg = (u_int *) Sysseg1_pa;
while (sg_proto < ptpa) {
*sg++ = sg_proto;
sg_proto += MAC_040STSIZE;
}
/*
* Clear remainder of root table.
*/
while (sg < (u_int *) Sysseg_pa)
*sg++ = SG_NV;
sg_proto = ptpa | SG_RW | SG_V;
pg_proto = ptpa | PG_RW | PG_CI | PG_V;
/*
* Map so many segs.
*/
sg = (u_int *) Sysseg_pa;
pg = (u_int *) Sysptmap_pa;
while (sg_proto < pstart) {
*sg++ = sg_proto;
if (pg_proto < pstart)
*pg++ = pg_proto;
else if (pg < (u_int *) (Sysptmap_pa + NBPG * Sysptsize))
*pg++ = PG_NV;
sg_proto += MAC_040PTSIZE;
pg_proto += NBPG;
}
/*
* Invalidate remainder of table.
*/
do {
*sg++ = SG_NV;
if (pg < (u_int *) (Sysptmap_pa + NBPG * Sysptsize))
*pg++ = PG_NV;
} while (sg < (u_int *) (Sysseg_pa + NBPG * 16));
/*
* Portions of the last segment of KVA space (0xFFF0 0000 -
* 0xFFFF FFFF are mapped for the current process u-area.
* Specifically, 0xFFFF C000 - 0xFFFF FFFF is mapped. This
* translates to (u + kernel stack).
*/
/*
* Use next available slot.
*/
sg_proto = (pstart + NBPG - MAC_040PTSIZE) | SG_RW | SG_V;
umap_pa = pstart; /* Remember for later map entry. */
/*
* Enter the page into the level 2 segment table.
*/
sg = (u_int *) (Sysseg_pa + NBPG * 16);
while (sg_proto > pstart) {
*--sg = sg_proto;
sg_proto -= MAC_040PTSIZE;
}
/*
* Enter the page into the page table map.
*/
pg_proto = pstart | PG_RW | PG_CI | PG_V;
pg = (u_int *) (Sysptmap_pa + 1024);
*--pg = pg_proto;
/*
* Invalidate all pte's (will validate u-area afterwards)
*/
for (pg = (u_int *) pstart ; pg < (u_int *) (pstart + NBPG) ; )
*pg++ = PG_NV;
/*
* Account for the allocated page.
*/
vstart += NBPG;
pstart += NBPG;
avail -= NBPG;
/*
* Record KVA at which to access current u-area PTE(s).
*/
Umap = (u_int) Sysmap + NPTEPG*NBPG - HIGHPAGES * 4;
/*
* Initialize kernel page table page(s) (assume load at VA 0)
*/
pg_proto = load_addr | PG_RO | PG_V;
pg = (u_int *) ptpa;
for (i = 0 ; i < (u_int) etext ; i+=NBPG , pg_proto+=NBPG )
*pg++ = pg_proto;
/*
* Data, BSS and dynamic tables are read/write.
*/
pg_proto = (pg_proto&PG_FRAME) | PG_RW | PG_V;
pg_proto |= PG_CCB;
/*
* Go until end of data allocated so far plus proc0 PT/u-area
* (to be allocated below)
*/
for ( ; i < vstart + (UPAGES + 1) * NBPG ; i+=NBPG , pg_proto += NBPG )
*pg++ = pg_proto;
/*
* Invalidate remainder of kernel PT.
*/
while (pg < (u_int *) (ptpa + ptsize))
*pg++ = PG_NV;
/*
* Go back and validate I/O space.
*/
pg -= ptextra;
pg2 = pg;
pg_proto = (IOBase & PG_FRAME) | PG_RW | PG_CI | PG_V;
while (pg_proto < INTIOTOP) {
*pg++ = pg_proto;
pg_proto += NBPG;
}
/*
* Go validate NuBus space.
*/
pg_proto = (NBBASE & PG_FRAME) | PG_RW | PG_CI | PG_V;
/* Need CI, here? (akb) */
while (pg_proto < NBTOP) {
*pg++ = pg_proto;
pg_proto += NBPG;
}
/*
* Record base KVA of I/O and NuBus spaces.
*/
IOBase = (u_int) Sysmap - ptextra * NBPG;
NuBusBase = IOBase + IIOMAPSIZE * NBPG;
/*
* Make proper segment table entries for these, now.
*/
sg_proto = ((u_int)pg2) | SG_RW | SG_V;
i =(((u_int) IOBase) & SG_IMASK1) >> SG_ISHIFT1;
sg = (u_int *) ((((u_int *) Sysseg1)[i]) & ~0x7f);
sg += (((u_int) IOBase) & SG_IMASK2) >> SG_040ISHIFT;
while (sg_proto < (u_int) pg) {
*sg++ = sg_proto;
sg_proto += MAC_040PTSIZE;
}
/*
* This is bogus.. This happens automatically
* on the Amiga, I think...
*/
sg_proto = Sysptmap_pa | SG_RW | SG_V;
i = (((u_int) Sysmap) & SG_IMASK1) >> SG_ISHIFT1;
sg = (u_int *) ((((u_int *) Sysseg1)[i]) & ~0x7f);
sg += (((u_int) Sysmap) & SG_IMASK2) >> SG_040ISHIFT;
while (sg_proto < Sysptmap_pa + Sysptsize * NBPG) {
*sg++ = sg_proto;
sg_proto += MAC_040PTSIZE;
}
/*
* Setup page table for process 0.
* We set up page table access for the kernel via Usrptmap (usrpt)
* [no longer used?] and access the u-area itself via Umap (u).
* First available page (vstart/pstart) is used for proc0 page table.
* Next UPAGES (page(s)) following are for u-area.
*/
p0_ptpa = pstart;
vstart += NBPG;
pstart += NBPG;
avail -= NBPG;
p0_u_area_pa = pstart; /* Base of u-area and end of PT */
/*
* Invalidate entire page table.
*/
for (pg = (u_int *) p0_ptpa ; pg < (u_int *) p0_u_area_pa ; )
*pg++ = PG_NV;
/*
* Now go back and validate u-area PTE(s) in PT and in Umap.
*/
pg -= HIGHPAGES;
pg2 = (u_int *) (umap_pa + 4*(NPTEPG - UPAGES));
pg_proto = p0_u_area_pa | PG_RW | PG_V;
pg_proto |= PG_CCB;
for (i=0 ; i < UPAGES ; i++, pg_proto += NBPG) {
*pg++ = pg_proto;
*pg2++ = pg_proto;
}
bzero ((u_char *) p0_u_area_pa, UPAGES * NBPG);
/*
* Save KVA of proc0 u-area.
*/
proc0paddr = vstart;
vstart += UPAGES * NBPG;
pstart += UPAGES * NBPG;
avail -= UPAGES * NBPG;
/*
* Init mem sizes.
*/
maxmem = pend >> PGSHIFT;
physmem = (mac68k_machine.mach_memsize*1024*1024) >> PGSHIFT;
/*
* Get the pmap module in sync with reality.
*/
pmap_bootstrap(pstart, load_addr);
/*
* Prepare to enable the MMU.
* [Amiga copies kernel over right before this. This might be
* necessary on the IIci/si/vx/etc., but is not necessary on
* any 040 boxes that I know of (yet). ]
*/
/*
* movel Sysseg1_pa, a0;
* movec a0, SRP;
* pflusha;
* movel #0x8000, d0;
* movec d0, TC;
*/
asm volatile ("movel %0, a0; .word 0x4e7b,0x8807"
: : "a" (Sysseg1_pa));
asm volatile (".word 0xf518" : : );
asm volatile ("movel #0x8000,d0; .word 0x4e7b,0x0003" : : );
TBIA();
/*
* (akb) I think that this is
* Designed to force proc0paddr to be set despite gcc's optimizer.
*/
i = *(int *) proc0paddr;
*(volatile int *) proc0paddr = i;
/*
* Reset pointers that will be wrong, now.
* They are set this way to avoid blowing up the working MacII, et al.
*/
Via1Base = (volatile unsigned char *)
((u_int) Via1Base - oldIOBase + IOBase);
ASCBase = (unsigned char *) ((u_int) ASCBase - oldIOBase + IOBase);
videoaddr = videoaddr - oldNBBase + NuBusBase;
}

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sys/arch/mac68k/mac68k/pmap_bootstrap.c Normal file
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/* $NetBSD: pmap_bootstrap.c,v 1.1 1995/06/21 03:19:35 briggs Exp $ */
/*
* Copyright (c) 1991, 1993
* The Regents of the University of California. All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* the Systems Programming Group of the University of Utah Computer
* Science Department.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)pmap_bootstrap.c 8.1 (Berkeley) 6/10/93
*/
#include <sys/param.h>
#include <sys/msgbuf.h>
#include <machine/pte.h>
#include <mac68k/mac68k/clockreg.h>
#include <machine/vmparam.h>
#include <machine/cpu.h>
#include <vm/vm.h>
#define PA2VA(v, t) (t)((u_int)(v) - firstpa)
extern char *etext;
extern int Sysptsize;
extern char *extiobase, *proc0paddr;
extern st_entry_t *Sysseg;
extern pt_entry_t *Sysptmap, *Sysmap;
extern int maxmem, physmem;
extern vm_offset_t avail_start, avail_next, avail_remaining, avail_range;
extern vm_offset_t virtual_avail, virtual_end;
extern vm_size_t mem_size;
extern int protection_codes[];
/*
* These are used to map the RAM:
*/
int numranges; /* = 0 == don't use the ranges */
unsigned long low[8];
unsigned long high[8];
extern int nbnumranges;
extern unsigned long nbphys[];
extern unsigned long nblog[];
extern signed long nblen[];
extern caddr_t ROMBase;
/*
* Special purpose kernel virtual addresses, used for mapping
* physical pages for a variety of temporary or permanent purposes:
*
* CADDR1, CADDR2: pmap zero/copy operations
* vmmap: /dev/mem, crash dumps, parity error checking
* msgbufp: kernel message buffer
*/
caddr_t CADDR1, CADDR2, vmmap;
struct msgbuf *msgbufp;
/*
* Bootstrap the VM system.
*
* This is called with the MMU either on or off. If it's on, we assume
* that it's mapped with the same PA <=> LA mapping that we eventually
* want. The page sizes and the protections will be wrong, anyway.
*/
void
pmap_bootstrap(nextpa, firstpa)
vm_offset_t nextpa;
register vm_offset_t firstpa;
{
vm_offset_t kstpa, kptpa, iiopa, eiopa, rompa, kptmpa, lkptpa, p0upa;
u_int nptpages, kstsize;
caddr_t oldROMBase;
int i;
register st_entry_t protoste, *ste;
register pt_entry_t protopte, *pte, *epte;
/*
* Calculate important physical addresses:
*
* kstpa kernel segment table 1 page (!040)
* N pages (040)
*
* kptpa statically allocated
* kernel PT pages Sysptsize+ pages
*
* iiopa internal IO space
* PT pages IIOMAPSIZE pages
*
* eiopa external IO space
* PT pages EIOMAPSIZE pages
*
* [ Sysptsize is the number of pages of PT, IIOMAPSIZE and
* EIOMAPSIZE are the number of PTEs, hence we need to round
* the total to a page boundary with IO maps at the end. ]
*
* kptmpa kernel PT map 1 page
*
* lkptpa last kernel PT page 1 page
*
* p0upa proc 0 u-area UPAGES pages
*
* The KVA corresponding to any of these PAs is:
* (PA - firstpa + KERNBASE).
*/
if (mmutype == MMU_68040)
kstsize = MAXKL2SIZE / (NPTEPG/SG4_LEV2SIZE);
else
kstsize = 1;
kstpa = nextpa;
nextpa += kstsize * NBPG;
kptpa = nextpa;
nptpages = Sysptsize +
(IIOMAPSIZE + NBMAPSIZE + ROMMAPSIZE + NPTEPG - 1) / NPTEPG;
nextpa += nptpages * NBPG;
eiopa = nextpa - NBMAPSIZE * sizeof(pt_entry_t);
rompa = eiopa - ROMMAPSIZE * sizeof(pt_entry_t);
iiopa = rompa - IIOMAPSIZE * sizeof(pt_entry_t);
kptmpa = nextpa;
nextpa += NBPG;
lkptpa = nextpa;
nextpa += NBPG;
p0upa = nextpa;
nextpa += USPACE;
if (nextpa > high[0]) {
printf("Failure in BSD boot. nextpa=0x%x, high[0]=0x%x.\n",
nextpa, high[0]);
panic("You're hosed!\n");
}
/*
* Initialize segment table and kernel page table map.
*
* On 68030s and earlier MMUs the two are identical except for
* the valid bits so both are initialized with essentially the
* same values. On the 68040, which has a mandatory 3-level
* structure, the segment table holds the level 1 table and part
* (or all) of the level 2 table and hence is considerably
* different. Here the first level consists of 128 descriptors
* (512 bytes) each mapping 32mb of address space. Each of these
* points to blocks of 128 second level descriptors (512 bytes)
* each mapping 256kb. Note that there may be additional "segment
* table" pages depending on how large MAXKL2SIZE is.
*
* XXX cramming two levels of mapping into the single "segment"
* table on the 68040 is intended as a temporary hack to get things
* working. The 224mb of address space that this allows will most
* likely be insufficient in the future (at least for the kernel).
*/
if (mmutype == MMU_68040) {
register int num;
/*
* First invalidate the entire "segment table" pages
* (levels 1 and 2 have the same "invalid" value).
*/
pte = PA2VA(kstpa, u_int *);
epte = &pte[kstsize * NPTEPG];
while (pte < epte)
*pte++ = SG_NV;
/*
* Initialize level 2 descriptors (which immediately
* follow the level 1 table). We need:
* NPTEPG / SG4_LEV3SIZE
* level 2 descriptors to map each of the nptpages+1
* pages of PTEs. Note that we set the "used" bit
* now to save the HW the expense of doing it.
*/
num = (nptpages + 1) * (NPTEPG / SG4_LEV3SIZE);
pte = &(PA2VA(kstpa, u_int *))[SG4_LEV1SIZE];
epte = &pte[num];
protoste = kptpa | SG_U | SG_RW | SG_V;
while (pte < epte) {
*pte++ = protoste;
protoste += (SG4_LEV3SIZE * sizeof(st_entry_t));
}
/*
* Initialize level 1 descriptors. We need:
* roundup(num, SG4_LEV2SIZE) / SG4_LEV2SIZE
* level 1 descriptors to map the `num' level 2's.
*/
pte = PA2VA(kstpa, u_int *);
epte = &pte[roundup(num, SG4_LEV2SIZE) / SG4_LEV2SIZE];
protoste = (u_int)&pte[SG4_LEV1SIZE] | SG_U | SG_RW | SG_V;
while (pte < epte) {
*pte++ = protoste;
protoste += (SG4_LEV2SIZE * sizeof(st_entry_t));
}
/*
* Initialize the final level 1 descriptor to map the last
* block of level 2 descriptors.
*/
ste = &(PA2VA(kstpa, u_int*))[SG4_LEV1SIZE-1];
pte = &(PA2VA(kstpa, u_int*))[kstsize*NPTEPG - SG4_LEV2SIZE];
*ste = (u_int)pte | SG_U | SG_RW | SG_V;
/*
* Now initialize the final portion of that block of
* descriptors to map the "last PT page".
*/
pte = &(PA2VA(kstpa, u_int*))
[kstsize*NPTEPG - NPTEPG/SG4_LEV3SIZE];
epte = &pte[NPTEPG/SG4_LEV3SIZE];
protoste = lkptpa | SG_U | SG_RW | SG_V;
while (pte < epte) {
*pte++ = protoste;
protoste += (SG4_LEV3SIZE * sizeof(st_entry_t));
}
/*
* Initialize Sysptmap
*/
pte = PA2VA(kptmpa, u_int *);
epte = &pte[nptpages+1];
protopte = kptpa | PG_RW | PG_CI | PG_V;
while (pte < epte) {
*pte++ = protopte;
protopte += NBPG;
}
pte = &(PA2VA(kptmpa, u_int *))[NPTEPG-1];
*pte = lkptpa | PG_RW | PG_CI | PG_V;
} else {
/*
* Map the page table pages in both the HW segment table
* and the software Sysptmap. Note that Sysptmap is also
* considered a PT page hence the +1.
*/
ste = PA2VA(kstpa, u_int*);
pte = PA2VA(kptmpa, u_int*);
epte = &pte[nptpages+1];
protoste = kptpa | SG_RW | SG_V;
protopte = kptpa | PG_RW | PG_CI | PG_V;
while (pte < epte) {
*ste++ = protoste;
*pte++ = protopte;
protoste += NBPG;
protopte += NBPG;
}
/*
* Invalidate all but the last remaining entries in both.
*/
epte = &(PA2VA(kptmpa, u_int *))[NPTEPG-1];
while (pte < epte) {
*ste++ = SG_NV;
*pte++ = PG_NV;
}
/*
* Initialize the last to point to point to the page
* table page allocated earlier.
*/
*ste = lkptpa | SG_RW | SG_V;
*pte = lkptpa | PG_RW | PG_CI | PG_V;
}
/*
* Invalidate all but the final entry in the last kernel PT page
* (u-area PTEs will be validated later). The final entry maps
* the last page of physical memory.
*/
pte = PA2VA(lkptpa, u_int *);
epte = &pte[NPTEPG-1];
while (pte < epte)
*pte++ = PG_NV;
*pte = (0xFFFFF000) | PG_RW | PG_CI | PG_V; /* XXX */
/*
* Initialize kernel page table.
* Start by invalidating the `nptpages' that we have allocated.
*/
pte = PA2VA(kptpa, u_int *);
epte = &pte[nptpages * NPTEPG];
while (pte < epte)
*pte++ = PG_NV;
/*
* Validate PTEs for kernel text (RO)
*/
pte = &(PA2VA(kptpa, u_int *))[mac68k_btop(KERNBASE)];
epte = &pte[mac68k_btop(mac68k_trunc_page(&etext))];
#if defined(KGDB) || defined(DDB)
protopte = firstpa | PG_RW | PG_V; /* XXX RW for now */
#else
protopte = firstpa | PG_RO | PG_V;
#endif
while (pte < epte) {
*pte++ = protopte;
protopte += NBPG;
}
/*
* Validate PTEs for kernel data/bss, dynamic data allocated
* by us so far (nextpa - firstpa bytes), and pages for proc0
* u-area and page table allocated below (RW).
*/
epte = &(PA2VA(kptpa, u_int *))[mac68k_btop(nextpa - firstpa)];
protopte = (protopte & ~PG_PROT) | PG_RW;
/*
* Enable copy-back caching of data pages
*/
if (mmutype == MMU_68040)
protopte |= PG_CCB;
while (pte < epte) {
*pte++ = protopte;
protopte += NBPG;
}
/*
* Finally, validate the internal IO space PTEs (RW+CI).
* We do this here since the 320/350 MMU registers (also
* used, but to a lesser extent, on other models) are mapped
* in this range and it would be nice to be able to access
* them after the MMU is turned on.
*/
pte = PA2VA(iiopa, u_int *);
epte = PA2VA(rompa, u_int *);
protopte = INTIOBASE | PG_RW | PG_CI | PG_V;
while (pte < epte) {
*pte++ = protopte;
protopte += NBPG;
}
pte = PA2VA(rompa, u_int *);
epte = PA2VA(eiopa, u_int *);
protopte = ((u_int) ROMBase) | PG_RO | PG_V;
while (pte < epte) {
*pte++ = protopte;
protopte += NBPG;
}
pte = PA2VA(eiopa, u_int *);
epte = pte + NBMAPSIZE;
protopte = NBBASE | PG_RW | PG_V | PG_CI;
while (pte < epte) {
*pte++ = protopte;
protopte += NBPG;
}
/*
* Calculate important exported kernel virtual addresses
*/
/*
* Sysseg: base of kernel segment table
*/
Sysseg = PA2VA(kstpa, st_entry_t *);
/*
* Sysptmap: base of kernel page table map
*/
Sysptmap = PA2VA(kptmpa, pt_entry_t *);
/*
* Sysmap: kernel page table (as mapped through Sysptmap)
* Immediately follows `nptpages' of static kernel page table.
*/
Sysmap = (pt_entry_t *)mac68k_ptob(nptpages * NPTEPG);
/*
* intiobase, intiolimit: base and end of internal (DIO) IO space.
* IIOMAPSIZE pages prior to external IO space at end of static
* kernel page table. XXX update me.
*/
IOBase = (unsigned long)mac68k_ptob(nptpages*NPTEPG -
(IIOMAPSIZE + ROMMAPSIZE + NBMAPSIZE));
mac68k_set_io_offsets(IOBase);
oldROMBase = ROMBase;
ROMBase = (char *)mac68k_ptob(nptpages*NPTEPG -
(ROMMAPSIZE + NBMAPSIZE));
mrg_fixupROMBase(oldROMBase, ROMBase);
NuBusBase = (unsigned long)mac68k_ptob(nptpages*NPTEPG - NBMAPSIZE);
{
int len;
unsigned long offset;
for (i = 0; i < nbnumranges; i++) {
pte = (PA2VA(eiopa, u_int *)) + mac68k_btop(nblog[i] - NBBASE);
protopte = (nbphys[i] & PG_FRAME) | PG_RW | PG_V | PG_CI;
if (nblen[i] < 0) {
len = mac68k_btop(-nblen[i]);
offset = 0;
while (len--) {
*pte++ = protopte + offset;
/* Wrap around every 32k: */
offset = (offset + NBPG) & 0x7fff;
}
} else {
len = mac68k_btop(nblen[i]);
while (len--) {
*pte++ = protopte;
protopte += NBPG;
}
}
if (pte > Sysmap) printf("Ack! Over Sysmap!\n");
}
}
/*
* Setup u-area for process 0.
*/
/*
* Zero the u-area.
* NOTE: `pte' and `epte' aren't PTEs here.
*/
pte = PA2VA(p0upa, u_int *);
epte = (u_int *) (PA2VA(p0upa, u_int) + USPACE);
while (pte < epte)
*pte++ = 0;
/*
* Remember the u-area address so it can be loaded in the
* proc struct p_addr field later.
*/
proc0paddr = PA2VA(p0upa, char *);
/*
* VM data structures are now initialized, set up data for
* the pmap module.
*/
avail_next = avail_start = mac68k_round_page(nextpa);
avail_remaining = 0;
avail_range = -1;
for (i = 0; i < numranges; i++) {
if (avail_next >= low[i] && avail_next < high[i]) {
avail_range = i;
avail_remaining = high[i] - avail_next;
} else if (avail_range != -1) {
avail_remaining += (high[i] - low[i]);
}
}
physmem = mac68k_btop(avail_remaining + nextpa - firstpa);
avail_remaining -= mac68k_round_page(sizeof(struct msgbuf));
high[numranges - 1] -= mac68k_round_page(sizeof(struct msgbuf));
/* XXX -- this doesn't look correct to me. */
while (high[numranges - 1] < low[numranges - 1]) {
numranges--;
high[numranges - 1] -= low[numranges] - high[numranges];
}
avail_remaining = mac68k_btop(mac68k_trunc_page(avail_remaining));
mem_size = mac68k_ptob(physmem);
virtual_avail = VM_MIN_KERNEL_ADDRESS + (nextpa - firstpa);
virtual_end = VM_MAX_KERNEL_ADDRESS;
/*
* Initialize protection array.
* XXX don't use a switch statement, it might produce an
* absolute "jmp" table.
*/
{
register int *kp;
kp = (int *) &protection_codes;
kp[VM_PROT_NONE|VM_PROT_NONE|VM_PROT_NONE] = 0;
kp[VM_PROT_READ|VM_PROT_NONE|VM_PROT_NONE] = PG_RO;
kp[VM_PROT_READ|VM_PROT_NONE|VM_PROT_EXECUTE] = PG_RO;
kp[VM_PROT_NONE|VM_PROT_NONE|VM_PROT_EXECUTE] = PG_RO;
kp[VM_PROT_NONE|VM_PROT_WRITE|VM_PROT_NONE] = PG_RW;
kp[VM_PROT_NONE|VM_PROT_WRITE|VM_PROT_EXECUTE] = PG_RW;
kp[VM_PROT_READ|VM_PROT_WRITE|VM_PROT_NONE] = PG_RW;
kp[VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE] = PG_RW;
}
/*
* Kernel page/segment table allocated in locore,
* just initialize pointers.
*/
{
struct pmap *kpm = (struct pmap *)&kernel_pmap_store;
kpm->pm_stab = Sysseg;
kpm->pm_ptab = Sysmap;
simple_lock_init(&kpm->pm_lock);
kpm->pm_count = 1;
kpm->pm_stpa = (st_entry_t *)kstpa;
/*
* For the 040 we also initialize the free level 2
* descriptor mask noting that we have used:
* 0: level 1 table
* 1 to `num': map page tables
* MAXKL2SIZE-1: maps last-page page table
*/
if (mmutype == MMU_68040) {
register int num;
kpm->pm_stfree = ~l2tobm(0);
num = roundup((nptpages + 1) * (NPTEPG / SG4_LEV3SIZE),
SG4_LEV2SIZE) / SG4_LEV2SIZE;
while (num)
kpm->pm_stfree &= ~l2tobm(num--);
kpm->pm_stfree &= ~l2tobm(MAXKL2SIZE-1);
for (num = MAXKL2SIZE;
num < sizeof(kpm->pm_stfree)*NBBY;
num++)
kpm->pm_stfree &= ~l2tobm(num);
}
}
/*
* Allocate some fixed, special purpose kernel virtual addresses
*/
{
vm_offset_t va = virtual_avail;
CADDR1 = (caddr_t)va;
va += NBPG;
CADDR2 = (caddr_t)va;
va += NBPG;
vmmap = (caddr_t)va;
va += NBPG;
msgbufp = (struct msgbuf *)va;
va += NBPG;
virtual_avail = va;
}
}
void
bootstrap_mac68k(tc)
int tc;
{
extern caddr_t esym;
extern unsigned long videoaddr;
vm_offset_t nextpa;
if (tc & 0x80000000) {
/* MMU enabled. */
if (mmutype == MMU_68030)
get_mapping();
else {
/* What do I do here? */
}
} else {
/* MMU not enabled. Fake up ranges. */
nbnumranges = 0;
numranges = 1;
low[0] = 0;
high[0] = mac68k_machine.mach_memsize;
}
nextpa = load_addr + ((int)esym + NBPG - 1) & PG_FRAME;
pmap_bootstrap(nextpa, load_addr);
videoaddr = videoaddr - NBBASE + NuBusBase;
}