PCI Interrupt router support for VIA VT823[1357] Southbridges.

From OpenBSD.
This commit is contained in:
xtraeme 2006-01-01 12:12:43 +00:00
parent 264b791562
commit 37a21a6320
5 changed files with 472 additions and 4 deletions

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@ -1,4 +1,4 @@
# $NetBSD: files.i386,v 1.275 2005/12/31 17:55:55 xtraeme Exp $ # $NetBSD: files.i386,v 1.276 2006/01/01 12:12:43 xtraeme Exp $
# #
# new style config file for i386 architecture # new style config file for i386 architecture
# #
@ -166,6 +166,7 @@ file arch/i386/pci/opti82c558.c pcibios & pci_intr_fixup
file arch/i386/pci/opti82c700.c pcibios & pci_intr_fixup file arch/i386/pci/opti82c700.c pcibios & pci_intr_fixup
file arch/i386/pci/sis85c503.c pcibios & pci_intr_fixup file arch/i386/pci/sis85c503.c pcibios & pci_intr_fixup
file arch/i386/pci/via82c586.c pcibios & pci_intr_fixup file arch/i386/pci/via82c586.c pcibios & pci_intr_fixup
file arch/i386/pci/via8231.c pcibios & pci_intr_fixup
file arch/i386/pci/amd756.c pcibios & pci_intr_fixup file arch/i386/pci/amd756.c pcibios & pci_intr_fixup
file arch/i386/pci/ali1543.c pcibios & pci_intr_fixup file arch/i386/pci/ali1543.c pcibios & pci_intr_fixup
file arch/i386/pci/pci_bus_fixup.c pci_bus_fixup file arch/i386/pci/pci_bus_fixup.c pci_bus_fixup

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@ -1,4 +1,4 @@
/* $NetBSD: pci_intr_fixup.c,v 1.35 2005/12/26 19:24:00 perry Exp $ */ /* $NetBSD: pci_intr_fixup.c,v 1.36 2006/01/01 12:12:44 xtraeme Exp $ */
/*- /*-
* Copyright (c) 1999 The NetBSD Foundation, Inc. * Copyright (c) 1999 The NetBSD Foundation, Inc.
@ -67,7 +67,7 @@
*/ */
#include <sys/cdefs.h> #include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: pci_intr_fixup.c,v 1.35 2005/12/26 19:24:00 perry Exp $"); __KERNEL_RCSID(0, "$NetBSD: pci_intr_fixup.c,v 1.36 2006/01/01 12:12:44 xtraeme Exp $");
#include "opt_pcibios.h" #include "opt_pcibios.h"
#include "opt_pcifixup.h" #include "opt_pcifixup.h"
@ -171,6 +171,15 @@ const struct pciintr_icu_table {
{ PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C686A_ISA, { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C686A_ISA,
via82c586_init }, via82c586_init },
{ PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8231,
via8231_init },
{ PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8233A,
via8231_init },
{ PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8235,
via8231_init },
{ PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8237,
via8231_init },
{ PCI_VENDOR_SIS, PCI_PRODUCT_SIS_85C503, { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_85C503,
sis85c503_init }, sis85c503_init },

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@ -1,4 +1,4 @@
/* $NetBSD: pci_intr_fixup.h,v 1.7 2005/12/26 19:24:00 perry Exp $ */ /* $NetBSD: pci_intr_fixup.h,v 1.8 2006/01/01 12:12:44 xtraeme Exp $ */
/* /*
* Copyright (c) 1999, by UCHIYAMA Yasushi * Copyright (c) 1999, by UCHIYAMA Yasushi
@ -63,6 +63,8 @@ int opti82c700_init(pci_chipset_tag_t, bus_space_tag_t, pcitag_t,
pciintr_icu_tag_t *, pciintr_icu_handle_t *); pciintr_icu_tag_t *, pciintr_icu_handle_t *);
int via82c586_init(pci_chipset_tag_t, bus_space_tag_t, pcitag_t, int via82c586_init(pci_chipset_tag_t, bus_space_tag_t, pcitag_t,
pciintr_icu_tag_t *, pciintr_icu_handle_t *); pciintr_icu_tag_t *, pciintr_icu_handle_t *);
int via8231_init(pci_chipset_tag_t, bus_space_tag_t, pcitag_t,
pciintr_icu_tag_t *, pciintr_icu_handle_t *);
int sis85c503_init(pci_chipset_tag_t, bus_space_tag_t, pcitag_t, int sis85c503_init(pci_chipset_tag_t, bus_space_tag_t, pcitag_t,
pciintr_icu_tag_t *, pciintr_icu_handle_t *); pciintr_icu_tag_t *, pciintr_icu_handle_t *);
int amd756_init(pci_chipset_tag_t, bus_space_tag_t, pcitag_t, int amd756_init(pci_chipset_tag_t, bus_space_tag_t, pcitag_t,

319
sys/arch/i386/pci/via8231.c Normal file
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@ -0,0 +1,319 @@
/* $NetBSD: via8231.c,v 1.1 2006/01/01 12:12:44 xtraeme Exp $ */
/* OpenBSD: via8231.c,v 1.6 2005/10/27 16:41:06 mickey Exp */
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Copyright (c) 2005, by Michael Shalayeff
* Copyright (c) 2003, by Matthew Gream
* Copyright (c) 1999, by UCHIYAMA Yasushi
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. The name of the developer may NOT be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* Support for the VIA Technologies Inc. VIA VT823[1357] PCI to ISA Bridge
* Based upon documentation:
* 1. VIA VT8231 South Bridge, Revision 1.85 (March 11, 2002), pg 73
* 2. VIA VT8237R South Bridge, Revision 2.06 (December 15, 2004), pg 100
* Derived from amd756.c
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: via8231.c,v 1.1 2006/01/01 12:12:44 xtraeme Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/malloc.h>
#include <machine/intr.h>
#include <machine/bus.h>
#include <dev/pci/pcivar.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcidevs.h>
#include <i386/pci/pci_intr_fixup.h>
#include <i386/pci/via8231reg.h>
struct via8231_handle {
bus_space_tag_t ph_iot;
bus_space_handle_t ph_regs_ioh;
pci_chipset_tag_t ph_pc;
pcitag_t ph_tag;
int flags;
#define VT8237 0x0001
};
int via8231_getclink(pciintr_icu_handle_t, int, int *);
int via8231_get_intr(pciintr_icu_handle_t, int, int *);
int via8231_set_intr(pciintr_icu_handle_t, int, int);
int via8231_get_trigger(pciintr_icu_handle_t, int, int *);
int via8231_set_trigger(pciintr_icu_handle_t, int, int);
#ifdef VIA8231_DEBUG
static void via8231_pir_dump(const char*, struct via8231_handle *);
#endif
const struct pciintr_icu via8231_pci_icu = {
via8231_getclink,
via8231_get_intr,
via8231_set_intr,
via8231_get_trigger,
via8231_set_trigger,
};
struct mask_shft_pair {
int mask;
int shft;
};
static const struct mask_shft_pair via8231_routing_cnfg[VIA8231_LINK_MAX+1] = {
{ 0x0f, 0+4 }, /*PINTA#*/
{ 0x0f, 8+0 }, /*PINTB#*/
{ 0x0f, 8+4 }, /*PINTC#*/
{ 0x0f, 16+4 } /*PINTD#*/
};
#define VIA8231_GET_TRIGGER_CNFG(reg, pirq) \
((reg) & (1 << (3 - (clink & 3))))
#define VIA8231_SET_TRIGGER_CNFG(reg, clink, cfg) \
(((reg) & ~(1 << (3 - (clink & 3)))) | ((cfg) << (3 - (clink & 3))))
#define VIA8231_GET_ROUTING_CNFG(reg, pirq) \
(((reg) >> via8231_routing_cnfg[(pirq)].shft) & \
via8231_routing_cnfg[(pirq)].mask)
#define VIA8231_SET_ROUTING_CNFG(reg, pirq, cfg) \
(((reg) & ~(via8231_routing_cnfg[(pirq)].mask << \
via8231_routing_cnfg[(pirq)].shft)) | \
(((cfg) & via8231_routing_cnfg[(pirq)].mask) << \
via8231_routing_cnfg[(pirq)].shft))
int
via8231_init(pci_chipset_tag_t pc, bus_space_tag_t iot, pcitag_t tag,
pciintr_icu_tag_t *ptagp, pciintr_icu_handle_t *phandp)
{
struct via8231_handle *ph;
pcireg_t id;
ph = malloc(sizeof(*ph), M_DEVBUF, M_NOWAIT);
if (ph == NULL)
return (1);
ph->ph_iot = iot;
ph->ph_pc = pc;
ph->ph_tag = tag;
id = pci_conf_read(pc, tag, PCI_ID_REG);
ph->flags = PCI_VENDOR(id) == PCI_VENDOR_VIATECH &&
PCI_PRODUCT(id) == PCI_PRODUCT_VIATECH_VT8231? 0 : VT8237;
*ptagp = &via8231_pci_icu;
*phandp = ph;
#ifdef VIA8231_DEBUG
via8231_pir_dump("via8231_init", ph);
#endif
return 0;
}
int
via8231_getclink(pciintr_icu_handle_t v, int link, int *clinkp)
{
struct via8231_handle *ph = v;
if ((ph->flags & VT8237) && !VIA8237_LINK_LEGAL(link - 1))
return (1);
if (!(ph->flags & VT8237) && !VIA8231_LINK_LEGAL(link - 1))
return (1);
*clinkp = link - 1;
return (0);
}
int
via8231_get_intr(pciintr_icu_handle_t v, int clink, int *irqp)
{
struct via8231_handle *ph = v;
int reg, val;
if (VIA8237_LINK_LEGAL(clink) == 0)
return (1);
if (VIA8231_LINK_LEGAL(clink)) {
reg = VIA8231_GET_ROUTING(ph);
val = VIA8231_GET_ROUTING_CNFG(reg, clink);
} else {
reg = VIA8237_GET_ROUTING(ph);
val = (reg >> ((clink & 3) * 4)) & 0xf;
}
*irqp = (val == VIA8231_ROUTING_CNFG_DISABLED) ?
X86_PCI_INTERRUPT_LINE_NO_CONNECTION : val;
return (0);
}
int
via8231_set_intr(pciintr_icu_handle_t v, int clink, int irq)
{
struct via8231_handle *ph = v;
int reg;
if (VIA8237_LINK_LEGAL(clink) == 0 || VIA8231_PIRQ_LEGAL(irq) == 0)
return (1);
#ifdef VIA8231_DEBUG
printf("via8231_set_intr: link(%02x) --> irq(%02x)\n", clink, irq);
via8231_pir_dump("via8231_set_intr: ", ph);
#endif
if (VIA8231_LINK_LEGAL(clink)) {
reg = VIA8231_GET_ROUTING(ph);
VIA8231_SET_ROUTING(ph,
VIA8231_SET_ROUTING_CNFG(reg, clink, irq));
} else {
reg = VIA8237_GET_ROUTING(ph);
VIA8237_SET_ROUTING(ph, (reg & ~(0xf << (clink & 3))) |
((irq & 0xf) << (clink & 3)));
}
return (0);
}
int
via8231_get_trigger(pciintr_icu_handle_t v, int irq, int *triggerp)
{
struct via8231_handle *ph = v;
int reg, clink, m, pciirq;
if (VIA8231_PIRQ_LEGAL(irq) == 0)
return (1);
m = ph->flags & VT8237? VIA8237_LINK_MAX : VIA8231_LINK_MAX;
for (clink = 0; clink <= m; clink++) {
via8231_get_intr(v, clink, &pciirq);
if (pciirq == irq) {
reg = VIA8231_LINK_LEGAL(clink)?
VIA8231_GET_TRIGGER(ph):
VIA8237_GET_TRIGGER(ph);
*triggerp = VIA8231_GET_TRIGGER_CNFG(reg, clink)?
IST_EDGE : IST_LEVEL;
return (0);
}
}
return (1);
}
int
via8231_set_trigger(pciintr_icu_handle_t v, int irq, int trigger)
{
struct via8231_handle *ph = v;
int reg, clink, m, pciirq;
if (VIA8231_PIRQ_LEGAL(irq) == 0 || VIA8231_TRIG_LEGAL(trigger) == 0)
return (1);
#ifdef VIA8231_DEBUG
printf("via8231_set_trig: irq(%02x) --> trig(%02x)\n", irq, trigger);
via8231_pir_dump("via8231_set_trig: ", ph);
#endif
m = ph->flags & VT8237? VIA8237_LINK_MAX : VIA8231_LINK_MAX;
for (clink = 0; clink <= VIA8231_LINK_MAX; clink++) {
via8231_get_intr(v, clink, &pciirq);
if (pciirq == irq) {
reg = VIA8231_LINK_LEGAL(clink)?
VIA8231_GET_TRIGGER(ph):
VIA8237_GET_TRIGGER(ph);
switch (trigger) {
case IST_LEVEL:
reg = VIA8231_SET_TRIGGER_CNFG(reg, clink,
VIA8231_TRIGGER_CNFG_LEVEL);
break;
case IST_EDGE:
reg = VIA8231_SET_TRIGGER_CNFG(reg, clink,
VIA8231_TRIGGER_CNFG_EDGE);
break;
default:
return (1);
}
if (VIA8231_LINK_LEGAL(clink))
VIA8231_SET_TRIGGER(ph, reg);
else
VIA8237_SET_TRIGGER(ph, reg);
return (0);
}
}
return (1);
}
#ifdef VIA8231_DEBUG
static void
via8231_pir_dump(const char *m, struct via8231_handle *ph)
{
int a, b;
a = VIA8231_GET_TRIGGER(ph);
b = VIA8231_GET_ROUTING(ph);
printf("%s STATE: trigger(%02x), routing(%08x)\n", m, a, b);
}
#endif

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/* $NetBSD: via8231reg.h,v 1.1 2006/01/01 12:12:44 xtraeme Exp $ */
/* OpenBSD: via8231reg.h,v 1.4 2005/10/26 21:38:28 mickey Exp */
/*
* Copyright (c) 2005, by Michael Shalayeff
* Copyright (c) 2003, by Matthew Gream
* Copyright (c) 1999, by UCHIYAMA Yasushi
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. The name of the developer may NOT be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* Register definitions for the VIA8231 PCI to ISA Bridge
*/
/*
* Edge Triggered Interrupt Select register. (0x54)
* bits 7-4: reserved
* bit 3: Edge Triggered Interrupt Select for PCI Interrupt A
* bit 2: Edge Triggered Interrupt Select for PCI Interrupt B
* bit 1: Edge Triggered Interrupt Select for PCI Interrupt C
* bit 0: Edge Triggered Interrupt Select for PCI Interrupt D
* 0 = Non-invert (level)
* 1 = Invert (edge)
*
* PIRQ Select register. (0x55 - 0x57)
* (0x55)
* bits 7-4: PINTA# Routing
* bits 3-0: reserved
* (0x56)
* bits 7-4: PINTC# Routing
* bits 3-0: PINTB# Routing
* (0x57)
* bits 7-4: PINTD# Routing
* bits 3-0: reserved
* PIRQ Select register. (0x44 - 0x47)
* (0x44)
* bits 7-4: PINTF# Routing
* bits 3-0: PINTE# Routing
* (0x45)
* bits 7-4: PINTH# Routing
* bits 3-0: PINTG# Routing
* (0x46)
* bit 4: EFGH/ABCD share (1 -- use above mappings)
* bit 3: Edge Triggered Interrupt Select for PCI Interrupt H
* bit 2: Edge Triggered Interrupt Select for PCI Interrupt G
* bit 1: Edge Triggered Interrupt Select for PCI Interrupt F
* bit 0: Edge Triggered Interrupt Select for PCI Interrupt E
*
* 0000: Disabled 0100: IRQ4 1000: Reserved 1100: IRQ12
* 0001: IRQ1 0101: IRQ5 1001: IRQ9 1101: Reserved
* 0010: Reserved 0110: IRQ6 1010: IRQ10 1110: IRQ14
* 0011: IRQ3 0111: IRQ7 1011: IRQ11 1111: IRQ15
*/
#define VIA8231_CFG_PIR 0x54
#define VIA8237_CFG_PIR 0x44
#define VIA8231_TRIGGER_CNFG_MASK 0x000000ff
#define VIA8231_TRIGGER_CNFG_SHFT 0
#define VIA8237_TRIGGER_CNFG_MASK 0x000f0000
#define VIA8237_TRIGGER_CNFG_SHFT 16
#define VIA8231_TRIGGER_CNFG_LEVEL 0
#define VIA8231_TRIGGER_CNFG_EDGE 1
#define VIA8237_TRIGGER_CNFG_ENA 0x00100000
#define VIA8231_GET_TRIGGER(ph) \
((pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8231_CFG_PIR) \
& VIA8231_TRIGGER_CNFG_MASK) >> VIA8231_TRIGGER_CNFG_SHFT)
#define VIA8237_GET_TRIGGER(ph) \
((pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8237_CFG_PIR) \
& VIA8237_TRIGGER_CNFG_MASK) >> VIA8237_TRIGGER_CNFG_SHFT)
#define VIA8231_SET_TRIGGER(ph, n) \
pci_conf_write((ph)->ph_pc, (ph)->ph_tag, VIA8231_CFG_PIR, \
(pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8231_CFG_PIR) \
& ~VIA8231_TRIGGER_CNFG_MASK) | ((n) << VIA8231_TRIGGER_CNFG_SHFT))
#define VIA8237_SET_TRIGGER(ph, n) \
pci_conf_write((ph)->ph_pc, (ph)->ph_tag, VIA8237_CFG_PIR, \
(pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8237_CFG_PIR) \
& ~VIA8237_TRIGGER_CNFG_MASK) | ((n) << VIA8237_TRIGGER_CNFG_SHFT))
#define VIA8231_ROUTING_CNFG_MASK 0xffffff00
#define VIA8231_ROUTING_CNFG_SHFT 8 /* skip 0x54 triggers */
#define VIA8231_ROUTING_CNFG_DISABLED 0
#define VIA8237_ROUTING_CNFG_MASK 0xffff
#define VIA8237_ROUTING_CNFG_SHFT 0
#define VIA8231_GET_ROUTING(ph) \
((pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8231_CFG_PIR) \
& VIA8231_ROUTING_CNFG_MASK) >> VIA8231_ROUTING_CNFG_SHFT)
#define VIA8237_GET_ROUTING(ph) \
((pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8237_CFG_PIR) \
& VIA8237_ROUTING_CNFG_MASK) >> VIA8237_ROUTING_CNFG_SHFT)
#define VIA8231_SET_ROUTING(ph, n) \
pci_conf_write((ph)->ph_pc, (ph)->ph_tag, VIA8231_CFG_PIR, \
(pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8231_CFG_PIR) \
& ~VIA8231_ROUTING_CNFG_MASK) | ((n) << VIA8231_ROUTING_CNFG_SHFT))
#define VIA8237_SET_ROUTING(ph, n) \
pci_conf_write((ph)->ph_pc, (ph)->ph_tag, VIA8237_CFG_PIR, \
(pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8237_CFG_PIR) \
& ~VIA8237_ROUTING_CNFG_MASK) | \
((n) << VIA8237_ROUTING_CNFG_SHFT) | VIA8237_TRIGGER_CNFG_ENA)
#define VIA8231_PIRQ_MASK 0xdefa
#define VIA8231_PIRQ_LEGAL(irq) \
((irq) >= 0 && (irq) <= 15 && ((1 << (irq)) & VIA8231_PIRQ_MASK))
#define VIA8231_LINK_MAX 3
#define VIA8237_LINK_MAX 7
#define VIA8231_LINK_LEGAL(link) \
((link) >= 0 && (link) <= VIA8231_LINK_MAX)
#define VIA8237_LINK_LEGAL(link) \
((link) >= 0 && (link) <= VIA8237_LINK_MAX)
#define VIA8231_TRIG_LEGAL(trig) \
((trig) == IST_LEVEL || (trig) == IST_EDGE)