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EPIT support as system clock for i.MX31

This commit is contained in:
bsh 2010-11-15 18:19:19 +00:00
parent d8a4fe3f5c
commit 3747b72bd6
3 changed files with 37 additions and 3 deletions
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10
sys/arch/arm/imx/files.imx31
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@ -1,4 +1,4 @@
# $NetBSD: files.imx31,v 1.5 2010/11/13 06:28:20 bsh Exp $
# $NetBSD: files.imx31,v 1.6 2010/11/15 18:19:19 bsh Exp $
#
# Configuration info for the Freescale i.MX31
#
@ -51,6 +51,14 @@ file arch/arm/imx/imx31_gpio.c imxgpio needs-flag
# iMX clock
file arch/arm/imx/imxclock.c
file arch/arm/imx/imx31_clock.c
# Clock Control Module
device imxccm
attach imxccm at aips
file arch/arm/imx/imx31_ccm.c imxccm needs-flag
defparam opt_imx31clk.h IMX31_IPGCLK_FREQ
# iMX UART
device imxuart

16
sys/arch/arm/imx/imx31_clock.c
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@ -1,4 +1,4 @@
/* $NetBSD: imx31_clock.c,v 1.1 2010/11/13 06:51:37 bsh Exp $ */
/* $NetBSD: imx31_clock.c,v 1.2 2010/11/15 18:19:19 bsh Exp $ */
/*
* Copyright (c) 2009,2010 Genetec corp. All rights reserved.
* Written by Hashimoto Kenichi for Genetec corp.
@ -45,8 +45,14 @@
#include <arm/imx/imx31reg.h>
#include <arm/imx/imx31var.h>
#if 0 /* notyet */
#include <arm/imx/imx31_ccmvar.h>
#endif
#include <arm/imx/imxclockvar.h>
#include <arm/imx/imxepitreg.h>
#include "imxccm.h" /* if CCM driver is configured into the kernel */
#include "opt_imx31clk.h"
static int imxclock_match(device_t, struct cfdata *, void *);
static void imxclock_attach(device_t, device_t, void *);
@ -105,10 +111,18 @@ imxclock_attach(device_t parent, device_t self, void *aux)
int
imxclock_get_timerfreq(struct imxclock_softc *sc)
{
#if NIMXCCM > 0
struct imx31_clocks clk;
imx31_get_clocks(&clk);
return clk.ipg_clk;
#else
#ifndef IMX31_IPGCLK_FREQ
#error IMX31_IPGCLK_FREQ need to be defined.
#endif
return IMX31_IPGCLK_FREQ;
#endif
}

14
sys/arch/arm/imx/imx31reg.h
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@ -1,4 +1,4 @@
/* $NetBSD: imx31reg.h,v 1.4 2010/11/13 06:44:11 bsh Exp $ */
/* $NetBSD: imx31reg.h,v 1.5 2010/11/15 18:19:19 bsh Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
* All rights reserved.
@ -58,6 +58,18 @@
#define GPIO3_BASE 0x53fa4000
/* register definitions in imxgpiore.h */
#define GPIO_NPINS 32
#define GPIO_NGROUPS 3
#define GPIO_NO_SCLK0 GPIO_NO(3, 2)
/* EPIT */
#define EPIT1_BASE 0x53f94000
#define EPIT2_BASE 0x53f98000
#define INTC_BASE 0x68000000
#define INTC_SIZE 0x0400
#define IMX31_INTCNTL 0x0000 /* Interrupt Control (RW) */