Use unsigned. Found by UBSan. OK'd by kamil.
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3b2a0061ea
commit
371f8c0bbf
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@ -1,4 +1,4 @@
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/* $NetBSD: if_wm.c,v 1.639 2019/05/28 08:59:35 msaitoh Exp $ */
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/* $NetBSD: if_wm.c,v 1.640 2019/06/07 04:39:15 msaitoh Exp $ */
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/*
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* Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
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@ -82,7 +82,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.639 2019/05/28 08:59:35 msaitoh Exp $");
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__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.640 2019/06/07 04:39:15 msaitoh Exp $");
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#ifdef _KERNEL_OPT
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#include "opt_net_mpsafe.h"
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@ -3541,9 +3541,9 @@ wm_set_ral(struct wm_softc *sc, const uint8_t *enaddr, int idx)
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int rv;
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if (enaddr != NULL) {
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ral_lo = enaddr[0] | (enaddr[1] << 8) | (enaddr[2] << 16) |
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(enaddr[3] << 24);
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ral_hi = enaddr[4] | (enaddr[5] << 8);
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ral_lo = (uint32_t)enaddr[0] | ((uint32_t)enaddr[1] << 8) |
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((uint32_t)enaddr[2] << 16) | ((uint32_t)enaddr[3] << 24);
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ral_hi = (uint32_t)enaddr[4] | ((uint32_t)enaddr[5] << 8);
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ral_hi |= RAL_AV;
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} else {
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ral_lo = 0;
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@ -5198,7 +5198,7 @@ wm_init_rss(struct wm_softc *sc)
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CTASSERT(sizeof(rss_key) == RSS_KEYSIZE);
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for (i = 0; i < RETA_NUM_ENTRIES; i++) {
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int qid, reta_ent;
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unsigned int qid, reta_ent;
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qid = i % sc->sc_nqueues;
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switch (sc->sc_type) {
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@ -5915,9 +5915,9 @@ wm_init_locked(struct ifnet *ifp)
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/* Set registers about MSI-X */
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if (wm_is_using_msix(sc)) {
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uint32_t ivar;
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uint32_t ivar, qintr_idx;
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struct wm_queue *wmq;
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int qid, qintr_idx;
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unsigned int qid;
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if (sc->sc_type == WM_T_82575) {
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/* Interrupt control */
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@ -1,4 +1,4 @@
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/* $NetBSD: if_wmreg.h,v 1.113 2019/02/28 16:56:35 khorben Exp $ */
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/* $NetBSD: if_wmreg.h,v 1.114 2019/06/07 04:39:15 msaitoh Exp $ */
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/*
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* Copyright (c) 2001 Wasabi Systems, Inc.
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@ -720,17 +720,17 @@ struct livengood_tcpip_ctxdesc {
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#define IVAR_VALID __BIT(7)
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/* IVAR definitions for 82580 and newer */
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#define WMREG_IVAR_Q(x) (WMREG_IVAR0 + ((x) / 2) * 4)
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#define IVAR_TX_MASK_Q(x) (0x000000ff << (((x) % 2) == 0 ? 8 : 24))
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#define IVAR_RX_MASK_Q(x) (0x000000ff << (((x) % 2) == 0 ? 0 : 16))
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#define IVAR_TX_MASK_Q(x) (0x000000ffUL << (((x) % 2) == 0 ? 8 : 24))
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#define IVAR_RX_MASK_Q(x) (0x000000ffUL << (((x) % 2) == 0 ? 0 : 16))
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/* IVAR definitions for 82576 */
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#define WMREG_IVAR_Q_82576(x) (WMREG_IVAR0 + ((x) & 0x7) * 4)
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#define IVAR_TX_MASK_Q_82576(x) (0x000000ff << (((x) / 8) == 0 ? 8 : 24))
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#define IVAR_RX_MASK_Q_82576(x) (0x000000ff << (((x) / 8) == 0 ? 0 : 16))
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#define IVAR_TX_MASK_Q_82576(x) (0x000000ffUL << (((x) / 8) == 0 ? 8 : 24))
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#define IVAR_RX_MASK_Q_82576(x) (0x000000ffUL << (((x) / 8) == 0 ? 0 : 16))
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/* IVAR definitions for 82574 */
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#define IVAR_ALLOC_MASK_82574 __BITS(0, 2)
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#define IVAR_VALID_82574 __BIT(3)
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#define IVAR_TX_MASK_Q_82574(x) (0x0000000f << ((x) == 0 ? 8 : 12))
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#define IVAR_RX_MASK_Q_82574(x) (0x0000000f << ((x) == 0 ? 0 : 4))
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#define IVAR_TX_MASK_Q_82574(x) (0x0000000fUL << ((x) == 0 ? 8 : 12))
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#define IVAR_RX_MASK_Q_82574(x) (0x0000000fUL << ((x) == 0 ? 0 : 4))
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#define IVAR_OTHER_MASK __BITS(16, 19)
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#define IVAR_INT_ON_ALL_WB __BIT(31)
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