Add dmb/dsb instructions as required by the armv7 arch man.
This commit is contained in:
parent
0e9330ed96
commit
36f83f6caf
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: atomic_add_32.S,v 1.2 2008/08/16 07:12:39 matt Exp $ */
|
||||
/* $NetBSD: atomic_add_32.S,v 1.3 2012/08/31 23:41:52 matt Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2008 The NetBSD Foundation, Inc.
|
||||
@ -40,6 +40,11 @@ ENTRY_NP(_atomic_add_32)
|
||||
strex ip, r2, [r3] /* try to store */
|
||||
cmp ip, #0 /* succeed? */
|
||||
bne 1b /* no, try again */
|
||||
#ifdef _ARM_ARCH_7
|
||||
dmb
|
||||
#else
|
||||
mcr p15, 0, ip, c7, c10, 5 /* data memory barrier */
|
||||
#endif
|
||||
RET /* return old value */
|
||||
END(_atomic_add_32)
|
||||
ATOMIC_OP_ALIAS(atomic_add_32,_atomic_add_32)
|
||||
@ -57,6 +62,11 @@ ENTRY_NP(_atomic_add_32_nv)
|
||||
strex r2, r0, [r3] /* try to store */
|
||||
cmp r2, #0 /* succeed? */
|
||||
bne 1b /* no, try again? */
|
||||
#ifdef _ARM_ARCH_7
|
||||
dmb
|
||||
#else
|
||||
mcr p15, 0, ip, c7, c10, 5 /* data memory barrier */
|
||||
#endif
|
||||
RET /* return new value */
|
||||
END(_atomic_add_32_nv)
|
||||
ATOMIC_OP_ALIAS(atomic_add_32_nv,_atomic_add_32_nv)
|
||||
|
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: atomic_and_32.S,v 1.2 2008/08/16 07:12:39 matt Exp $ */
|
||||
/* $NetBSD: atomic_and_32.S,v 1.3 2012/08/31 23:41:52 matt Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2008 The NetBSD Foundation, Inc.
|
||||
@ -40,6 +40,11 @@ ENTRY_NP(_atomic_and_32)
|
||||
strex ip, r2, [r3] /* try to store */
|
||||
cmp ip, #0 /* succeed? */
|
||||
bne 1b /* no, try again */
|
||||
#ifdef _ARM_ARCH_7
|
||||
dmb
|
||||
#else
|
||||
mcr p15, 0, ip, c7, c10, 5 /* data memory barrier */
|
||||
#endif
|
||||
RET /* return old value */
|
||||
END(_atomic_and_32)
|
||||
ATOMIC_OP_ALIAS(atomic_and_32,_atomic_and_32)
|
||||
@ -55,6 +60,11 @@ ENTRY_NP(_atomic_and_32_nv)
|
||||
strex r2, r0, [r3] /* try to store */
|
||||
cmp r2, #0 /* succeed? */
|
||||
bne 1b /* no, try again? */
|
||||
#ifdef _ARM_ARCH_7
|
||||
dmb
|
||||
#else
|
||||
mcr p15, 0, ip, c7, c10, 5 /* data memory barrier */
|
||||
#endif
|
||||
RET /* return new value */
|
||||
END(_atomic_and_32_nv)
|
||||
ATOMIC_OP_ALIAS(atomic_and_32_nv,_atomic_and_32_nv)
|
||||
|
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: atomic_cas_32.S,v 1.2 2008/08/16 07:12:39 matt Exp $ */
|
||||
/* $NetBSD: atomic_cas_32.S,v 1.3 2012/08/31 23:41:52 matt Exp $ */
|
||||
/*-
|
||||
* Copyright (c) 2008 The NetBSD Foundation, Inc.
|
||||
* All rights reserved.
|
||||
@ -44,15 +44,28 @@ ENTRY_NP(_atomic_cas_32)
|
||||
strex ip, r2, [r3] /* store new value */
|
||||
cmp ip, #0 /* succeed? */
|
||||
bne 1b /* nope, try again. */
|
||||
RET /* yes, return. */
|
||||
#ifdef _ARM_ARCH_7
|
||||
dsb
|
||||
#else
|
||||
mcr p15, 0, ip, c7, c10, 4 /* data synchronization barrier */
|
||||
#endif
|
||||
RET /* return. */
|
||||
END(_atomic_cas_32)
|
||||
|
||||
ATOMIC_OP_ALIAS(atomic_cas_32,_atomic_cas_32)
|
||||
ATOMIC_OP_ALIAS(atomic_cas_uint,_atomic_cas_32)
|
||||
ATOMIC_OP_ALIAS(atomic_cas_ulong,_atomic_cas_32)
|
||||
ATOMIC_OP_ALIAS(atomic_cas_ptr,_atomic_cas_32)
|
||||
ATOMIC_OP_ALIAS(atomic_cas_32_ni,_atomic_cas_32)
|
||||
ATOMIC_OP_ALIAS(atomic_cas_uint_ni,_atomic_cas_32)
|
||||
ATOMIC_OP_ALIAS(atomic_cas_ulong_ni,_atomic_cas_32)
|
||||
ATOMIC_OP_ALIAS(atomic_cas_ptr_ni,_atomic_cas_32)
|
||||
STRONG_ALIAS(_atomic_cas_uint,_atomic_cas_32)
|
||||
STRONG_ALIAS(_atomic_cas_ulong,_atomic_cas_32)
|
||||
STRONG_ALIAS(_atomic_cas_32_ni,_atomic_cas_32)
|
||||
STRONG_ALIAS(_atomic_cas_ptr_ni,_atomic_cas_32)
|
||||
STRONG_ALIAS(_atomic_cas_uint_ni,_atomic_cas_32)
|
||||
STRONG_ALIAS(_atomic_cas_ulong_ni,_atomic_cas_32)
|
||||
STRONG_ALIAS(_atomic_cas_ptr,_atomic_cas_32)
|
||||
|
||||
#endif /* _ARCH_ARM_6 */
|
||||
|
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: atomic_cas_8.S,v 1.2 2012/08/16 16:49:10 matt Exp $ */
|
||||
/* $NetBSD: atomic_cas_8.S,v 1.3 2012/08/31 23:41:52 matt Exp $ */
|
||||
/*-
|
||||
* Copyright (c) 2008 The NetBSD Foundation, Inc.
|
||||
* All rights reserved.
|
||||
@ -44,7 +44,12 @@ ENTRY_NP(_atomic_cas_8)
|
||||
strexb ip, r2, [r3] /* store new value */
|
||||
cmp ip, #0 /* succeed? */
|
||||
bne 1b /* nope, try again. */
|
||||
RET /* yes, return. */
|
||||
#ifdef _ARM_ARCH_7
|
||||
dsb /* data synchronization barrier */
|
||||
#else
|
||||
mcr p15, 0, ip, c7, c10, 4 /* data synchronization barrier */
|
||||
#endif
|
||||
RET /* return. */
|
||||
END(_atomic_cas_8)
|
||||
|
||||
ATOMIC_OP_ALIAS(atomic_cas_8,_atomic_cas_8)
|
||||
|
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: atomic_dec_32.S,v 1.2 2008/08/16 07:12:39 matt Exp $ */
|
||||
/* $NetBSD: atomic_dec_32.S,v 1.3 2012/08/31 23:41:52 matt Exp $ */
|
||||
/*-
|
||||
* Copyright (c) 2008 The NetBSD Foundation, Inc.
|
||||
* All rights reserved.
|
||||
@ -39,6 +39,11 @@ ENTRY_NP(_atomic_dec_32)
|
||||
strex r3, r1, [r2] /* try to store */
|
||||
cmp r3, #0 /* succeed? */
|
||||
bne 1b /* no, try again? */
|
||||
#ifdef _ARM_ARCH_7
|
||||
dmb
|
||||
#else
|
||||
mcr p15, 0, ip, c7, c10, 5 /* data memory barrier */
|
||||
#endif
|
||||
RET /* return new value */
|
||||
END(_atomic_dec_32)
|
||||
ATOMIC_OP_ALIAS(atomic_dec_32,_atomic_dec_32)
|
||||
@ -56,6 +61,11 @@ ENTRY_NP(_atomic_dec_32_nv)
|
||||
strex r1, r0, [r2] /* try to store */
|
||||
cmp r1, #0 /* succeed? */
|
||||
bne 1b /* no, try again? */
|
||||
#ifdef _ARM_ARCH_7
|
||||
dmb
|
||||
#else
|
||||
mcr p15, 0, ip, c7, c10, 5 /* data memory barrier */
|
||||
#endif
|
||||
RET /* return new value */
|
||||
END(_atomic_dec_32_nv)
|
||||
ATOMIC_OP_ALIAS(atomic_dec_32_nv,_atomic_dec_32_nv)
|
||||
|
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: atomic_inc_32.S,v 1.2 2008/08/16 07:12:39 matt Exp $ */
|
||||
/* $NetBSD: atomic_inc_32.S,v 1.3 2012/08/31 23:41:52 matt Exp $ */
|
||||
/*-
|
||||
* Copyright (c) 2008 The NetBSD Foundation, Inc.
|
||||
* All rights reserved.
|
||||
@ -39,6 +39,11 @@ ENTRY_NP(_atomic_inc_32)
|
||||
strex r3, r1, [r2] /* try to store */
|
||||
cmp r3, #0 /* succeed? */
|
||||
bne 1b /* no, try again? */
|
||||
#ifdef _ARM_ARCH_7
|
||||
dmb
|
||||
#else
|
||||
mcr p15, 0, ip, c7, c10, 5 /* data memory barrier */
|
||||
#endif
|
||||
RET /* return new value */
|
||||
END(_atomic_inc_32)
|
||||
ATOMIC_OP_ALIAS(atomic_inc_32,_atomic_inc_32)
|
||||
@ -56,6 +61,11 @@ ENTRY_NP(_atomic_inc_32_nv)
|
||||
strex r1, r0, [r2] /* try to store */
|
||||
cmp r1, #0 /* succeed? */
|
||||
bne 1b /* no, try again? */
|
||||
#ifdef _ARM_ARCH_7
|
||||
dmb
|
||||
#else
|
||||
mcr p15, 0, ip, c7, c10, 5 /* data memory barrier */
|
||||
#endif
|
||||
RET /* return new value */
|
||||
END(_atomic_inc_32_nv)
|
||||
ATOMIC_OP_ALIAS(atomic_inc_32_nv,_atomic_inc_32_nv)
|
||||
|
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: atomic_or_32.S,v 1.2 2008/08/16 07:12:39 matt Exp $ */
|
||||
/* $NetBSD: atomic_or_32.S,v 1.3 2012/08/31 23:41:52 matt Exp $ */
|
||||
/*-
|
||||
* Copyright (c) 2008 The NetBSD Foundation, Inc.
|
||||
* All rights reserved.
|
||||
@ -39,6 +39,11 @@ ENTRY_NP(_atomic_or_32)
|
||||
strex ip, r2, [r3] /* try to store */
|
||||
cmp ip, #0 /* succeed? */
|
||||
bne 1b /* no, try again */
|
||||
#ifdef _ARM_ARCH_7
|
||||
dmb
|
||||
#else
|
||||
mcr p15, 0, ip, c7, c10, 5 /* data memory barrier */
|
||||
#endif
|
||||
RET /* return old value */
|
||||
END(_atomic_or_32)
|
||||
ATOMIC_OP_ALIAS(atomic_or_32,_atomic_or_32)
|
||||
@ -54,6 +59,11 @@ ENTRY_NP(_atomic_or_32_nv)
|
||||
strex r2, r0, [r3] /* try to store */
|
||||
cmp r2, #0 /* succeed? */
|
||||
bne 1b /* no, try again? */
|
||||
#ifdef _ARM_ARCH_7
|
||||
dmb
|
||||
#else
|
||||
mcr p15, 0, ip, c7, c10, 5 /* data memory barrier */
|
||||
#endif
|
||||
RET /* return new value */
|
||||
END(_atomic_or_32_nv)
|
||||
ATOMIC_OP_ALIAS(atomic_or_32_nv,_atomic_or_32_nv)
|
||||
|
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: atomic_swap.S,v 1.3 2012/08/16 16:49:10 matt Exp $ */
|
||||
/* $NetBSD: atomic_swap.S,v 1.4 2012/08/31 23:41:52 matt Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2007,2012 The NetBSD Foundation, Inc.
|
||||
@ -49,13 +49,20 @@ ENTRY_NP(_atomic_swap_32)
|
||||
1:
|
||||
#ifdef _ARM_ARCH_6
|
||||
ldrex r0, [r2]
|
||||
strex r3, r1, [r2]
|
||||
cmp r0, r1
|
||||
strexne ip, r1, [r2]
|
||||
#else
|
||||
swp r0, r1, [r2]
|
||||
mov r3, #0
|
||||
cmp r0, r1
|
||||
movsne ip, #0
|
||||
#endif
|
||||
cmp r3, #0
|
||||
cmpne ip, #0
|
||||
bne 1b
|
||||
#ifdef _ARM_ARCH_7
|
||||
dmb
|
||||
#else
|
||||
mcr p15, 0, ip, c7, c10, 5 /* data memory barrier */
|
||||
#endif
|
||||
RET
|
||||
END(_atomic_swap_32)
|
||||
ATOMIC_OP_ALIAS(atomic_swap_32,_atomic_swap_32)
|
||||
@ -78,6 +85,11 @@ ENTRY_NP(_atomic_swap_8)
|
||||
#endif
|
||||
cmp r3, #0
|
||||
bne 1b
|
||||
#ifdef _ARM_ARCH_7
|
||||
dmb
|
||||
#else
|
||||
mcr p15, 0, ip, c7, c10, 5 /* data memory barrier */
|
||||
#endif
|
||||
RET
|
||||
END(_atomic_swap_8)
|
||||
ATOMIC_OP_ALIAS(atomic_swap_8,_atomic_swap_8)
|
||||
|
Loading…
Reference in New Issue
Block a user