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/* $NetBSD: bus.h,v 1.20 2009/03/14 14:45:55 dsl Exp $ */
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/*-
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* Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1996 Charles M. Hannum. All rights reserved.
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* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Christopher G. Demetriou
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* for the NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _ARM32_BUS_H_
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#define _ARM32_BUS_H_
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#if defined(_KERNEL_OPT)
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#include "opt_arm_bus_space.h"
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#endif
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/*
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* Addresses (in bus space).
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*/
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typedef u_long bus_addr_t;
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typedef u_long bus_size_t;
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/*
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* Access methods for bus space.
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*/
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typedef struct bus_space *bus_space_tag_t;
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typedef u_long bus_space_handle_t;
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/*
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* int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
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* bus_size_t size, int flags, bus_space_handle_t *bshp);
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*
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* Map a region of bus space.
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*/
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#define BUS_SPACE_MAP_CACHEABLE 0x01
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#define BUS_SPACE_MAP_LINEAR 0x02
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#define BUS_SPACE_MAP_PREFETCHABLE 0x04
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struct bus_space {
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/* cookie */
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void *bs_cookie;
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/* mapping/unmapping */
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int (*bs_map)(void *, bus_addr_t, bus_size_t,
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int, bus_space_handle_t *);
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void (*bs_unmap)(void *, bus_space_handle_t,
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bus_size_t);
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int (*bs_subregion)(void *, bus_space_handle_t,
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bus_size_t, bus_size_t, bus_space_handle_t *);
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/* allocation/deallocation */
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int (*bs_alloc)(void *, bus_addr_t, bus_addr_t,
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bus_size_t, bus_size_t, bus_size_t, int,
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bus_addr_t *, bus_space_handle_t *);
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void (*bs_free)(void *, bus_space_handle_t,
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bus_size_t);
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/* get kernel virtual address */
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void * (*bs_vaddr)(void *, bus_space_handle_t);
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/* mmap bus space for user */
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paddr_t (*bs_mmap)(void *, bus_addr_t, off_t, int, int);
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/* barrier */
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void (*bs_barrier)(void *, bus_space_handle_t,
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bus_size_t, bus_size_t, int);
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/* read (single) */
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u_int8_t (*bs_r_1)(void *, bus_space_handle_t,
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bus_size_t);
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u_int16_t (*bs_r_2)(void *, bus_space_handle_t,
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bus_size_t);
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u_int32_t (*bs_r_4)(void *, bus_space_handle_t,
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bus_size_t);
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u_int64_t (*bs_r_8)(void *, bus_space_handle_t,
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bus_size_t);
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/* read multiple */
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void (*bs_rm_1)(void *, bus_space_handle_t,
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bus_size_t, u_int8_t *, bus_size_t);
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void (*bs_rm_2)(void *, bus_space_handle_t,
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bus_size_t, u_int16_t *, bus_size_t);
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void (*bs_rm_4)(void *, bus_space_handle_t,
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bus_size_t, u_int32_t *, bus_size_t);
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void (*bs_rm_8)(void *, bus_space_handle_t,
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bus_size_t, u_int64_t *, bus_size_t);
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/* read region */
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void (*bs_rr_1)(void *, bus_space_handle_t,
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bus_size_t, u_int8_t *, bus_size_t);
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void (*bs_rr_2)(void *, bus_space_handle_t,
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bus_size_t, u_int16_t *, bus_size_t);
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void (*bs_rr_4)(void *, bus_space_handle_t,
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bus_size_t, u_int32_t *, bus_size_t);
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void (*bs_rr_8)(void *, bus_space_handle_t,
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bus_size_t, u_int64_t *, bus_size_t);
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/* write (single) */
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void (*bs_w_1)(void *, bus_space_handle_t,
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bus_size_t, u_int8_t);
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void (*bs_w_2)(void *, bus_space_handle_t,
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bus_size_t, u_int16_t);
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void (*bs_w_4)(void *, bus_space_handle_t,
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bus_size_t, u_int32_t);
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void (*bs_w_8)(void *, bus_space_handle_t,
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bus_size_t, u_int64_t);
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/* write multiple */
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void (*bs_wm_1)(void *, bus_space_handle_t,
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bus_size_t, const u_int8_t *, bus_size_t);
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void (*bs_wm_2)(void *, bus_space_handle_t,
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bus_size_t, const u_int16_t *, bus_size_t);
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void (*bs_wm_4)(void *, bus_space_handle_t,
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bus_size_t, const u_int32_t *, bus_size_t);
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void (*bs_wm_8)(void *, bus_space_handle_t,
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bus_size_t, const u_int64_t *, bus_size_t);
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/* write region */
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void (*bs_wr_1)(void *, bus_space_handle_t,
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bus_size_t, const u_int8_t *, bus_size_t);
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void (*bs_wr_2)(void *, bus_space_handle_t,
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bus_size_t, const u_int16_t *, bus_size_t);
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void (*bs_wr_4)(void *, bus_space_handle_t,
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bus_size_t, const u_int32_t *, bus_size_t);
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void (*bs_wr_8)(void *, bus_space_handle_t,
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bus_size_t, const u_int64_t *, bus_size_t);
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/* set multiple */
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void (*bs_sm_1)(void *, bus_space_handle_t,
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bus_size_t, u_int8_t, bus_size_t);
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void (*bs_sm_2)(void *, bus_space_handle_t,
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bus_size_t, u_int16_t, bus_size_t);
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void (*bs_sm_4)(void *, bus_space_handle_t,
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bus_size_t, u_int32_t, bus_size_t);
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void (*bs_sm_8)(void *, bus_space_handle_t,
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bus_size_t, u_int64_t, bus_size_t);
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/* set region */
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void (*bs_sr_1)(void *, bus_space_handle_t,
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bus_size_t, u_int8_t, bus_size_t);
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void (*bs_sr_2)(void *, bus_space_handle_t,
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bus_size_t, u_int16_t, bus_size_t);
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void (*bs_sr_4)(void *, bus_space_handle_t,
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bus_size_t, u_int32_t, bus_size_t);
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void (*bs_sr_8)(void *, bus_space_handle_t,
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bus_size_t, u_int64_t, bus_size_t);
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/* copy */
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void (*bs_c_1)(void *, bus_space_handle_t, bus_size_t,
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bus_space_handle_t, bus_size_t, bus_size_t);
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void (*bs_c_2)(void *, bus_space_handle_t, bus_size_t,
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bus_space_handle_t, bus_size_t, bus_size_t);
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void (*bs_c_4)(void *, bus_space_handle_t, bus_size_t,
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bus_space_handle_t, bus_size_t, bus_size_t);
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void (*bs_c_8)(void *, bus_space_handle_t, bus_size_t,
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bus_space_handle_t, bus_size_t, bus_size_t);
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#ifdef __BUS_SPACE_HAS_STREAM_METHODS
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/* read stream (single) */
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u_int8_t (*bs_r_1_s)(void *, bus_space_handle_t,
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bus_size_t);
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u_int16_t (*bs_r_2_s)(void *, bus_space_handle_t,
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bus_size_t);
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u_int32_t (*bs_r_4_s)(void *, bus_space_handle_t,
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bus_size_t);
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u_int64_t (*bs_r_8_s)(void *, bus_space_handle_t,
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bus_size_t);
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/* read multiple stream */
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void (*bs_rm_1_s)(void *, bus_space_handle_t,
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bus_size_t, u_int8_t *, bus_size_t);
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void (*bs_rm_2_s)(void *, bus_space_handle_t,
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bus_size_t, u_int16_t *, bus_size_t);
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void (*bs_rm_4_s)(void *, bus_space_handle_t,
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bus_size_t, u_int32_t *, bus_size_t);
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void (*bs_rm_8_s)(void *, bus_space_handle_t,
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bus_size_t, u_int64_t *, bus_size_t);
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/* read region stream */
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void (*bs_rr_1_s)(void *, bus_space_handle_t,
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bus_size_t, u_int8_t *, bus_size_t);
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void (*bs_rr_2_s)(void *, bus_space_handle_t,
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bus_size_t, u_int16_t *, bus_size_t);
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void (*bs_rr_4_s)(void *, bus_space_handle_t,
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bus_size_t, u_int32_t *, bus_size_t);
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void (*bs_rr_8_s)(void *, bus_space_handle_t,
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bus_size_t, u_int64_t *, bus_size_t);
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/* write stream (single) */
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void (*bs_w_1_s)(void *, bus_space_handle_t,
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bus_size_t, u_int8_t);
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void (*bs_w_2_s)(void *, bus_space_handle_t,
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bus_size_t, u_int16_t);
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void (*bs_w_4_s)(void *, bus_space_handle_t,
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bus_size_t, u_int32_t);
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void (*bs_w_8_s)(void *, bus_space_handle_t,
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bus_size_t, u_int64_t);
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/* write multiple stream */
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void (*bs_wm_1_s)(void *, bus_space_handle_t,
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bus_size_t, const u_int8_t *, bus_size_t);
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void (*bs_wm_2_s)(void *, bus_space_handle_t,
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bus_size_t, const u_int16_t *, bus_size_t);
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void (*bs_wm_4_s)(void *, bus_space_handle_t,
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bus_size_t, const u_int32_t *, bus_size_t);
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void (*bs_wm_8_s)(void *, bus_space_handle_t,
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bus_size_t, const u_int64_t *, bus_size_t);
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/* write region stream */
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void (*bs_wr_1_s)(void *, bus_space_handle_t,
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bus_size_t, const u_int8_t *, bus_size_t);
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void (*bs_wr_2_s)(void *, bus_space_handle_t,
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bus_size_t, const u_int16_t *, bus_size_t);
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void (*bs_wr_4_s)(void *, bus_space_handle_t,
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bus_size_t, const u_int32_t *, bus_size_t);
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void (*bs_wr_8_s)(void *, bus_space_handle_t,
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bus_size_t, const u_int64_t *, bus_size_t);
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#endif /* __BUS_SPACE_HAS_STREAM_METHODS */
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};
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/*
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* Utility macros; INTERNAL USE ONLY.
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*/
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#define __bs_c(a,b) __CONCAT(a,b)
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#define __bs_opname(op,size) __bs_c(__bs_c(__bs_c(bs_,op),_),size)
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#define __bs_rs(sz, t, h, o) \
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(*(t)->__bs_opname(r,sz))((t)->bs_cookie, h, o)
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#define __bs_ws(sz, t, h, o, v) \
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(*(t)->__bs_opname(w,sz))((t)->bs_cookie, h, o, v)
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#define __bs_nonsingle(type, sz, t, h, o, a, c) \
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(*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, a, c)
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#define __bs_set(type, sz, t, h, o, v, c) \
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(*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, v, c)
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#define __bs_copy(sz, t, h1, o1, h2, o2, cnt) \
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(*(t)->__bs_opname(c,sz))((t)->bs_cookie, h1, o1, h2, o2, cnt)
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#ifdef __BUS_SPACE_HAS_STREAM_METHODS
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#define __bs_opname_s(op,size) __bs_c(__bs_c(__bs_c(__bs_c(bs_,op),_),size),_s)
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#define __bs_rs_s(sz, t, h, o) \
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(*(t)->__bs_opname_s(r,sz))((t)->bs_cookie, h, o)
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#define __bs_ws_s(sz, t, h, o, v) \
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(*(t)->__bs_opname_s(w,sz))((t)->bs_cookie, h, o, v)
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#define __bs_nonsingle_s(type, sz, t, h, o, a, c) \
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(*(t)->__bs_opname_s(type,sz))((t)->bs_cookie, h, o, a, c)
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#define __bs_set_s(type, sz, t, h, o, v, c) \
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(*(t)->__bs_opname_s(type,sz))((t)->bs_cookie, h, o, v, c)
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#define __bs_copy_s(sz, t, h1, o1, h2, o2, cnt) \
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(*(t)->__bs_opname_s(c,sz))((t)->bs_cookie, h1, o1, h2, o2, cnt)
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#endif
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/*
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* Mapping and unmapping operations.
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*/
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#define bus_space_map(t, a, s, c, hp) \
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(*(t)->bs_map)((t)->bs_cookie, (a), (s), (c), (hp))
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#define bus_space_unmap(t, h, s) \
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(*(t)->bs_unmap)((t)->bs_cookie, (h), (s))
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#define bus_space_subregion(t, h, o, s, hp) \
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(*(t)->bs_subregion)((t)->bs_cookie, (h), (o), (s), (hp))
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/*
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* Allocation and deallocation operations.
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*/
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#define bus_space_alloc(t, rs, re, s, a, b, c, ap, hp) \
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(*(t)->bs_alloc)((t)->bs_cookie, (rs), (re), (s), (a), (b), \
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(c), (ap), (hp))
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#define bus_space_free(t, h, s) \
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(*(t)->bs_free)((t)->bs_cookie, (h), (s))
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/*
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* Get kernel virtual address for ranges mapped BUS_SPACE_MAP_LINEAR.
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*/
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#define bus_space_vaddr(t, h) \
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(*(t)->bs_vaddr)((t)->bs_cookie, (h))
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/*
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* MMap bus space for a user application.
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*/
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#define bus_space_mmap(t, a, o, p, f) \
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(*(t)->bs_mmap)((t)->bs_cookie, (a), (o), (p), (f))
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/*
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* Bus barrier operations.
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*/
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#define bus_space_barrier(t, h, o, l, f) \
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(*(t)->bs_barrier)((t)->bs_cookie, (h), (o), (l), (f))
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#define BUS_SPACE_BARRIER_READ 0x01
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#define BUS_SPACE_BARRIER_WRITE 0x02
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/*
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* Bus read (single) operations.
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*/
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#define bus_space_read_1(t, h, o) __bs_rs(1,(t),(h),(o))
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#define bus_space_read_2(t, h, o) __bs_rs(2,(t),(h),(o))
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#define bus_space_read_4(t, h, o) __bs_rs(4,(t),(h),(o))
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#define bus_space_read_8(t, h, o) __bs_rs(8,(t),(h),(o))
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#ifdef __BUS_SPACE_HAS_STREAM_METHODS
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#define bus_space_read_stream_1(t, h, o) __bs_rs_s(1,(t),(h),(o))
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#define bus_space_read_stream_2(t, h, o) __bs_rs_s(2,(t),(h),(o))
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#define bus_space_read_stream_4(t, h, o) __bs_rs_s(4,(t),(h),(o))
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#define bus_space_read_stream_8(t, h, o) __bs_rs_s(8,(t),(h),(o))
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#endif
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/*
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* Bus read multiple operations.
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*/
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#define bus_space_read_multi_1(t, h, o, a, c) \
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__bs_nonsingle(rm,1,(t),(h),(o),(a),(c))
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#define bus_space_read_multi_2(t, h, o, a, c) \
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__bs_nonsingle(rm,2,(t),(h),(o),(a),(c))
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#define bus_space_read_multi_4(t, h, o, a, c) \
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__bs_nonsingle(rm,4,(t),(h),(o),(a),(c))
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#define bus_space_read_multi_8(t, h, o, a, c) \
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__bs_nonsingle(rm,8,(t),(h),(o),(a),(c))
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#ifdef __BUS_SPACE_HAS_STREAM_METHODS
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#define bus_space_read_multi_stream_1(t, h, o, a, c) \
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__bs_nonsingle_s(rm,1,(t),(h),(o),(a),(c))
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#define bus_space_read_multi_stream_2(t, h, o, a, c) \
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__bs_nonsingle_s(rm,2,(t),(h),(o),(a),(c))
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#define bus_space_read_multi_stream_4(t, h, o, a, c) \
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__bs_nonsingle_s(rm,4,(t),(h),(o),(a),(c))
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#define bus_space_read_multi_stream_8(t, h, o, a, c) \
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__bs_nonsingle_s(rm,8,(t),(h),(o),(a),(c))
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#endif
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/*
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* Bus read region operations.
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*/
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#define bus_space_read_region_1(t, h, o, a, c) \
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__bs_nonsingle(rr,1,(t),(h),(o),(a),(c))
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#define bus_space_read_region_2(t, h, o, a, c) \
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__bs_nonsingle(rr,2,(t),(h),(o),(a),(c))
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#define bus_space_read_region_4(t, h, o, a, c) \
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__bs_nonsingle(rr,4,(t),(h),(o),(a),(c))
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#define bus_space_read_region_8(t, h, o, a, c) \
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__bs_nonsingle(rr,8,(t),(h),(o),(a),(c))
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#ifdef __BUS_SPACE_HAS_STREAM_METHODS
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#define bus_space_read_region_stream_1(t, h, o, a, c) \
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__bs_nonsingle_s(rr,1,(t),(h),(o),(a),(c))
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#define bus_space_read_region_stream_2(t, h, o, a, c) \
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__bs_nonsingle_s(rr,2,(t),(h),(o),(a),(c))
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#define bus_space_read_region_stream_4(t, h, o, a, c) \
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__bs_nonsingle_s(rr,4,(t),(h),(o),(a),(c))
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#define bus_space_read_region_stream_8(t, h, o, a, c) \
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__bs_nonsingle_s(rr,8,(t),(h),(o),(a),(c))
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#endif
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/*
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|
|
* Bus write (single) operations.
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*/
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|
#define bus_space_write_1(t, h, o, v) __bs_ws(1,(t),(h),(o),(v))
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#define bus_space_write_2(t, h, o, v) __bs_ws(2,(t),(h),(o),(v))
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#define bus_space_write_4(t, h, o, v) __bs_ws(4,(t),(h),(o),(v))
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#define bus_space_write_8(t, h, o, v) __bs_ws(8,(t),(h),(o),(v))
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|
|
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
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|
#define bus_space_write_stream_1(t, h, o, v) __bs_ws_s(1,(t),(h),(o),(v))
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#define bus_space_write_stream_2(t, h, o, v) __bs_ws_s(2,(t),(h),(o),(v))
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#define bus_space_write_stream_4(t, h, o, v) __bs_ws_s(4,(t),(h),(o),(v))
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|
#define bus_space_write_stream_8(t, h, o, v) __bs_ws_s(8,(t),(h),(o),(v))
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#endif
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|
|
/*
|
|
|
|
|
* Bus write multiple operations.
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*/
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|
|
#define bus_space_write_multi_1(t, h, o, a, c) \
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__bs_nonsingle(wm,1,(t),(h),(o),(a),(c))
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#define bus_space_write_multi_2(t, h, o, a, c) \
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__bs_nonsingle(wm,2,(t),(h),(o),(a),(c))
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#define bus_space_write_multi_4(t, h, o, a, c) \
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__bs_nonsingle(wm,4,(t),(h),(o),(a),(c))
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#define bus_space_write_multi_8(t, h, o, a, c) \
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__bs_nonsingle(wm,8,(t),(h),(o),(a),(c))
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|
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
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|
#define bus_space_write_multi_stream_1(t, h, o, a, c) \
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__bs_nonsingle_s(wm,1,(t),(h),(o),(a),(c))
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#define bus_space_write_multi_stream_2(t, h, o, a, c) \
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__bs_nonsingle_s(wm,2,(t),(h),(o),(a),(c))
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#define bus_space_write_multi_stream_4(t, h, o, a, c) \
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__bs_nonsingle_s(wm,4,(t),(h),(o),(a),(c))
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#define bus_space_write_multi_stream_8(t, h, o, a, c) \
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__bs_nonsingle_s(wm,8,(t),(h),(o),(a),(c))
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#endif
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|
|
/*
|
|
|
|
|
* Bus write region operations.
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*/
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|
#define bus_space_write_region_1(t, h, o, a, c) \
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__bs_nonsingle(wr,1,(t),(h),(o),(a),(c))
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#define bus_space_write_region_2(t, h, o, a, c) \
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__bs_nonsingle(wr,2,(t),(h),(o),(a),(c))
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#define bus_space_write_region_4(t, h, o, a, c) \
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__bs_nonsingle(wr,4,(t),(h),(o),(a),(c))
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#define bus_space_write_region_8(t, h, o, a, c) \
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__bs_nonsingle(wr,8,(t),(h),(o),(a),(c))
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|
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
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|
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|
#define bus_space_write_region_stream_1(t, h, o, a, c) \
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__bs_nonsingle_s(wr,1,(t),(h),(o),(a),(c))
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#define bus_space_write_region_stream_2(t, h, o, a, c) \
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__bs_nonsingle_s(wr,2,(t),(h),(o),(a),(c))
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#define bus_space_write_region_stream_4(t, h, o, a, c) \
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__bs_nonsingle_s(wr,4,(t),(h),(o),(a),(c))
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#define bus_space_write_region_stream_8(t, h, o, a, c) \
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__bs_nonsingle_s(wr,8,(t),(h),(o),(a),(c))
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#endif
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|
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/*
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|
|
|
|
* Set multiple operations.
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*/
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|
#define bus_space_set_multi_1(t, h, o, v, c) \
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__bs_set(sm,1,(t),(h),(o),(v),(c))
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#define bus_space_set_multi_2(t, h, o, v, c) \
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__bs_set(sm,2,(t),(h),(o),(v),(c))
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|
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|
#define bus_space_set_multi_4(t, h, o, v, c) \
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|
__bs_set(sm,4,(t),(h),(o),(v),(c))
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|
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|
#define bus_space_set_multi_8(t, h, o, v, c) \
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__bs_set(sm,8,(t),(h),(o),(v),(c))
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|
|
|
|
/*
|
|
|
|
|
* Set region operations.
|
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|
|
|
*/
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|
|
|
#define bus_space_set_region_1(t, h, o, v, c) \
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|
|
|
__bs_set(sr,1,(t),(h),(o),(v),(c))
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|
|
|
#define bus_space_set_region_2(t, h, o, v, c) \
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|
|
|
__bs_set(sr,2,(t),(h),(o),(v),(c))
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|
|
|
#define bus_space_set_region_4(t, h, o, v, c) \
|
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|
|
|
__bs_set(sr,4,(t),(h),(o),(v),(c))
|
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|
|
|
#define bus_space_set_region_8(t, h, o, v, c) \
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|
|
|
__bs_set(sr,8,(t),(h),(o),(v),(c))
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|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Copy operations.
|
|
|
|
|
*/
|
|
|
|
|
#define bus_space_copy_region_1(t, h1, o1, h2, o2, c) \
|
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|
|
|
__bs_copy(1, t, h1, o1, h2, o2, c)
|
|
|
|
|
#define bus_space_copy_region_2(t, h1, o1, h2, o2, c) \
|
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|
|
|
__bs_copy(2, t, h1, o1, h2, o2, c)
|
|
|
|
|
#define bus_space_copy_region_4(t, h1, o1, h2, o2, c) \
|
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|
|
|
__bs_copy(4, t, h1, o1, h2, o2, c)
|
|
|
|
|
#define bus_space_copy_region_8(t, h1, o1, h2, o2, c) \
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|
|
__bs_copy(8, t, h1, o1, h2, o2, c)
|
|
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|
|
|
|
|
|
|
/*
|
|
|
|
|
* Macros to provide prototypes for all the functions used in the
|
|
|
|
|
* bus_space structure
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
#define bs_map_proto(f) \
|
|
|
|
|
int __bs_c(f,_bs_map)(void *t, bus_addr_t addr, \
|
|
|
|
|
bus_size_t size, int cacheable, bus_space_handle_t *bshp);
|
|
|
|
|
|
|
|
|
|
#define bs_unmap_proto(f) \
|
|
|
|
|
void __bs_c(f,_bs_unmap)(void *t, bus_space_handle_t bsh, \
|
|
|
|
|
bus_size_t size);
|
|
|
|
|
|
|
|
|
|
#define bs_subregion_proto(f) \
|
|
|
|
|
int __bs_c(f,_bs_subregion)(void *t, bus_space_handle_t bsh, \
|
|
|
|
|
bus_size_t offset, bus_size_t size, \
|
|
|
|
|
bus_space_handle_t *nbshp);
|
|
|
|
|
|
|
|
|
|
#define bs_alloc_proto(f) \
|
|
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|
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int __bs_c(f,_bs_alloc)(void *t, bus_addr_t rstart, \
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bus_addr_t rend, bus_size_t size, bus_size_t align, \
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bus_size_t boundary, int cacheable, bus_addr_t *addrp, \
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bus_space_handle_t *bshp);
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#define bs_free_proto(f) \
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void __bs_c(f,_bs_free)(void *t, bus_space_handle_t bsh, \
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bus_size_t size);
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#define bs_vaddr_proto(f) \
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void * __bs_c(f,_bs_vaddr)(void *t, bus_space_handle_t bsh);
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#define bs_mmap_proto(f) \
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paddr_t __bs_c(f,_bs_mmap)(void *, bus_addr_t, off_t, int, int);
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#define bs_barrier_proto(f) \
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void __bs_c(f,_bs_barrier)(void *t, bus_space_handle_t bsh, \
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bus_size_t offset, bus_size_t len, int flags);
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#define bs_r_1_proto(f) \
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u_int8_t __bs_c(f,_bs_r_1)(void *t, bus_space_handle_t bsh, \
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bus_size_t offset);
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#define bs_r_2_proto(f) \
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u_int16_t __bs_c(f,_bs_r_2)(void *t, bus_space_handle_t bsh, \
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bus_size_t offset);
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#define bs_r_4_proto(f) \
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u_int32_t __bs_c(f,_bs_r_4)(void *t, bus_space_handle_t bsh, \
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bus_size_t offset);
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#define bs_r_8_proto(f) \
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u_int64_t __bs_c(f,_bs_r_8)(void *t, bus_space_handle_t bsh, \
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bus_size_t offset);
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#define bs_w_1_proto(f) \
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void __bs_c(f,_bs_w_1)(void *t, bus_space_handle_t bsh, \
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bus_size_t offset, u_int8_t value);
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#define bs_w_2_proto(f) \
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void __bs_c(f,_bs_w_2)(void *t, bus_space_handle_t bsh, \
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bus_size_t offset, u_int16_t value);
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#define bs_w_4_proto(f) \
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void __bs_c(f,_bs_w_4)(void *t, bus_space_handle_t bsh, \
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bus_size_t offset, u_int32_t value);
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#define bs_w_8_proto(f) \
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void __bs_c(f,_bs_w_8)(void *t, bus_space_handle_t bsh, \
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bus_size_t offset, u_int64_t value);
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#define bs_rm_1_proto(f) \
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void __bs_c(f,_bs_rm_1)(void *t, bus_space_handle_t bsh, \
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bus_size_t offset, u_int8_t *addr, bus_size_t count);
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#define bs_rm_2_proto(f) \
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void __bs_c(f,_bs_rm_2)(void *t, bus_space_handle_t bsh, \
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|
bus_size_t offset, u_int16_t *addr, bus_size_t count);
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#define bs_rm_4_proto(f) \
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void __bs_c(f,_bs_rm_4)(void *t, bus_space_handle_t bsh, \
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|
bus_size_t offset, u_int32_t *addr, bus_size_t count);
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#define bs_rm_8_proto(f) \
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void __bs_c(f,_bs_rm_8)(void *t, bus_space_handle_t bsh, \
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|
bus_size_t offset, u_int64_t *addr, bus_size_t count);
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#define bs_wm_1_proto(f) \
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|
void __bs_c(f,_bs_wm_1)(void *t, bus_space_handle_t bsh, \
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|
bus_size_t offset, const u_int8_t *addr, bus_size_t count);
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#define bs_wm_2_proto(f) \
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void __bs_c(f,_bs_wm_2)(void *t, bus_space_handle_t bsh, \
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|
bus_size_t offset, const u_int16_t *addr, bus_size_t count);
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#define bs_wm_4_proto(f) \
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void __bs_c(f,_bs_wm_4)(void *t, bus_space_handle_t bsh, \
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|
bus_size_t offset, const u_int32_t *addr, bus_size_t count);
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#define bs_wm_8_proto(f) \
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void __bs_c(f,_bs_wm_8)(void *t, bus_space_handle_t bsh, \
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|
bus_size_t offset, const u_int64_t *addr, bus_size_t count);
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#define bs_rr_1_proto(f) \
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void __bs_c(f, _bs_rr_1)(void *t, bus_space_handle_t bsh, \
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|
bus_size_t offset, u_int8_t *addr, bus_size_t count);
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#define bs_rr_2_proto(f) \
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|
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void __bs_c(f, _bs_rr_2)(void *t, bus_space_handle_t bsh, \
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|
|
bus_size_t offset, u_int16_t *addr, bus_size_t count);
|
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|
|
#define bs_rr_4_proto(f) \
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|
|
void __bs_c(f, _bs_rr_4)(void *t, bus_space_handle_t bsh, \
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|
|
bus_size_t offset, u_int32_t *addr, bus_size_t count);
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|
|
#define bs_rr_8_proto(f) \
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|
void __bs_c(f, _bs_rr_8)(void *t, bus_space_handle_t bsh, \
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|
|
bus_size_t offset, u_int64_t *addr, bus_size_t count);
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|
|
#define bs_wr_1_proto(f) \
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|
|
void __bs_c(f, _bs_wr_1)(void *t, bus_space_handle_t bsh, \
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|
|
bus_size_t offset, const u_int8_t *addr, bus_size_t count);
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|
|
#define bs_wr_2_proto(f) \
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|
|
void __bs_c(f, _bs_wr_2)(void *t, bus_space_handle_t bsh, \
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|
|
bus_size_t offset, const u_int16_t *addr, bus_size_t count);
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|
|
#define bs_wr_4_proto(f) \
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|
|
void __bs_c(f, _bs_wr_4)(void *t, bus_space_handle_t bsh, \
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|
|
bus_size_t offset, const u_int32_t *addr, bus_size_t count);
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|
|
#define bs_wr_8_proto(f) \
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|
|
void __bs_c(f, _bs_wr_8)(void *t, bus_space_handle_t bsh, \
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|
|
bus_size_t offset, const u_int64_t *addr, bus_size_t count);
|
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|
|
#define bs_sm_1_proto(f) \
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|
|
void __bs_c(f,_bs_sm_1)(void *t, bus_space_handle_t bsh, \
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|
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|
|
bus_size_t offset, u_int8_t value, bus_size_t count);
|
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|
|
#define bs_sm_2_proto(f) \
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|
|
void __bs_c(f,_bs_sm_2)(void *t, bus_space_handle_t bsh, \
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|
|
bus_size_t offset, u_int16_t value, bus_size_t count);
|
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|
|
#define bs_sm_4_proto(f) \
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|
|
void __bs_c(f,_bs_sm_4)(void *t, bus_space_handle_t bsh, \
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|
|
|
|
bus_size_t offset, u_int32_t value, bus_size_t count);
|
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|
|
|
|
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|
|
#define bs_sm_8_proto(f) \
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|
|
void __bs_c(f,_bs_sm_8)(void *t, bus_space_handle_t bsh, \
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|
|
|
|
bus_size_t offset, u_int64_t value, bus_size_t count);
|
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|
|
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|
|
|
|
|
#define bs_sr_1_proto(f) \
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|
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|
|
void __bs_c(f,_bs_sr_1)(void *t, bus_space_handle_t bsh, \
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|
|
|
|
bus_size_t offset, u_int8_t value, bus_size_t count);
|
|
|
|
|
|
|
|
|
|
#define bs_sr_2_proto(f) \
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|
|
|
|
void __bs_c(f,_bs_sr_2)(void *t, bus_space_handle_t bsh, \
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|
|
|
|
bus_size_t offset, u_int16_t value, bus_size_t count);
|
|
|
|
|
|
|
|
|
|
#define bs_sr_4_proto(f) \
|
|
|
|
|
void __bs_c(f,_bs_sr_4)(void *t, bus_space_handle_t bsh, \
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|
|
|
|
bus_size_t offset, u_int32_t value, bus_size_t count);
|
|
|
|
|
|
|
|
|
|
#define bs_sr_8_proto(f) \
|
|
|
|
|
void __bs_c(f,_bs_sr_8)(void *t, bus_space_handle_t bsh, \
|
|
|
|
|
bus_size_t offset, u_int64_t value, bus_size_t count);
|
|
|
|
|
|
|
|
|
|
#define bs_c_1_proto(f) \
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|
|
|
|
void __bs_c(f,_bs_c_1)(void *t, bus_space_handle_t bsh1, \
|
|
|
|
|
bus_size_t offset1, bus_space_handle_t bsh2, \
|
|
|
|
|
bus_size_t offset2, bus_size_t count);
|
|
|
|
|
|
|
|
|
|
#define bs_c_2_proto(f) \
|
|
|
|
|
void __bs_c(f,_bs_c_2)(void *t, bus_space_handle_t bsh1, \
|
|
|
|
|
bus_size_t offset1, bus_space_handle_t bsh2, \
|
|
|
|
|
bus_size_t offset2, bus_size_t count);
|
|
|
|
|
|
|
|
|
|
#define bs_c_4_proto(f) \
|
|
|
|
|
void __bs_c(f,_bs_c_4)(void *t, bus_space_handle_t bsh1, \
|
|
|
|
|
bus_size_t offset1, bus_space_handle_t bsh2, \
|
|
|
|
|
bus_size_t offset2, bus_size_t count);
|
|
|
|
|
|
|
|
|
|
#define bs_c_8_proto(f) \
|
|
|
|
|
void __bs_c(f,_bs_c_8)(void *t, bus_space_handle_t bsh1, \
|
|
|
|
|
bus_size_t offset1, bus_space_handle_t bsh2, \
|
|
|
|
|
bus_size_t offset2, bus_size_t count);
|
|
|
|
|
|
|
|
|
|
#define bs_protos(f) \
|
|
|
|
|
bs_map_proto(f); \
|
|
|
|
|
bs_unmap_proto(f); \
|
|
|
|
|
bs_subregion_proto(f); \
|
|
|
|
|
bs_alloc_proto(f); \
|
|
|
|
|
bs_free_proto(f); \
|
|
|
|
|
bs_vaddr_proto(f); \
|
|
|
|
|
bs_mmap_proto(f); \
|
|
|
|
|
bs_barrier_proto(f); \
|
|
|
|
|
bs_r_1_proto(f); \
|
|
|
|
|
bs_r_2_proto(f); \
|
|
|
|
|
bs_r_4_proto(f); \
|
|
|
|
|
bs_r_8_proto(f); \
|
|
|
|
|
bs_w_1_proto(f); \
|
|
|
|
|
bs_w_2_proto(f); \
|
|
|
|
|
bs_w_4_proto(f); \
|
|
|
|
|
bs_w_8_proto(f); \
|
|
|
|
|
bs_rm_1_proto(f); \
|
|
|
|
|
bs_rm_2_proto(f); \
|
|
|
|
|
bs_rm_4_proto(f); \
|
|
|
|
|
bs_rm_8_proto(f); \
|
|
|
|
|
bs_wm_1_proto(f); \
|
|
|
|
|
bs_wm_2_proto(f); \
|
|
|
|
|
bs_wm_4_proto(f); \
|
|
|
|
|
bs_wm_8_proto(f); \
|
|
|
|
|
bs_rr_1_proto(f); \
|
|
|
|
|
bs_rr_2_proto(f); \
|
|
|
|
|
bs_rr_4_proto(f); \
|
|
|
|
|
bs_rr_8_proto(f); \
|
|
|
|
|
bs_wr_1_proto(f); \
|
|
|
|
|
bs_wr_2_proto(f); \
|
|
|
|
|
bs_wr_4_proto(f); \
|
|
|
|
|
bs_wr_8_proto(f); \
|
|
|
|
|
bs_sm_1_proto(f); \
|
|
|
|
|
bs_sm_2_proto(f); \
|
|
|
|
|
bs_sm_4_proto(f); \
|
|
|
|
|
bs_sm_8_proto(f); \
|
|
|
|
|
bs_sr_1_proto(f); \
|
|
|
|
|
bs_sr_2_proto(f); \
|
|
|
|
|
bs_sr_4_proto(f); \
|
|
|
|
|
bs_sr_8_proto(f); \
|
|
|
|
|
bs_c_1_proto(f); \
|
|
|
|
|
bs_c_2_proto(f); \
|
|
|
|
|
bs_c_4_proto(f); \
|
|
|
|
|
bs_c_8_proto(f);
|
|
|
|
|
|
|
|
|
|
#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
|
|
|
|
|
|
|
|
|
|
/* Bus Space DMA macros */
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Flags used in various bus DMA methods.
|
|
|
|
|
*/
|
|
|
|
|
#define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */
|
|
|
|
|
#define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */
|
|
|
|
|
#define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */
|
|
|
|
|
#define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */
|
|
|
|
|
#define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */
|
|
|
|
|
#define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */
|
|
|
|
|
#define BUS_DMA_BUS2 0x020
|
|
|
|
|
#define BUS_DMA_BUS3 0x040
|
|
|
|
|
#define BUS_DMA_BUS4 0x080
|
|
|
|
|
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
|
|
|
|
|
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
|
|
|
|
|
#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Private flags stored in the DMA map.
|
|
|
|
|
*/
|
|
|
|
|
#define ARM32_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */
|
|
|
|
|
|
|
|
|
|
/* Forwards needed by prototypes below. */
|
|
|
|
|
struct mbuf;
|
|
|
|
|
struct uio;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Operations performed by bus_dmamap_sync().
|
|
|
|
|
*/
|
|
|
|
|
#define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
|
|
|
|
|
#define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
|
|
|
|
|
#define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
|
|
|
|
|
#define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
|
|
|
|
|
|
|
|
|
|
typedef struct arm32_bus_dma_tag *bus_dma_tag_t;
|
|
|
|
|
typedef struct arm32_bus_dmamap *bus_dmamap_t;
|
|
|
|
|
|
|
|
|
|
#define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0)
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* bus_dma_segment_t
|
|
|
|
|
*
|
|
|
|
|
* Describes a single contiguous DMA transaction. Values
|
|
|
|
|
* are suitable for programming into DMA registers.
|
|
|
|
|
*/
|
|
|
|
|
struct arm32_bus_dma_segment {
|
|
|
|
|
/*
|
|
|
|
|
* PUBLIC MEMBERS: these are used by machine-independent code.
|
|
|
|
|
*/
|
|
|
|
|
bus_addr_t ds_addr; /* DMA address */
|
|
|
|
|
bus_size_t ds_len; /* length of transfer */
|
|
|
|
|
};
|
|
|
|
|
typedef struct arm32_bus_dma_segment bus_dma_segment_t;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* arm32_dma_range
|
|
|
|
|
*
|
|
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|
* This structure describes a valid DMA range.
|
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|
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|
*/
|
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|
|
struct arm32_dma_range {
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|
|
bus_addr_t dr_sysbase; /* system base address */
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|
bus_addr_t dr_busbase; /* appears here on bus */
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|
bus_size_t dr_len; /* length of range */
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|
|
};
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|
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|
|
/*
|
|
|
|
|
* bus_dma_tag_t
|
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|
|
|
*
|
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|
|
|
* A machine-dependent opaque type describing the implementation of
|
|
|
|
|
* DMA for a given bus.
|
|
|
|
|
*/
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|
struct arm32_bus_dma_tag {
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|
|
|
/*
|
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|
|
|
* DMA range for this tag. If the page doesn't fall within
|
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|
|
|
* one of these ranges, an error is returned. The caller
|
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|
|
|
* may then decide what to do with the transfer. If the
|
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|
|
|
* range pointer is NULL, it is ignored.
|
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|
|
|
*/
|
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|
|
struct arm32_dma_range *_ranges;
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|
|
int _nranges;
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|
|
/*
|
|
|
|
|
* Opaque cookie for use by back-end.
|
|
|
|
|
*/
|
|
|
|
|
void *_cookie;
|
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|
|
|
|
|
|
|
/*
|
|
|
|
|
* DMA mapping methods.
|
|
|
|
|
*/
|
|
|
|
|
int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
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|
|
|
bus_size_t, bus_size_t, int, bus_dmamap_t *);
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|
|
|
void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
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|
int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
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|
|
|
bus_size_t, struct proc *, int);
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|
|
|
int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
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|
|
|
struct mbuf *, int);
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|
|
int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
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|
|
|
struct uio *, int);
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|
|
int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
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|
|
|
bus_dma_segment_t *, int, bus_size_t, int);
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|
|
|
void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
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|
void (*_dmamap_sync_pre)(bus_dma_tag_t, bus_dmamap_t,
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|
|
|
bus_addr_t, bus_size_t, int);
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|
|
|
void (*_dmamap_sync_post)(bus_dma_tag_t, bus_dmamap_t,
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|
|
|
bus_addr_t, bus_size_t, int);
|
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|
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|
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|
|
/*
|
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|
|
|
* DMA memory utility functions.
|
|
|
|
|
*/
|
|
|
|
|
int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
|
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|
|
|
bus_size_t, bus_dma_segment_t *, int, int *, int);
|
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|
|
|
void (*_dmamem_free)(bus_dma_tag_t,
|
|
|
|
|
bus_dma_segment_t *, int);
|
|
|
|
|
int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
|
|
|
|
|
int, size_t, void **, int);
|
|
|
|
|
void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
|
|
|
|
|
paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
|
|
|
|
|
int, off_t, int, int);
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
#define bus_dmamap_create(t, s, n, m, b, f, p) \
|
|
|
|
|
(*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
|
|
|
|
|
#define bus_dmamap_destroy(t, p) \
|
|
|
|
|
(*(t)->_dmamap_destroy)((t), (p))
|
|
|
|
|
#define bus_dmamap_load(t, m, b, s, p, f) \
|
|
|
|
|
(*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
|
|
|
|
|
#define bus_dmamap_load_mbuf(t, m, b, f) \
|
|
|
|
|
(*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
|
|
|
|
|
#define bus_dmamap_load_uio(t, m, u, f) \
|
|
|
|
|
(*(t)->_dmamap_load_uio)((t), (m), (u), (f))
|
|
|
|
|
#define bus_dmamap_load_raw(t, m, sg, n, s, f) \
|
|
|
|
|
(*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
|
|
|
|
|
#define bus_dmamap_unload(t, p) \
|
|
|
|
|
(*(t)->_dmamap_unload)((t), (p))
|
|
|
|
|
#define bus_dmamap_sync(t, p, o, l, ops) \
|
|
|
|
|
do { \
|
|
|
|
|
if (((ops) & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 \
|
|
|
|
|
&& (t)->_dmamap_sync_pre != NULL) \
|
|
|
|
|
(*(t)->_dmamap_sync_pre)((t), (p), (o), (l), (ops)); \
|
|
|
|
|
else if (((ops) & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0 \
|
|
|
|
|
&& (t)->_dmamap_sync_post != NULL) \
|
|
|
|
|
(*(t)->_dmamap_sync_post)((t), (p), (o), (l), (ops)); \
|
|
|
|
|
} while (/*CONSTCOND*/0)
|
|
|
|
|
|
|
|
|
|
#define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
|
|
|
|
|
(*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
|
|
|
|
|
#define bus_dmamem_free(t, sg, n) \
|
|
|
|
|
(*(t)->_dmamem_free)((t), (sg), (n))
|
|
|
|
|
#define bus_dmamem_map(t, sg, n, s, k, f) \
|
|
|
|
|
(*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
|
|
|
|
|
#define bus_dmamem_unmap(t, k, s) \
|
|
|
|
|
(*(t)->_dmamem_unmap)((t), (k), (s))
|
|
|
|
|
#define bus_dmamem_mmap(t, sg, n, o, p, f) \
|
|
|
|
|
(*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
|
|
|
|
|
|
|
|
|
|
#define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP
|
|
|
|
|
#define bus_dmatag_destroy(t)
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* bus_dmamap_t
|
|
|
|
|
*
|
|
|
|
|
* Describes a DMA mapping.
|
|
|
|
|
*/
|
|
|
|
|
struct arm32_bus_dmamap {
|
|
|
|
|
/*
|
|
|
|
|
* PRIVATE MEMBERS: not for use by machine-independent code.
|
|
|
|
|
*/
|
|
|
|
|
bus_size_t _dm_size; /* largest DMA transfer mappable */
|
|
|
|
|
int _dm_segcnt; /* number of segs this map can map */
|
|
|
|
|
bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */
|
|
|
|
|
bus_size_t _dm_boundary; /* don't cross this */
|
|
|
|
|
int _dm_flags; /* misc. flags */
|
|
|
|
|
|
|
|
|
|
void *_dm_origbuf; /* pointer to original buffer */
|
|
|
|
|
int _dm_buftype; /* type of buffer */
|
|
|
|
|
struct vmspace *_dm_vmspace; /* vmspace that owns the mapping */
|
|
|
|
|
|
|
|
|
|
void *_dm_cookie; /* cookie for bus-specific functions */
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* PUBLIC MEMBERS: these are used by machine-independent code.
|
|
|
|
|
*/
|
|
|
|
|
bus_size_t dm_maxsegsz; /* largest possible segment */
|
|
|
|
|
bus_size_t dm_mapsize; /* size of the mapping */
|
|
|
|
|
int dm_nsegs; /* # valid segments in mapping */
|
|
|
|
|
bus_dma_segment_t dm_segs[1]; /* segments; variable length */
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
#ifdef _ARM32_BUS_DMA_PRIVATE
|
|
|
|
|
|
|
|
|
|
/* _dm_buftype */
|
|
|
|
|
#define ARM32_BUFTYPE_INVALID 0
|
|
|
|
|
#define ARM32_BUFTYPE_LINEAR 1
|
|
|
|
|
#define ARM32_BUFTYPE_MBUF 2
|
|
|
|
|
#define ARM32_BUFTYPE_UIO 3
|
|
|
|
|
#define ARM32_BUFTYPE_RAW 4
|
|
|
|
|
|
|
|
|
|
int arm32_dma_range_intersect(struct arm32_dma_range *, int,
|
|
|
|
|
paddr_t pa, psize_t size, paddr_t *pap, psize_t *sizep);
|
|
|
|
|
|
|
|
|
|
int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
|
|
|
|
|
bus_size_t, int, bus_dmamap_t *);
|
|
|
|
|
void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
|
|
|
|
|
int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
|
|
|
|
|
bus_size_t, struct proc *, int);
|
|
|
|
|
int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t,
|
|
|
|
|
struct mbuf *, int);
|
|
|
|
|
int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t,
|
|
|
|
|
struct uio *, int);
|
|
|
|
|
int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
|
|
|
|
|
bus_dma_segment_t *, int, bus_size_t, int);
|
|
|
|
|
void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
|
|
|
|
|
void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
|
|
|
|
|
bus_size_t, int);
|
|
|
|
|
|
|
|
|
|
int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
|
|
|
|
|
bus_size_t alignment, bus_size_t boundary,
|
|
|
|
|
bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags);
|
|
|
|
|
void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
|
|
|
|
|
int nsegs);
|
|
|
|
|
int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs,
|
|
|
|
|
int nsegs, size_t size, void **kvap, int flags);
|
|
|
|
|
void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva,
|
|
|
|
|
size_t size);
|
|
|
|
|
paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
|
|
|
|
|
int nsegs, off_t off, int prot, int flags);
|
|
|
|
|
|
|
|
|
|
int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size,
|
|
|
|
|
bus_size_t alignment, bus_size_t boundary,
|
|
|
|
|
bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
|
|
|
|
|
vaddr_t low, vaddr_t high);
|
|
|
|
|
#endif /* _ARM32_BUS_DMA_PRIVATE */
|
|
|
|
|
|
|
|
|
|
#endif /* _ARM32_BUS_H_ */
|
dyoung