fix various typos in comments.
This commit is contained in:
parent
947fbafb45
commit
34908c4889
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@ -1,4 +1,4 @@
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/* $NetBSD: mulaw.c,v 1.5 2021/07/21 06:35:44 skrll Exp $ */
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/* $NetBSD: mulaw.c,v 1.6 2024/02/02 22:39:10 andvar Exp $ */
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/*
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* Copyright (C) 2017 Tetsuya Isaki. All rights reserved.
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@ -27,7 +27,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: mulaw.c,v 1.5 2021/07/21 06:35:44 skrll Exp $");
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__KERNEL_RCSID(0, "$NetBSD: mulaw.c,v 1.6 2024/02/02 22:39:10 andvar Exp $");
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#include <sys/param.h>
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#include <sys/types.h>
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@ -57,7 +57,7 @@ __KERNEL_RCSID(0, "$NetBSD: mulaw.c,v 1.5 2021/07/21 06:35:44 skrll Exp $");
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* About mulaw32 format.
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*
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* The format which I call ``mulaw32'' is only used in dev/tc/bba.c .
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* It is 8bit mu-law but 16bit left-shifted and its containter is 32bit.
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* It is 8bit mu-law but 16bit left-shifted and its container is 32bit.
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* Not mu-law calculated in 32bit.
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*
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* When MULAW32 is not defined (it's default), this file outputs
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@ -1,4 +1,4 @@
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/* $NetBSD: sht3xreg.h,v 1.3 2022/05/28 10:36:23 andvar Exp $ */
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/* $NetBSD: sht3xreg.h,v 1.4 2024/02/02 22:39:10 andvar Exp $ */
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/*
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* Copyright (c) 2021 Brad Spencer <brad@anduin.eldar.org>
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@ -84,7 +84,7 @@
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the information in the datasheet was not enough to
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get it working. A read of the registers appears to
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function just fine, but writes do not do anything, and
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the chip does not indicate any errors occured.
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the chip does not indicate any errors occurred.
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*/
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#define SHT3X_READ_HIGH_ALERT_SET 0xE11F
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#define SHT3X_READ_HIGH_ALERT_CLEAR 0xE114
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@ -1,4 +1,4 @@
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/* $NetBSD: aic6915.c,v 1.45 2022/09/25 18:43:32 thorpej Exp $ */
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/* $NetBSD: aic6915.c,v 1.46 2024/02/02 22:39:10 andvar Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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@ -35,7 +35,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: aic6915.c,v 1.45 2022/09/25 18:43:32 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: aic6915.c,v 1.46 2024/02/02 22:39:10 andvar Exp $");
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#include <sys/param.h>
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@ -824,7 +824,7 @@ sf_tick(void *arg)
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/*
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* sf_stats_update:
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*
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* Read the statitistics counters.
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* Read the statistics counters.
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*/
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static void
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sf_stats_update(struct sf_softc *sc)
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@ -1,4 +1,4 @@
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/* $NetBSD: aic79xx.c,v 1.69 2023/08/01 20:50:11 andvar Exp $ */
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/* $NetBSD: aic79xx.c,v 1.70 2024/02/02 22:39:10 andvar Exp $ */
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/*
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* Core routines and tables shareable across OS platforms.
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@ -49,7 +49,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: aic79xx.c,v 1.69 2023/08/01 20:50:11 andvar Exp $");
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__KERNEL_RCSID(0, "$NetBSD: aic79xx.c,v 1.70 2024/02/02 22:39:10 andvar Exp $");
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#include <dev/ic/aic79xx_osm.h>
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#include <dev/ic/aic79xx_inline.h>
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@ -1871,7 +1871,7 @@ ahd_handle_transmission_error(struct ahd_softc *ahd)
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* If we raise ATN and the target completes the entire
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* stream (P0 asserted during the last packet), the
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* hardware will ack all data and return to the ISTART
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* state. When the target reponds to our ATN condition,
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* state. When the target responds to our ATN condition,
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* LQIPHASE_LQ will be asserted. We should respond to
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* this with an LQIRETRY to prepare for any future
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* packets. NONPACKREQ will not be asserted again
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@ -7620,7 +7620,7 @@ ahd_reset_channel(struct ahd_softc *ahd, char channel, int initiate_reset)
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*/
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next_fifo = fifo = ahd_inb(ahd, DFFSTAT) & CURRFIFO;
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if (next_fifo > CURRFIFO_1)
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/* If disconneced, arbitrarily start with FIFO1. */
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/* If disconnected, arbitrarily start with FIFO1. */
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next_fifo = fifo = 0;
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do {
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next_fifo ^= CURRFIFO_1;
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@ -7900,7 +7900,7 @@ ahd_handle_scsi_status(struct ahd_softc *ahd, struct scb *scb)
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printf("Invalid Command IU Field\n");
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break;
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case SIU_PFC_TMF_NOT_SUPPORTED:
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printf("TMF not supportd\n");
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printf("TMF not supported\n");
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break;
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case SIU_PFC_TMF_FAILED:
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printf("TMF failed\n");
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@ -8962,7 +8962,7 @@ ahd_read_seeprom(struct ahd_softc *ahd, uint16_t *tbuf,
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}
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/*
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* Write count 16bit words from tbuf, into SEEPROM attache to the
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* Write count 16bit words from tbuf, into SEEPROM attached to the
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* controller starting at 16bit word address start_addr, using the
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* controller's SEEPROM writing state machine.
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*/
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return (error);
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/*
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* Write the data. If we don't get throught the loop at
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* Write the data. If we don't get through the loop at
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* least once, the arguments were invalid.
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*/
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retval = EINVAL;
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@ -1,4 +1,4 @@
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/* $NetBSD: aic7xxx.c,v 1.147 2022/06/27 22:41:29 andvar Exp $ */
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/* $NetBSD: aic7xxx.c,v 1.148 2024/02/02 22:39:10 andvar Exp $ */
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/*
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* Core routines and tables shareable across OS platforms.
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@ -39,7 +39,7 @@
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGES.
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*
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* $Id: aic7xxx.c,v 1.147 2022/06/27 22:41:29 andvar Exp $
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* $Id: aic7xxx.c,v 1.148 2024/02/02 22:39:10 andvar Exp $
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*
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* //depot/aic7xxx/aic7xxx/aic7xxx.c#112 $
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*
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@ -50,7 +50,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: aic7xxx.c,v 1.147 2022/06/27 22:41:29 andvar Exp $");
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__KERNEL_RCSID(0, "$NetBSD: aic7xxx.c,v 1.148 2024/02/02 22:39:10 andvar Exp $");
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#include <dev/ic/aic7xxx_osm.h>
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#include <dev/ic/aic7xxx_inline.h>
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/*
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* Touch all SCB bytes to avoid parity errors
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* should one of our debugging routines read
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* an otherwise uninitiatlized byte.
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* an otherwise uninitialized byte.
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*/
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for (j = 0; j < scbsize; j++)
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ahc_outb(ahc, SCB_BASE+j, 0xFF);
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@ -1,4 +1,4 @@
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/* $NetBSD: if_mvxpereg.h,v 1.7 2021/11/10 15:55:35 msaitoh Exp $ */
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/* $NetBSD: if_mvxpereg.h,v 1.8 2024/02/02 22:39:10 andvar Exp $ */
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/*
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* Copyright (c) 2015 Internet Initiative Japan Inc.
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* All rights reserved.
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@ -489,7 +489,7 @@
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#define MVXPE_PTXS_GET_PDC(x) ((x) & 0x3fff)
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/* Port TX queues Status Update (MVXPE_PTXSU) */
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/* Number Of Written Descriptoes */
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/* Number Of Written Descriptors */
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#define MVXPE_PTXSU_NOWD(x) (((x) & 0xff) << 0)
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/* Number Of Released Buffers */
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#define MVXPE_PTXSU_NORB(x) (((x) & 0xff) << 16)
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@ -1,4 +1,4 @@
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/* $NetBSD: mvgbereg.h,v 1.9 2021/08/30 00:08:28 rin Exp $ */
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/* $NetBSD: mvgbereg.h,v 1.10 2024/02/02 22:39:10 andvar Exp $ */
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/*
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* Copyright (c) 2007, 2013 KIYOHARA Takashi
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* All rights reserved.
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#define MVGBE_PTXS_TBC(x) (((x) & 0x3fff) << 16)
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/* Port TX queues Status Update (MVGBE_PTXSU) */
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/* Number Of Written Descriptoes */
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/* Number Of Written Descriptors */
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#define MVGBE_PTXSU_NOWD(x) (((x) & 0xff) << 0)
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/* Number Of Released Buffers */
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#define MVGBE_PTXSU_NORB(x) (((x) & 0xff) << 16)
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/*
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* DMA descriptors
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* Despite the documentation saying these descriptors only need to be
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* aligned to 16-byte bondaries, 32-byte alignment seems to be required
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* aligned to 16-byte boundaries, 32-byte alignment seems to be required
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* by the hardware. We'll just pad them out to that to make it easier.
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*/
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struct mvgbe_tx_desc {
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*
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* $FreeBSD: /repoman/r/ncvs/src/sys/dev/aic7xxx/aic7xxx.reg,v 1.43 2003/01/20 20:44:55 gibbs Exp $
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*/
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VERSION = "$NetBSD: aic7xxx.reg,v 1.6 2022/01/25 22:01:34 andvar Exp $"
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VERSION = "$NetBSD: aic7xxx.reg,v 1.7 2024/02/02 22:39:10 andvar Exp $"
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/*
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* This file is processed by the aic7xxx_asm utility for use in assembling
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}
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/*
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* Serial Port I/O Cabability register (p. 4-95 aic7860 Data Book)
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* Serial Port I/O Capability register (p. 4-95 aic7860 Data Book)
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* Indicates if external logic has been attached to the chip to
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* perform the tasks of accessing a serial eeprom, testing termination
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* strength, and performing cable detection. On the aic7860, most of
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@ -1,4 +1,4 @@
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/* $NetBSD: if_sipreg.h,v 1.21 2020/03/08 02:44:12 thorpej Exp $ */
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/* $NetBSD: if_sipreg.h,v 1.22 2024/02/02 22:39:10 andvar Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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#define SIP_TBICR 0xe0 /* TBI control register */
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#define TBICR_MR_LOOPBACK 0x00004000 /* TBI PCS loopback enable */
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#define TBICR_MR_AN_ENABLE 0x00001000 /* TBI autonegotiation enable */
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#define TBICR_MR_RESTART_AN 0x00000200 /* restart TBI autoneogtiation */
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#define TBICR_MR_RESTART_AN 0x00000200 /* restart TBI autonegotiation */
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#define SIP_TBISR 0xe4 /* TBI status register */
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#define TBISR_MR_LINK_STATUS 0x00000020 /* TBI link status */
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@ -1,4 +1,4 @@
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/* $NetBSD: if_skreg.h,v 1.31 2022/02/23 21:54:41 andvar Exp $ */
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/* $NetBSD: if_skreg.h,v 1.32 2024/02/02 22:39:10 andvar Exp $ */
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/*-
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* Copyright (c) 2003 The NetBSD Foundation, Inc.
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/* Source Address High #2 (SAH2) */
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#define YUKON_SAH2 0x0030 /* SA2[47:32] */
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/* Multicatst Address Hash Register 1 (MCAH1) */
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/* Multicast Address Hash Register 1 (MCAH1) */
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#define YUKON_MCAH1 0x0034
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/* Multicatst Address Hash Register 2 (MCAH2) */
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/* Multicast Address Hash Register 2 (MCAH2) */
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#define YUKON_MCAH2 0x0038
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/* Multicatst Address Hash Register 3 (MCAH3) */
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/* Multicast Address Hash Register 3 (MCAH3) */
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#define YUKON_MCAH3 0x003c
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/* Multicatst Address Hash Register 4 (MCAH4) */
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/* Multicast Address Hash Register 4 (MCAH4) */
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#define YUKON_MCAH4 0x0040
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/* Transmit Interrupt Register (TIR) */
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/* $KAME: sctp_input.c,v 1.28 2005/04/21 18:36:21 nishida Exp $ */
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/* $NetBSD: sctp_input.c,v 1.16 2022/04/08 10:27:04 andvar Exp $ */
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/* $NetBSD: sctp_input.c,v 1.17 2024/02/02 22:39:09 andvar Exp $ */
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/*
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* Copyright (C) 2002, 2003, 2004 Cisco Systems Inc,
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: sctp_input.c,v 1.16 2022/04/08 10:27:04 andvar Exp $");
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__KERNEL_RCSID(0, "$NetBSD: sctp_input.c,v 1.17 2024/02/02 22:39:09 andvar Exp $");
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#ifdef _KERNEL_OPT
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#include "opt_ipsec.h"
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/*
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* Cancel the INIT timer, We do this first before queueing
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* the cookie. We always cancel at the primary to assume that
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* we are canceling the timer started by the INIT which always
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* we are cancelling the timer started by the INIT which always
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* goes to the primary.
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*/
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sctp_timer_stop(SCTP_TIMER_TYPE_INIT, stcb->sctp_ep, stcb,
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/* $NetBSD: t_round.c,v 1.9 2017/09/03 13:41:19 wiz Exp $ */
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/* $NetBSD: t_round.c,v 1.10 2024/02/02 22:39:09 andvar Exp $ */
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/*-
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* Copyright (c) 2011 The NetBSD Foundation, Inc.
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/*
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* This tests for a bug in the initial implementation where
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* precision was lost in an internal substraction, leading to
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* precision was lost in an internal subtraction, leading to
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* rounding into the wrong direction.
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*/
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