Define a `DMA_FLUSH' macro; dma chip revs 0 & 1 have a different bit
to reset the internal state engine.
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@ -1,4 +1,4 @@
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/* $NetBSD: dma.c,v 1.48 1998/01/12 20:23:46 thorpej Exp $ */
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/* $NetBSD: dma.c,v 1.49 1998/02/07 22:41:27 pk Exp $ */
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/*
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* Copyright (c) 1994 Paul Kranenburg. All rights reserved.
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@ -301,13 +301,27 @@ espsearch:
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DMAWAIT(sc, sc->sc_regs->csr & D_DRAINING, "DRAINING", dontpanic);\
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} while(0)
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#define DMA_FLUSH(sc, dontpanic) do { \
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int csr; \
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/* \
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* DMA rev0 & rev1: we are not allowed to touch the DMA "flush" \
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* and "drain" bits while it is still thinking about a \
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* request. \
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* other revs: D_R_PEND bit reads as 0 \
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*/ \
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DMAWAIT(sc, sc->sc_regs->csr & D_R_PEND, "R_PEND", dontpanic); \
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csr = DMACSR(sc); \
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csr &= ~(D_WRITE|D_EN_DMA); \
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csr |= D_INVALIDATE; \
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DMACSR(sc) = csr; \
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} while(0)
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void
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dma_reset(sc, isledma)
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struct dma_softc *sc;
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int isledma;
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{
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DMA_DRAIN(sc, 1);
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DMACSR(sc) &= ~D_EN_DMA; /* Stop DMA */
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DMA_FLUSH(sc, 1);
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DMACSR(sc) |= D_RESET; /* reset DMA */
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DELAY(200); /* what should this be ? */
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/*DMAWAIT1(sc); why was this here? */
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@ -384,7 +398,7 @@ dma_setup(sc, addr, len, datain, dmasize)
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{
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u_long csr;
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DMA_DRAIN(sc, 0);
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DMA_FLUSH(sc, 0);
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#if 0
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DMACSR(sc) &= ~D_INT_EN;
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