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Fix brain'o in PCIX speed detection. kern/23375 (John R. Shannon).

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This commit is contained in:
thorpej 2003-11-07 06:03:52 +00:00
parent 434c034061
commit 32ddb3f486
2 changed files with 7 additions and 5 deletions
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9
sys/dev/pci/if_wm.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: if_wm.c,v 1.61 2003/11/04 19:09:39 thorpej Exp $ */ /* $NetBSD: if_wm.c,v 1.62 2003/11/07 06:03:52 thorpej Exp $ */
/* /*
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc. * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
@ -48,7 +48,7 @@
*/ */
#include <sys/cdefs.h> #include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.61 2003/11/04 19:09:39 thorpej Exp $"); __KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.62 2003/11/07 06:03:52 thorpej Exp $");
#include "bpfilter.h" #include "bpfilter.h"
#include "rnd.h" #include "rnd.h"
@ -857,7 +857,7 @@ wm_attach(struct device *parent, struct device *self, void *aux)
sc->sc_bus_speed = (sc->sc_flags & WM_F_PCIX) ? 120 sc->sc_bus_speed = (sc->sc_flags & WM_F_PCIX) ? 120
: 66; : 66;
} else if (sc->sc_flags & WM_F_PCIX) { } else if (sc->sc_flags & WM_F_PCIX) {
switch (STATUS_PCIXSPD(reg)) { switch (reg & STATUS_PCIXSPD_MASK) {
case STATUS_PCIXSPD_50_66: case STATUS_PCIXSPD_50_66:
sc->sc_bus_speed = 66; sc->sc_bus_speed = 66;
break; break;
@ -870,7 +870,8 @@ wm_attach(struct device *parent, struct device *self, void *aux)
default: default:
aprint_error( aprint_error(
"%s: unknown PCIXSPD %d; assuming 66MHz\n", "%s: unknown PCIXSPD %d; assuming 66MHz\n",
sc->sc_dev.dv_xname, STATUS_PCIXSPD(reg)); sc->sc_dev.dv_xname,
reg & STATUS_PCIXSPD_MASK);
sc->sc_bus_speed = 66; sc->sc_bus_speed = 66;
} }
} else } else

3
sys/dev/pci/if_wmreg.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: if_wmreg.h,v 1.7 2003/10/21 05:07:10 thorpej Exp $ */ /* $NetBSD: if_wmreg.h,v 1.8 2003/11/07 06:03:52 thorpej Exp $ */
/* /*
* Copyright (c) 2001 Wasabi Systems, Inc. * Copyright (c) 2001 Wasabi Systems, Inc.
@ -220,6 +220,7 @@ struct livengood_tcpip_ctxdesc {
#define STATUS_PCIXSPD_50_66 STATUS_PCIXSPD(0) #define STATUS_PCIXSPD_50_66 STATUS_PCIXSPD(0)
#define STATUS_PCIXSPD_66_100 STATUS_PCIXSPD(1) #define STATUS_PCIXSPD_66_100 STATUS_PCIXSPD(1)
#define STATUS_PCIXSPD_100_133 STATUS_PCIXSPD(2) #define STATUS_PCIXSPD_100_133 STATUS_PCIXSPD(2)
#define STATUS_PCIXSPD_MASK STATUS_PCIXSPD(3)
#define WMREG_EECD 0x0010 /* EEPROM Control Register */ #define WMREG_EECD 0x0010 /* EEPROM Control Register */
#define EECD_SK (1U << 0) /* clock */ #define EECD_SK (1U << 0) /* clock */