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bus_dma implementation for jazz dma tlb,

Browse Source 
contributed by Shuichiro URATA <ur@a-r.org>
This commit is contained in:
soda 2000-06-09 05:22:22 +00:00
parent 23db111368
commit 31a9a256f4
6 changed files with 600 additions and 161 deletions
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147
sys/arch/arc/dev/dma.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: dma.c,v 1.14 2000/03/30 21:37:51 soren Exp $ */
/* $NetBSD: dma.c,v 1.15 2000/06/09 05:22:24 soda Exp $ */
/* $OpenBSD: dma.c,v 1.5 1998/03/01 16:49:57 niklas Exp $ */
/*
@ -37,8 +37,7 @@
*/
/*
* PICA system dma driver. Handles resource allocation and
* logical (viritual) address remaping.
* PICA system dma driver.
*/
#include <sys/param.h>
@ -66,20 +65,15 @@
#include <arc/pica/pica.h>
#include <arc/pica/rd94.h>
#include <arc/arc/arctype.h>
#include <arc/jazz/jazzdmatlbreg.h>
#include <arc/jazz/jazzdmatlbvar.h>
#include <arc/dev/dma.h>
void picaDmaReset __P((dma_softc_t *sc));
void picaDmaEnd __P((dma_softc_t *sc));
void picaDmaNull __P((dma_softc_t *sc));
extern vm_map_t phys_map;
#define dma_pte_to_pa(x) (((x) - first_dma_pte) * R4030_DMA_PAGE_SIZE)
dma_pte_t *free_dma_pte; /* Pointer to free dma pte list */
dma_pte_t *first_dma_pte; /* Pointer to first dma pte */
static vaddr_t ivalid_reg;
extern struct arc_bus_space pica_bus; /* XXX */
/*
* Initialize the dma mapping register area and pool.
@ -87,29 +81,16 @@ static vaddr_t ivalid_reg;
void
picaDmaInit()
{
int map = PICA_TL_BASE;
mips3_FlushCache(); /* Make sure no map entries are cached */
bzero((char *)map, PICA_TL_SIZE);
free_dma_pte = (dma_pte_t *)map;
first_dma_pte = (dma_pte_t *)map;
free_dma_pte->queue.next = NULL;
free_dma_pte->queue.size = PICA_TL_SIZE / sizeof(dma_pte_t);
switch (cputype) {
case ACER_PICA_61:
case MAGNUM:
out32(R4030_SYS_TL_BASE, MIPS_KSEG1_TO_PHYS(map));
out32(R4030_SYS_TL_LIMIT, PICA_TL_SIZE);
out32(R4030_SYS_TL_IVALID, 0);
ivalid_reg = R4030_SYS_TL_IVALID;
jazz_dmatlb_init(&pica_bus, R4030_SYS_TL_BASE);
break;
case NEC_R94:
case NEC_RAx94:
case NEC_RD94:
out32(RD94_SYS_TL_BASE, MIPS_KSEG1_TO_PHYS(map));
out32(RD94_SYS_TL_LIMIT, PICA_TL_SIZE);
out32(RD94_SYS_TL_IVALID, 0);
ivalid_reg = RD94_SYS_TL_IVALID;
case NEC_R96:
jazz_dmatlb_init(&pica_bus, RD94_SYS_TL_BASE);
break;
}
}
@ -121,36 +102,8 @@ picaDmaInit()
void
picaDmaTLBAlloc(dma_softc_t *dma)
{
dma_pte_t *list;
dma_pte_t *found;
int size;
int s;
found = NULL;
size = dma->pte_size;
do {
list = (dma_pte_t *)&free_dma_pte;
s = splhigh();
while(list) {
if(list->queue.next->queue.size >= size) {
found = list->queue.next;
break;
}
}
/*XXX Wait for release wakeup */
} while(found == NULL);
if(found->queue.size == size) {
list->queue.next = found->queue.next;
}
else {
list->queue.next = found + size;
list = found + size;
list->queue.next = found->queue.next;
list->queue.size = found->queue.size - size;
}
splx(s);
dma->pte_base = found;
dma->dma_va = dma_pte_to_pa(found);
dma->pte_base = jazz_dmatlb_alloc(dma->pte_size, 0, BUS_DMA_WAITOK,
&dma->dma_va);
}
/*
@ -159,43 +112,8 @@ picaDmaTLBAlloc(dma_softc_t *dma)
void
picaDmaTLBFree(dma_softc_t *dma)
{
dma_pte_t *list;
dma_pte_t *entry;
int size;
int s;
jazz_dmatlb_free(dma->dma_va, dma->pte_size);
s = splhigh();
entry = dma->pte_base;
size = dma->pte_size;
entry->queue.next = NULL;
entry->queue.size = size;
if(free_dma_pte == NULL || entry < free_dma_pte) {
list = entry;
list->queue.next = free_dma_pte;
free_dma_pte = entry;
}
else {
list = free_dma_pte;
while(list < entry && list->queue.next != NULL) {
if(list + list->queue.size == entry) {
list->queue.size += size;
break;
}
else if(list->queue.next == NULL) {
list->queue.next = entry;
break;
}
else
list = list->queue.next;
}
}
if(list->queue.next != NULL) {
if(list + list->queue.size == list->queue.next) {
list->queue.size += list->queue.next->queue.size;
list->queue.next = list->queue.next->queue.next;
}
}
splx(s);
/*XXX Wakeup waiting */
}
@ -207,32 +125,14 @@ picaDmaTLBFree(dma_softc_t *dma)
void
picaDmaTLBMap(dma_softc_t *sc)
{
paddr_t pa;
vaddr_t va;
dma_pte_t *dma_pte;
int nbytes;
jazz_dma_pte_t *dma_pte;
va = sc->next_va - sc->dma_va;
dma_pte = sc->pte_base + (va / R4030_DMA_PAGE_SIZE);
nbytes = dma_page_round(sc->next_size + dma_page_offs(va));
va = sc->req_va;
while(nbytes > 0) {
if(va < VM_MIN_KERNEL_ADDRESS) {
pa = MIPS_KSEG0_TO_PHYS(va);
}
else {
if (!pmap_extract(vm_map_pmap(phys_map), va, &pa))
panic("picaDmaTLBMap: pmap_extract %p", va);
}
pa &= R4030_DMA_PAGE_NUM;
if(pa == 0)
panic("picaDmaTLBMap: null page frame");
dma_pte->entry.lo_addr = pa;
dma_pte->entry.hi_addr = 0;
dma_pte++;
va += R4030_DMA_PAGE_SIZE;
nbytes -= R4030_DMA_PAGE_SIZE;
}
dma_pte = sc->pte_base + (va / JAZZ_DMA_PAGE_SIZE);
jazz_dmatlb_map_va(NULL, sc->req_va, sc->next_size, dma_pte);
}
/*
@ -254,12 +154,12 @@ picaDmaStart(sc, addr, size, datain)
/* Remap request space va into dma space va */
sc->req_va = (int)addr;
sc->next_va = sc->dma_va + dma_page_offs(addr);
sc->next_va = sc->dma_va + jazz_dma_page_offs(addr);
sc->next_size = size;
/* Map up the request viritual dma space */
picaDmaTLBMap(sc);
out32(ivalid_reg, 0); /* Flush dma map cache */
jazz_dmatlb_flush();
/* Load new transfer parameters */
regs->dma_addr = sc->next_va;
@ -292,7 +192,7 @@ picaDmaMap(sc, addr, size, offset)
/* Remap request space va into dma space va */
sc->req_va = (vaddr_t)addr;
sc->next_va = sc->dma_va + dma_page_offs(addr) + offset;
sc->next_va = sc->dma_va + jazz_dma_page_offs(addr) + offset;
sc->next_size = size;
/* Map up the request viritual dma space */
@ -309,7 +209,7 @@ picaDmaFlush(sc, addr, size, datain)
size_t size;
int datain;
{
out32(ivalid_reg, 0); /* Flush dma map cache */
jazz_dmatlb_flush();
}
/*
@ -389,7 +289,10 @@ fdc_dma_init(dma_softc_t *sc)
sc->end = picaDmaEnd;
switch (cputype) {
case NEC_R94:
case NEC_RAx94:
case NEC_RD94:
case NEC_R96:
sc->dma_reg = (pDmaReg)RD94_SYS_DMA0_REGS;
break;
default:

42
sys/arch/arc/dev/dma.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: dma.h,v 1.6 2000/02/22 11:26:00 soda Exp $ */
/* $NetBSD: dma.h,v 1.7 2000/06/09 05:22:25 soda Exp $ */
/* $OpenBSD: dma.h,v 1.3 1997/04/19 17:19:51 pefo Exp $ */
/*
@ -31,19 +31,6 @@
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* The R4030 system has four dma channels capable of scatter/gather
* and full memory addressing. The maximum transfer length is 1Mb.
* Dma snopes the L2 cache so no precaution is required. However
* if L1 cache is cached 'write back' the processor is responible
* for flushing/invalidating it.
*
* The dma mapper has up to 4096 page descriptors.
*/
#define PICA_TL_BASE 0xa0008000 /* Base of tl register area */
#define PICA_TL_SIZE 0x00008000 /* Size of tl register area */
/*
* Hardware dma registers.
*/
@ -83,26 +70,7 @@ typedef volatile struct {
#define R4030_DMA_ENAB_ME_IE 0x200 /* Memory error int enable */
#define R4030_DMA_ENAB_TL_IE 0x400 /* Translation limit int enable */
#define R4030_DMA_COUNT_MASK 0x00fffff /* Byte count mask */
#define R4030_DMA_PAGE_NUM 0xffff000 /* Address page number */
#define R4030_DMA_PAGE_OFFS 0x0000fff /* Address page offset */
#define R4030_DMA_PAGE_SIZE 0x0001000 /* Address page size */
/*
* Dma TLB entry
*/
typedef union dma_pte {
struct {
paddr_t lo_addr; /* Low part of translation addr */
paddr_t hi_addr; /* High part of translation addr */
} entry;
struct bbb {
union dma_pte *next; /* Next free translation entry */
int size; /* Number of consecutive free entrys */
} queue;
} dma_pte_t;
#define R4030_DMA_COUNT_MASK 0x000fffff /* Byte count mask */
/*
* Structure used to control dma.
@ -116,7 +84,7 @@ typedef struct dma_softc {
bus_addr_t next_va; /* Value to program into dma regs */
int next_size; /* Value to program into dma regs */
int mode; /* Mode register value and direction */
dma_pte_t *pte_base; /* Pointer to dma tlb array */
jazz_dma_pte_t *pte_base; /* Pointer to dma tlb array */
int pte_size; /* Size of pte allocated pte array */
pDmaReg dma_reg; /* Pointer to dma registers */
int sc_active; /* Active flag */
@ -136,9 +104,6 @@ typedef struct dma_softc {
#define DMA_TO_DEV 0
#define DMA_FROM_DEV 1
#define dma_page_offs(x) ((int)(x) & R4030_DMA_PAGE_OFFS)
#define dma_page_round(x) (((int)(x) + R4030_DMA_PAGE_OFFS) & R4030_DMA_PAGE_NUM)
#define DMA_RESET(r) ((r->reset)(r))
#define DMA_START(a, b, c, d) ((a->start)(a, b, c, d))
#define DMA_MAP(a, b, c, d) ((a->map)(a, b, c, d))
@ -156,4 +121,3 @@ void picaDmaFlush __P((struct dma_softc *, char *, size_t, int));
void asc_dma_init __P((struct dma_softc *));
void fdc_dma_init __P((struct dma_softc *));
void sn_dma_init __P((struct dma_softc *, int));

264
sys/arch/arc/jazz/bus_dma_jazz.c Normal file
View File

@ -0,0 +1,264 @@
/* $NetBSD: bus_dma_jazz.c,v 1.1 2000/06/09 05:22:22 soda Exp $ */
/*-
* Copyright (C) 2000 Shuichiro URATA. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/mbuf.h>
#include <sys/device.h>
#include <vm/vm.h>
#include <vm/vm_kern.h>
#define _ARC_BUS_DMA_PRIVATE
#include <machine/bus.h>
#include <arc/jazz/jazzdmatlbreg.h>
#include <arc/jazz/jazzdmatlbvar.h>
static int jazz_bus_dmamap_alloc_sgmap __P((bus_dma_tag_t,
bus_dma_segment_t *, int, bus_size_t, struct proc *, int));
static void jazz_bus_dmamap_free_sgmap __P((bus_dma_tag_t,
bus_dma_segment_t *, int));
int jazz_bus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *,
bus_size_t, struct proc *, int));
int jazz_bus_dmamap_load_mbuf __P((bus_dma_tag_t, bus_dmamap_t,
struct mbuf *, int));
int jazz_bus_dmamap_load_uio __P((bus_dma_tag_t, bus_dmamap_t,
struct uio *, int));
int jazz_bus_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t,
bus_dma_segment_t *, int, bus_size_t, int));
void jazz_bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
void jazz_mips1_bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t,
bus_addr_t, bus_size_t, int));
void jazz_mips3_bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t,
bus_addr_t, bus_size_t, int));
void
jazz_bus_dma_tag_init(t)
bus_dma_tag_t t;
{
_bus_dma_tag_init(t);
t->_dmamap_load = jazz_bus_dmamap_load;
t->_dmamap_load_mbuf = jazz_bus_dmamap_load_mbuf;
t->_dmamap_load_uio = jazz_bus_dmamap_load_uio;
t->_dmamap_load_raw = jazz_bus_dmamap_load_raw;
t->_dmamap_unload = jazz_bus_dmamap_unload;
#if defined(MIPS1) && defined(MIPS3)
t->_dmamap_sync = (CPUISMIPS3) ?
jazz_mips3_bus_dmamap_sync : jazz_mips1_bus_dmamap_sync;
#elif defined(MIPS1)
t->_dmamap_sync = jazz_mips1_bus_dmamap_sync;
#elif defined(MIPS3)
t->_dmamap_sync = jazz_mips3_bus_dmamap_sync;
#else
#error neither MIPS1 nor MIPS3 is defined
#endif
t->_dmamem_alloc = _bus_dmamem_alloc;
t->_dmamem_free = _bus_dmamem_free;
}
static int
jazz_bus_dmamap_alloc_sgmap(t, segs, nsegs, boundary, p, flags)
bus_dma_tag_t t;
bus_dma_segment_t *segs;
int nsegs;
bus_size_t boundary;
struct proc *p;
int flags;
{
jazz_dma_pte_t *dmapte;
bus_addr_t addr;
bus_size_t off;
int i, npte;
for (i = 0; i < nsegs; i++) {
off = jazz_dma_page_offs(segs[i]._ds_paddr);
npte = jazz_dma_page_round(segs[i].ds_len + off) /
JAZZ_DMA_PAGE_SIZE;
dmapte = jazz_dmatlb_alloc(npte, boundary, flags, &addr);
if (dmapte == NULL)
return (ENOMEM);
segs[i].ds_addr = addr + off;
jazz_dmatlb_map_pa(segs[i]._ds_paddr, segs[i].ds_len, dmapte);
}
return (0);
}
static void
jazz_bus_dmamap_free_sgmap(t, segs, nsegs)
bus_dma_tag_t t;
bus_dma_segment_t *segs;
int nsegs;
{
int i, npte;
bus_addr_t addr;
for (i = 0; i < nsegs; i++) {
addr = (segs[i].ds_addr - t->dma_offset) & JAZZ_DMA_PAGE_NUM;
npte = jazz_dma_page_round(segs[i].ds_len +
jazz_dma_page_offs(segs[i].ds_addr)) / JAZZ_DMA_PAGE_SIZE;
jazz_dmatlb_free(addr, npte);
}
}
/*
* function for loading a direct-mapped DMA map with a linear buffer.
*/
int
jazz_bus_dmamap_load(t, map, buf, buflen, p, flags)
bus_dma_tag_t t;
bus_dmamap_t map;
void *buf;
bus_size_t buflen;
struct proc *p;
int flags;
{
int error = _bus_dmamap_load(t, map, buf, buflen, p, flags);
if (error == 0) {
error = jazz_bus_dmamap_alloc_sgmap(t, map->dm_segs,
map->dm_nsegs, map->_dm_boundary, p, flags);
}
return (error);
}
/*
* Like jazz_bus_dmamap_load(), but for mbufs.
*/
int
jazz_bus_dmamap_load_mbuf(t, map, m0, flags)
bus_dma_tag_t t;
bus_dmamap_t map;
struct mbuf *m0;
int flags;
{
int error = _bus_dmamap_load_mbuf(t, map, m0, flags);
if (error == 0) {
error = jazz_bus_dmamap_alloc_sgmap(t, map->dm_segs,
map->dm_nsegs, map->_dm_boundary, NULL, flags);
}
return (error);
}
/*
* Like jazz_bus_dmamap_load(), but for uios.
*/
int
jazz_bus_dmamap_load_uio(t, map, uio, flags)
bus_dma_tag_t t;
bus_dmamap_t map;
struct uio *uio;
int flags;
{
int error = jazz_bus_dmamap_load_uio(t, map, uio, flags);
if (error == 0) {
error = jazz_bus_dmamap_alloc_sgmap(t, map->dm_segs,
map->dm_nsegs, map->_dm_boundary,
uio->uio_segflg == UIO_USERSPACE ? uio->uio_procp : NULL,
flags);
}
return (error);
}
/*
* Like _bus_dmamap_load(), but for raw memory.
*/
int
jazz_bus_dmamap_load_raw(t, map, segs, nsegs, size, flags)
bus_dma_tag_t t;
bus_dmamap_t map;
bus_dma_segment_t *segs;
int nsegs;
bus_size_t size;
int flags;
{
int error = _bus_dmamap_load_raw(t, map, segs, nsegs, size, flags);
if (error == 0) {
error = jazz_bus_dmamap_alloc_sgmap(t, map->dm_segs,
map->dm_nsegs, map->_dm_boundary, NULL, flags);
}
return (error);
}
/*
* unload a DMA map.
*/
void
jazz_bus_dmamap_unload(t, map)
bus_dma_tag_t t;
bus_dmamap_t map;
{
jazz_bus_dmamap_free_sgmap(t, map->dm_segs, map->dm_nsegs);
_bus_dmamap_unload(t, map);
}
#ifdef MIPS1
/*
* Function for MIPS1 DMA map synchronization.
*/
void
jazz_mips1_bus_dmamap_sync(t, map, offset, len, ops)
bus_dma_tag_t t;
bus_dmamap_t map;
bus_addr_t offset;
bus_size_t len;
int ops;
{
/* Flush DMA TLB */
if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0)
jazz_dmatlb_flush();
return (_mips1_bus_dmamap_sync(t, map, offset, len, ops));
}
#endif /* MIPS1 */
#ifdef MIPS3
/*
* Function for MIPS3 DMA map synchronization.
*/
void
jazz_mips3_bus_dmamap_sync(t, map, offset, len, ops)
bus_dma_tag_t t;
bus_dmamap_t map;
bus_addr_t offset;
bus_size_t len;
int ops;
{
/* Flush DMA TLB */
if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0)
jazz_dmatlb_flush();
return (_mips3_bus_dmamap_sync(t, map, offset, len, ops));
}
#endif /* MIPS3 */

201
sys/arch/arc/jazz/jazzdmatlb.c Normal file
View File

@ -0,0 +1,201 @@
/* $NetBSD: jazzdmatlb.c,v 1.1 2000/06/09 05:22:22 soda Exp $ */
/* $OpenBSD: dma.c,v 1.5 1998/03/01 16:49:57 niklas Exp $ */
/*-
* Copyright (C) 2000 Shuichiro URATA. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Jazz derived system dma driver. Handles resource allocation and
* logical (virtual) address remaping.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/malloc.h>
#include <sys/extent.h>
#include <sys/device.h>
#include <vm/vm.h>
#include <machine/autoconf.h>
#include <machine/bus.h>
#include <arc/pica/pica.h>
#include <arc/jazz/jazzdmatlbreg.h>
#include <arc/jazz/jazzdmatlbvar.h>
extern paddr_t kvtophys __P((vaddr_t)); /* XXX */
/*
* Currently, only NET and BIO devices use DMA, and splnet > splbio.
*/
#define spldma() splnet()
#define NDMATLB (JAZZ_DMATLB_SIZE / sizeof(jazz_dma_pte_t))
static bus_space_tag_t dmatlb_iot;
static bus_space_handle_t dmatlb_ioh;
static struct extent *dmatlbmap;
static jazz_dma_pte_t *dma_tlb;
/*
* Initialize the dma mapping register area and pool.
*/
void
jazz_dmatlb_init(iot, ioaddr)
bus_space_tag_t iot;
bus_addr_t ioaddr;
{
int err;
dmatlb_iot = iot;
err = bus_space_map(iot, ioaddr, JAZZ_DMATLB_REGSIZE, 0, &dmatlb_ioh);
if (err != 0)
panic("jazz_dmatlb_init: cannot map 0x%x\n", ioaddr);
dma_tlb = (jazz_dma_pte_t *)PICA_TL_BASE;
mips3_FlushCache(); /* Make sure no map entries are cached */
bzero((char *)dma_tlb, JAZZ_DMATLB_SIZE);
dmatlbmap = extent_create("dmatlb", 0, NDMATLB, M_DEVBUF, NULL, NULL,
EX_NOWAIT);
if (dmatlbmap == NULL)
panic("jazz_dmatlb_init: cannot create extent map");
bus_space_write_4(dmatlb_iot, dmatlb_ioh, JAZZ_DMATLBREG_MAP,
MIPS_KSEG1_TO_PHYS(dma_tlb));
bus_space_write_4(dmatlb_iot, dmatlb_ioh, JAZZ_DMATLBREG_LIMIT,
JAZZ_DMATLB_SIZE);
jazz_dmatlb_flush();
}
/*
* Allocate an array of 'size' DMA PTEs.
* Return address to first pte.
*/
jazz_dma_pte_t *
jazz_dmatlb_alloc(npte, boundary, flags, addr)
int npte;
bus_size_t boundary;
int flags;
bus_addr_t *addr;
{
u_long start;
int err;
int s;
s = spldma();
err = extent_alloc(dmatlbmap, npte, 1, boundary / JAZZ_DMA_PAGE_SIZE,
(flags & BUS_DMA_WAITOK) ? (EX_WAITSPACE | EX_WAITOK) : EX_NOWAIT,
&start);
splx(s);
if (err)
return (NULL);
*addr = start * JAZZ_DMA_PAGE_SIZE;
return (dma_tlb + start);
}
/*
* Free an array of DMA PTEs.
*/
void
jazz_dmatlb_free(addr, npte)
bus_addr_t addr;
int npte;
{
u_long start;
int s;
start = addr / JAZZ_DMA_PAGE_SIZE;
s = spldma();
extent_free(dmatlbmap, start, npte, EX_NOWAIT);
splx(s);
}
/*
* Map up a virtual address space in dma space given by
* the dma control structure.
*/
void
jazz_dmatlb_map_va(p, va, size, dma_pte)
struct proc *p;
vaddr_t va;
vsize_t size;
jazz_dma_pte_t *dma_pte;
{
paddr_t pa;
size = jazz_dma_page_round(size + jazz_dma_page_offs(va));
va &= JAZZ_DMA_PAGE_NUM;
while (size > 0) {
if (p != NULL)
(void)pmap_extract(p->p_vmspace->vm_map.pmap, va, &pa);
else
pa = kvtophys(va);
pa &= JAZZ_DMA_PAGE_NUM;
dma_pte->lo_addr = pa;
dma_pte->hi_addr = 0;
dma_pte++;
va += JAZZ_DMA_PAGE_SIZE;
size -= JAZZ_DMA_PAGE_SIZE;
}
}
/*
* Map up a physical address space in dma space given by
* the dma control structure.
*/
void
jazz_dmatlb_map_pa(pa, size, dma_pte)
paddr_t pa;
psize_t size;
jazz_dma_pte_t *dma_pte;
{
size = jazz_dma_page_round(size + jazz_dma_page_offs(pa));
pa &= JAZZ_DMA_PAGE_NUM;
while (size > 0) {
dma_pte->lo_addr = pa;
dma_pte->hi_addr = 0;
dma_pte++;
pa += JAZZ_DMA_PAGE_SIZE;
size -= JAZZ_DMA_PAGE_SIZE;
}
}
/*
* Prepare for new dma by flushing
*/
void
jazz_dmatlb_flush()
{
bus_space_write_4(dmatlb_iot, dmatlb_ioh, JAZZ_DMATLBREG_IVALID, 0);
}

69
sys/arch/arc/jazz/jazzdmatlbreg.h Normal file
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/* $NetBSD: jazzdmatlbreg.h,v 1.1 2000/06/09 05:22:23 soda Exp $ */
/* $OpenBSD: dma.h,v 1.3 1997/04/19 17:19:51 pefo Exp $ */
/*
* Copyright (c) 1996 Per Fogelstrom
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Per Fogelstrom.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* The R4030 system has four DMA channels capable of scatter/gather
* and full memory addressing. The maximum transfer length is 1Mb.
* DMA snopes the L2 cache so no precaution is required. However
* if L1 cache is cached 'write back' the processor is responible
* for flushing/invalidating it.
*
* The DMA mapper has up to 4096 page descriptors.
*/
/* XXX */
#define PICA_TL_BASE 0xa0008000 /* Base of tl register area */
#define JAZZ_DMATLB_SIZE 0x00008000 /* Size of tl register area */
#define JAZZ_DMATLBREG_MAP 0x00 /* DMA transl. table base */
#define JAZZ_DMATLBREG_LIMIT 0x08 /* DMA transl. table limit */
#define JAZZ_DMATLBREG_IVALID 0x10 /* DMA transl. cache inval */
#define JAZZ_DMATLB_REGSIZE 0x18 /* size of bus_space region */
#define JAZZ_DMA_PAGE_SIZE 0x00001000 /* Address page size */
#define JAZZ_DMA_PAGE_OFFS (JAZZ_DMA_PAGE_SIZE-1) /* page offset */
#define JAZZ_DMA_PAGE_NUM (~JAZZ_DMA_PAGE_OFFS) /* page number */
#define jazz_dma_page_offs(x) \
((int)(x) & JAZZ_DMA_PAGE_OFFS)
#define jazz_dma_page_round(x) \
(((int)(x) + JAZZ_DMA_PAGE_OFFS) & JAZZ_DMA_PAGE_NUM)
/*
* DMA TLB entry
*/
typedef struct jazz_dma_pte {
u_int32_t lo_addr; /* Low part of translation addr */
u_int32_t hi_addr; /* High part of translation addr */
} jazz_dma_pte_t;

38
sys/arch/arc/jazz/jazzdmatlbvar.h Normal file
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/* $NetBSD: jazzdmatlbvar.h,v 1.1 2000/06/09 05:22:23 soda Exp $ */
/*-
* Copyright (C) 2000 Shuichiro URATA. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
void jazz_dmatlb_init __P((bus_space_tag_t iot, bus_addr_t ioaddr));
jazz_dma_pte_t *jazz_dmatlb_alloc __P((int npte, bus_size_t boundary,
int flags, bus_addr_t *addr));
void jazz_dmatlb_free __P((bus_addr_t addr, int npte));
void jazz_dmatlb_map_va __P((struct proc *p, vaddr_t va, vsize_t size,
jazz_dma_pte_t *dma_pte));
void jazz_dmatlb_map_pa __P((paddr_t pa, psize_t size,
jazz_dma_pte_t *dma_pte));
void jazz_dmatlb_flush __P((void));