From 317868fba7b5a4a183cc3a6dc961c5e258dccfc3 Mon Sep 17 00:00:00 2001 From: jmcneill Date: Wed, 11 Nov 2015 12:49:10 +0000 Subject: [PATCH] make VDD_CPU programming a bit easier to understand, and while here, actually program it to 1.4V as intended instead of 1.39V --- sys/arch/arm/nvidia/soc_tegra124.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/sys/arch/arm/nvidia/soc_tegra124.c b/sys/arch/arm/nvidia/soc_tegra124.c index 53beab1f4378..34b2448a1dd7 100644 --- a/sys/arch/arm/nvidia/soc_tegra124.c +++ b/sys/arch/arm/nvidia/soc_tegra124.c @@ -1,4 +1,4 @@ -/* $NetBSD: soc_tegra124.c,v 1.6 2015/06/03 11:43:18 skrll Exp $ */ +/* $NetBSD: soc_tegra124.c,v 1.7 2015/11/11 12:49:10 jmcneill Exp $ */ /*- * Copyright (c) 2015 Jared D. McNeill @@ -30,7 +30,7 @@ #include "opt_multiprocessor.h" #include -__KERNEL_RCSID(0, "$NetBSD: soc_tegra124.c,v 1.6 2015/06/03 11:43:18 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: soc_tegra124.c,v 1.7 2015/11/11 12:49:10 jmcneill Exp $"); #include #include @@ -77,9 +77,12 @@ static struct tegra124_cpufreq_rate { void tegra124_cpuinit(void) { - /* Set VDD_CPU voltage to 1.4V */ tegra_car_periph_i2c_enable(4, 204000000); - tegra_i2c_dvc_write(0x40, 0x4f00, 2); + + /* Set VDD_CPU voltage to 1.4V */ + const u_int target_mv = 1400; + const u_int sd0_vsel = (target_mv - 600) / 10; + tegra_i2c_dvc_write(0x40, (sd0_vsel << 8) | 00, 2); delay(10000); tegra_cpufreq_register(&tegra124_cpufreq_func);