bit better now, fixes from me & charles. squishy squishy squishy. HI ADAM!
This commit is contained in:
deraadt
parent
f35e488b02
commit
30c24e4508
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@ -21,7 +21,7 @@
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: if_ep.c,v 1.33 1994/04/23 04:31:12 hpeyerl Exp $
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* $Id: if_ep.c,v 1.34 1994/04/24 02:48:10 deraadt Exp $
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*/
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#include "bpfilter.h"
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@ -84,6 +84,7 @@ struct ep_softc {
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int next_mb; /* Which mbuf to use next. */
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int last_mb; /* Last mbuf. */
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int tx_start_thresh; /* Current TX_start_thresh. */
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int tx_succ_ok; /* # packets sent in sequence w/o underrun */
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caddr_t bpf; /* BPF "magic cookie" */
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char bus32bit; /* 32bit access possible */
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};
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@ -172,7 +173,7 @@ epprobe(parent, self, aux)
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k = (k & 0x1f) * 0x10 + 0x200;
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k2 = inw(port + EP_W0_RESOURCE_CFG);
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k2 >>= 12;
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epaddcard(port, k2, 0);
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epaddcard(port, k2, 1);
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}
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/* find all isa cards */
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@ -356,6 +357,8 @@ epattach(parent, self, aux)
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bpfattach(&sc->bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
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#endif
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sc->tx_start_thresh = 20; /* probably a good starting point. */
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sc->sc_ih.ih_fun = epintr;
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sc->sc_ih.ih_arg = sc;
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sc->sc_ih.ih_level = IPL_NET;
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@ -414,8 +417,6 @@ epinit(sc)
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ifp->if_flags |= IFF_RUNNING;
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ifp->if_flags &= ~IFF_OACTIVE; /* just in case */
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sc->tx_start_thresh = 20; /* probably a good starting point. */
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/* Store up a bunch of mbuf's for use later. (MAX_MBS). */
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epmbuffill(sc);
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epstart(ifp);
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@ -512,13 +513,17 @@ startagain:
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goto readcheck;
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}
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outw(BASE + EP_COMMAND, SET_TX_AVAIL_THRESH | (len + pad + 4));
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if (inw(BASE + EP_W1_FREE_TX) < len + pad + 4) {
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/* no room in FIFO */
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outw(BASE + EP_COMMAND, SET_TX_AVAIL_THRESH | (len + pad + 4));
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/* not enough room in FIFO */
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sc->ep_ac.ac_if.if_flags |= IFF_OACTIVE;
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splx(s);
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return (0);
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} else {
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outw(BASE + EP_COMMAND, SET_TX_AVAIL_THRESH | 2044);
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outw(BASE + EP_COMMAND, ACK_INTR | S_TX_AVAIL);
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}
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IF_DEQUEUE(&sc->ep_ac.ac_if.if_snd, m);
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if (m == 0) { /* not really needed */
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splx(s);
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@ -633,73 +638,71 @@ int
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epintr(sc)
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register struct ep_softc *sc;
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{
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int status, i;
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struct ifnet *ifp = &sc->ep_ac.ac_if;
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u_short status;
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int i, ret = 0;
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status = 0;
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status = inw(BASE + EP_STATUS) &
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(S_TX_COMPLETE | S_TX_AVAIL | S_RX_COMPLETE | S_CARD_FAILURE);
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if (status == 0) {
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/* No interrupts. */
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outw(BASE + EP_COMMAND, C_INTR_LATCH);
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return (0);
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}
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loop:
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/* important that we do this first. */
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outw(BASE + EP_COMMAND, ACK_INTR | status);
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while (status) {
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ret = 1;
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/* important that we do this first. */
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outw(BASE + EP_COMMAND, ACK_INTR | status);
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if (status & S_RX_COMPLETE) {
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status &= ~S_RX_COMPLETE;
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epread(sc);
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}
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if (status & S_TX_AVAIL) {
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status &= ~S_TX_AVAIL;
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inw(BASE + EP_W1_FREE_TX);
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sc->ep_ac.ac_if.if_flags &= ~IFF_OACTIVE;
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epstart(&sc->ep_ac.ac_if);
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}
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if (status & S_CARD_FAILURE) {
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printf("%s: reset (status: %x)\n", sc->sc_dev.dv_xname, status);
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outw(BASE + EP_COMMAND, C_INTR_LATCH);
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epreset(sc);
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return (1);
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}
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if (status & S_TX_COMPLETE) {
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status &= ~S_TX_COMPLETE;
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/*
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* We need to read TX_STATUS until we get a 0 status in
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* order to turn off the interrupt flag.
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*/
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while ((i = inb(BASE + EP_W1_TX_STATUS)) & TXS_COMPLETE) {
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outw(BASE + EP_W1_TX_STATUS, 0x0);
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if (i & (TXS_MAX_COLLISION | TXS_JABBER | TXS_UNDERRUN)) {
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if (i & TXS_MAX_COLLISION)
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++sc->ep_ac.ac_if.if_collisions;
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if (i & (TXS_JABBER | TXS_UNDERRUN)) {
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outw(BASE + EP_COMMAND, TX_RESET);
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if (i & TXS_UNDERRUN) {
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if (sc->tx_start_thresh < ETHER_MAX_LEN) {
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sc->tx_start_thresh += 20;
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outw(BASE + EP_COMMAND,
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SET_TX_START_THRESH |
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sc->tx_start_thresh);
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}
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}
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}
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outw(BASE + EP_COMMAND, TX_ENABLE);
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++sc->ep_ac.ac_if.if_oerrors;
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}
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if (status & S_RX_COMPLETE)
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epread(sc);
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if (status & S_TX_AVAIL) {
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inw(BASE + EP_W1_FREE_TX);
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sc->ep_ac.ac_if.if_flags &= ~IFF_OACTIVE;
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epstart(&sc->ep_ac.ac_if);
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}
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epstart(ifp);
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if (status & S_CARD_FAILURE) {
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printf("%s: adapter failure (%x)\n",
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sc->sc_dev.dv_xname, status);
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outw(BASE + EP_COMMAND, C_INTR_LATCH);
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epreset(sc);
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return (1);
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}
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if (status & S_TX_COMPLETE) {
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/*
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* We need to read+write TX_STATUS until we get a 0 status
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* in order to turn off the interrupt flag.
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*/
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while ((i = inb(BASE + EP_W1_TX_STATUS)) & TXS_COMPLETE) {
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outw(BASE + EP_W1_TX_STATUS, 0x0);
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if (i & TXS_JABBER) {
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++sc->ep_ac.ac_if.if_oerrors;
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untimeout(epmbuffill, sc);
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printf("%s: jabber (%x %x)\n",
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sc->sc_dev.dv_xname, status, i);
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epreset(sc);
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} else if (i & TXS_UNDERRUN) {
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++sc->ep_ac.ac_if.if_oerrors;
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untimeout(epmbuffill, sc);
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printf("%s: fifo underrun (%x %x), correcting\n",
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sc->sc_dev.dv_xname, status, i);
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if (sc->tx_succ_ok < 100)
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sc->tx_start_thresh = MIN(ETHER_MAX_LEN,
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sc->tx_start_thresh + 20);
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sc->tx_succ_ok = 0;
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epreset(sc);
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} else if (i & TXS_MAX_COLLISION) {
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++sc->ep_ac.ac_if.if_collisions;
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outw(BASE + EP_COMMAND, TX_ENABLE);
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sc->ep_ac.ac_if.if_flags &= ~IFF_OACTIVE;
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} else
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sc->tx_succ_ok = (sc->tx_succ_ok+1) & 128;
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}
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epstart(ifp);
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}
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status = inw(BASE + EP_STATUS) &
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(S_TX_COMPLETE | S_TX_AVAIL | S_RX_COMPLETE | S_CARD_FAILURE);
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}
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status = inw(BASE + EP_STATUS) &
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(S_TX_COMPLETE | S_TX_AVAIL | S_RX_COMPLETE | S_CARD_FAILURE);
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if (status == 0) {
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/* No interrupts. */
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outw(BASE + EP_COMMAND, C_INTR_LATCH);
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return (1);
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}
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goto loop;
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/* no more interrupts */
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outw(BASE + EP_COMMAND, C_INTR_LATCH);
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return (ret);
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}
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static void
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@ -1030,12 +1033,12 @@ epbusyeeprom(sc)
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break;
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}
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if (!i) {
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printf("\n%s: eeprom failed to come ready.\n",
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printf("\n%s: eeprom failed to come ready\n",
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sc->sc_dev.dv_xname);
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return (1);
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}
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if (j & EEPROM_TST_MODE) {
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printf("\n%s: 3c509 in test mode. Erase pencil mark!\n",
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printf("\n%s: 3c509 is in test mode -- erase pencil mark!\n",
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sc->sc_dev.dv_xname);
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return (1);
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}
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@ -21,7 +21,7 @@
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: if_ep.c,v 1.33 1994/04/23 04:31:12 hpeyerl Exp $
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* $Id: if_ep.c,v 1.34 1994/04/24 02:48:10 deraadt Exp $
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*/
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#include "bpfilter.h"
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@ -84,6 +84,7 @@ struct ep_softc {
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int next_mb; /* Which mbuf to use next. */
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int last_mb; /* Last mbuf. */
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int tx_start_thresh; /* Current TX_start_thresh. */
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int tx_succ_ok; /* # packets sent in sequence w/o underrun */
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caddr_t bpf; /* BPF "magic cookie" */
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char bus32bit; /* 32bit access possible */
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};
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@ -172,7 +173,7 @@ epprobe(parent, self, aux)
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k = (k & 0x1f) * 0x10 + 0x200;
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k2 = inw(port + EP_W0_RESOURCE_CFG);
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k2 >>= 12;
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epaddcard(port, k2, 0);
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epaddcard(port, k2, 1);
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}
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/* find all isa cards */
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@ -356,6 +357,8 @@ epattach(parent, self, aux)
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bpfattach(&sc->bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
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#endif
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sc->tx_start_thresh = 20; /* probably a good starting point. */
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sc->sc_ih.ih_fun = epintr;
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sc->sc_ih.ih_arg = sc;
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sc->sc_ih.ih_level = IPL_NET;
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@ -414,8 +417,6 @@ epinit(sc)
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ifp->if_flags |= IFF_RUNNING;
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ifp->if_flags &= ~IFF_OACTIVE; /* just in case */
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sc->tx_start_thresh = 20; /* probably a good starting point. */
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/* Store up a bunch of mbuf's for use later. (MAX_MBS). */
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epmbuffill(sc);
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epstart(ifp);
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@ -512,13 +513,17 @@ startagain:
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goto readcheck;
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}
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outw(BASE + EP_COMMAND, SET_TX_AVAIL_THRESH | (len + pad + 4));
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if (inw(BASE + EP_W1_FREE_TX) < len + pad + 4) {
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/* no room in FIFO */
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outw(BASE + EP_COMMAND, SET_TX_AVAIL_THRESH | (len + pad + 4));
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/* not enough room in FIFO */
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sc->ep_ac.ac_if.if_flags |= IFF_OACTIVE;
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splx(s);
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return (0);
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} else {
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outw(BASE + EP_COMMAND, SET_TX_AVAIL_THRESH | 2044);
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outw(BASE + EP_COMMAND, ACK_INTR | S_TX_AVAIL);
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}
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IF_DEQUEUE(&sc->ep_ac.ac_if.if_snd, m);
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if (m == 0) { /* not really needed */
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splx(s);
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@ -633,73 +638,71 @@ int
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epintr(sc)
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register struct ep_softc *sc;
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{
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int status, i;
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struct ifnet *ifp = &sc->ep_ac.ac_if;
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u_short status;
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int i, ret = 0;
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status = 0;
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status = inw(BASE + EP_STATUS) &
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(S_TX_COMPLETE | S_TX_AVAIL | S_RX_COMPLETE | S_CARD_FAILURE);
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if (status == 0) {
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/* No interrupts. */
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outw(BASE + EP_COMMAND, C_INTR_LATCH);
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return (0);
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}
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loop:
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/* important that we do this first. */
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outw(BASE + EP_COMMAND, ACK_INTR | status);
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while (status) {
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ret = 1;
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/* important that we do this first. */
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outw(BASE + EP_COMMAND, ACK_INTR | status);
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if (status & S_RX_COMPLETE) {
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status &= ~S_RX_COMPLETE;
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epread(sc);
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}
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if (status & S_TX_AVAIL) {
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status &= ~S_TX_AVAIL;
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inw(BASE + EP_W1_FREE_TX);
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sc->ep_ac.ac_if.if_flags &= ~IFF_OACTIVE;
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epstart(&sc->ep_ac.ac_if);
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}
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if (status & S_CARD_FAILURE) {
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printf("%s: reset (status: %x)\n", sc->sc_dev.dv_xname, status);
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outw(BASE + EP_COMMAND, C_INTR_LATCH);
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epreset(sc);
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return (1);
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}
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if (status & S_TX_COMPLETE) {
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status &= ~S_TX_COMPLETE;
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/*
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* We need to read TX_STATUS until we get a 0 status in
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* order to turn off the interrupt flag.
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*/
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while ((i = inb(BASE + EP_W1_TX_STATUS)) & TXS_COMPLETE) {
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outw(BASE + EP_W1_TX_STATUS, 0x0);
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if (i & (TXS_MAX_COLLISION | TXS_JABBER | TXS_UNDERRUN)) {
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if (i & TXS_MAX_COLLISION)
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++sc->ep_ac.ac_if.if_collisions;
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if (i & (TXS_JABBER | TXS_UNDERRUN)) {
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outw(BASE + EP_COMMAND, TX_RESET);
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if (i & TXS_UNDERRUN) {
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if (sc->tx_start_thresh < ETHER_MAX_LEN) {
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sc->tx_start_thresh += 20;
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outw(BASE + EP_COMMAND,
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SET_TX_START_THRESH |
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sc->tx_start_thresh);
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}
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}
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}
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outw(BASE + EP_COMMAND, TX_ENABLE);
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++sc->ep_ac.ac_if.if_oerrors;
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}
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if (status & S_RX_COMPLETE)
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epread(sc);
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if (status & S_TX_AVAIL) {
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inw(BASE + EP_W1_FREE_TX);
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sc->ep_ac.ac_if.if_flags &= ~IFF_OACTIVE;
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epstart(&sc->ep_ac.ac_if);
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}
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epstart(ifp);
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if (status & S_CARD_FAILURE) {
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printf("%s: adapter failure (%x)\n",
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sc->sc_dev.dv_xname, status);
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outw(BASE + EP_COMMAND, C_INTR_LATCH);
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epreset(sc);
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return (1);
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}
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if (status & S_TX_COMPLETE) {
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/*
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* We need to read+write TX_STATUS until we get a 0 status
|
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* in order to turn off the interrupt flag.
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*/
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while ((i = inb(BASE + EP_W1_TX_STATUS)) & TXS_COMPLETE) {
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outw(BASE + EP_W1_TX_STATUS, 0x0);
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if (i & TXS_JABBER) {
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++sc->ep_ac.ac_if.if_oerrors;
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untimeout(epmbuffill, sc);
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printf("%s: jabber (%x %x)\n",
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sc->sc_dev.dv_xname, status, i);
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epreset(sc);
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} else if (i & TXS_UNDERRUN) {
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++sc->ep_ac.ac_if.if_oerrors;
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untimeout(epmbuffill, sc);
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printf("%s: fifo underrun (%x %x), correcting\n",
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sc->sc_dev.dv_xname, status, i);
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if (sc->tx_succ_ok < 100)
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sc->tx_start_thresh = MIN(ETHER_MAX_LEN,
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sc->tx_start_thresh + 20);
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sc->tx_succ_ok = 0;
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epreset(sc);
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} else if (i & TXS_MAX_COLLISION) {
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++sc->ep_ac.ac_if.if_collisions;
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outw(BASE + EP_COMMAND, TX_ENABLE);
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sc->ep_ac.ac_if.if_flags &= ~IFF_OACTIVE;
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} else
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sc->tx_succ_ok = (sc->tx_succ_ok+1) & 128;
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}
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epstart(ifp);
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}
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status = inw(BASE + EP_STATUS) &
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(S_TX_COMPLETE | S_TX_AVAIL | S_RX_COMPLETE | S_CARD_FAILURE);
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}
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status = inw(BASE + EP_STATUS) &
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(S_TX_COMPLETE | S_TX_AVAIL | S_RX_COMPLETE | S_CARD_FAILURE);
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if (status == 0) {
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/* No interrupts. */
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outw(BASE + EP_COMMAND, C_INTR_LATCH);
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return (1);
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}
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goto loop;
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/* no more interrupts */
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outw(BASE + EP_COMMAND, C_INTR_LATCH);
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return (ret);
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}
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static void
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@ -1030,12 +1033,12 @@ epbusyeeprom(sc)
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break;
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}
|
||||
if (!i) {
|
||||
printf("\n%s: eeprom failed to come ready.\n",
|
||||
printf("\n%s: eeprom failed to come ready\n",
|
||||
sc->sc_dev.dv_xname);
|
||||
return (1);
|
||||
}
|
||||
if (j & EEPROM_TST_MODE) {
|
||||
printf("\n%s: 3c509 in test mode. Erase pencil mark!\n",
|
||||
printf("\n%s: 3c509 is in test mode -- erase pencil mark!\n",
|
||||
sc->sc_dev.dv_xname);
|
||||
return (1);
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue