From 3066bbbbf8b7f95f9650cade41cbfd0b5f95ae7e Mon Sep 17 00:00:00 2001 From: riastradh Date: Sat, 9 Apr 2022 12:07:17 +0000 Subject: [PATCH] x86: Omit needless store in membar_producer/exit. On x86, every store is a store-release, so there is no need for any barrier. But this wasn't a barrier anyway; it was just a store, which was redundant with the store of the return address to the stack implied by CALL even if issuing a store made a difference. --- common/lib/libc/arch/i386/atomic/atomic.S | 9 ++++++--- common/lib/libc/arch/x86_64/atomic/atomic.S | 9 ++++++--- 2 files changed, 12 insertions(+), 6 deletions(-) diff --git a/common/lib/libc/arch/i386/atomic/atomic.S b/common/lib/libc/arch/i386/atomic/atomic.S index fe29a5294a48..ea7520233269 100644 --- a/common/lib/libc/arch/i386/atomic/atomic.S +++ b/common/lib/libc/arch/i386/atomic/atomic.S @@ -1,4 +1,4 @@ -/* $NetBSD: atomic.S,v 1.31 2022/04/09 12:07:00 riastradh Exp $ */ +/* $NetBSD: atomic.S,v 1.32 2022/04/09 12:07:17 riastradh Exp $ */ /*- * Copyright (c) 2007 The NetBSD Foundation, Inc. @@ -188,8 +188,11 @@ ENTRY(_membar_consumer) END(_membar_consumer) ENTRY(_membar_producer) - /* A store is enough */ - movl $0, -4(%esp) + /* + * Every store to normal memory is a store-release on x86, so + * there is never any need for explicit barriers to order + * anything-before-store. + */ ret END(_membar_producer) diff --git a/common/lib/libc/arch/x86_64/atomic/atomic.S b/common/lib/libc/arch/x86_64/atomic/atomic.S index 1a627c221c79..4e845abca91d 100644 --- a/common/lib/libc/arch/x86_64/atomic/atomic.S +++ b/common/lib/libc/arch/x86_64/atomic/atomic.S @@ -1,4 +1,4 @@ -/* $NetBSD: atomic.S,v 1.24 2022/04/09 12:07:00 riastradh Exp $ */ +/* $NetBSD: atomic.S,v 1.25 2022/04/09 12:07:17 riastradh Exp $ */ /*- * Copyright (c) 2007 The NetBSD Foundation, Inc. @@ -263,8 +263,11 @@ ENTRY(_membar_consumer) END(_membar_consumer) ENTRY(_membar_producer) - /* A store is enough */ - movq $0, -8(%rsp) + /* + * Every store to normal memory is a store-release on x86, so + * there is never any need for explicit barriers to order + * anything-before-store. + */ ret END(_membar_producer)