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share/man/man4/tlp.4
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@ -1,4 +1,4 @@
.\" $NetBSD: tlp.4,v 1.14 2005/04/26 22:12:23 bad Exp $
.\" $NetBSD: tlp.4,v 1.15 2005/06/24 12:23:00 wiz Exp $
.\"
.\" Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
.\" All rights reserved.
@ -51,7 +51,8 @@
.Cd "options TLP_MATCH_21140"
.Cd "options TLP_MATCH_21142"
.Pp
Configuration of PHYs may also be necessary. See
Configuration of PHYs may also be necessary.
See
.Xr mii 4 .
.Sh DESCRIPTION
The
@ -97,12 +98,13 @@ driver supports the following chips:
.Bl -bullet -offset indent
.It
.Em DECchip 21040
-- This is the original Tulip Ethernet chip. It supports 10Mb/s speeds
over a built-in serial interface. The serial interface has support for
10BASE-T and AUI media. The AUI port may be connected to 10BASE5 AUI
or 10BASE2 BNC connectors, or both, selected by a gang jumper on the
board. Some boards connect the BNC connector to an external serial
interface. The driver has no way of knowing this, but the external
-- This is the original Tulip Ethernet chip.
It supports 10Mb/s speeds over a built-in serial interface.
The serial interface has support for 10BASE-T and AUI media.
The AUI port may be connected to 10BASE5 AUI or 10BASE2 BNC
connectors, or both, selected by a gang jumper on the board.
Some boards connect the BNC connector to an external serial interface.
The driver has no way of knowing this, but the external
serial interface may be selected with the
.Dq manual
media setting.
@ -112,10 +114,11 @@ many DEC AlphaStation and AlphaServer systems, ZNYX ZX312, ZX312T,
ZX314, ZX315, SMC 8432, SMC 8434, ACCTON EN1203, and some Cogent
multi-port boards.
.Pp
This chip also appears on the DEC DE-425 EISA Ethernet board. This board
is a DECchip 21040 and a PLX PCI glue chip, which provides the interface
to the EISA bus, and special address decoding so that the PCI configuration
space registers of the 21040 are accessible in normal EISA I/O space.
This chip also appears on the DEC DE-425 EISA Ethernet board.
This board is a DECchip 21040 and a PLX PCI glue chip, which provides
the interface to the EISA bus, and special address decoding so that
the PCI configuration space registers of the 21040 are accessible
in normal EISA I/O space.
.Pp
The very first versions of this chip were labeled
.Dq DC1003
@ -125,8 +128,9 @@ and
.Em DECchip 21041
-- This is the second chip in the Tulip family, dubbed
.Dq Tulip Plus .
It supports 10Mb/s speeds over a built-in serial interface. The serial
interface has support for 10BASE-T, 10BASE5 AUI, and 10BASE2 BNC media.
It supports 10Mb/s speeds over a built-in serial interface.
The serial interface has support for 10BASE-T, 10BASE5 AUI, and
10BASE2 BNC media.
The serial interface also includes support for IEEE 802.3u NWay over
the 10BASE-T interface, for negotiation of duplex mode with the link
partner.
@ -137,18 +141,21 @@ Boards that include this chip include the DEC DE-450 and some SMC boards.
-- This is the third chip in the Tulip family, dubbed
.Dq FasterNet .
It supports 10Mb/s speeds with a built-in 10BASE-T encoder/decoder,
and 100Mb/s speeds with a built-in 100BASE PCS function. Support
for 100BASE-TX and 100BASE-T4 is provided by a built-in scrambler.
and 100Mb/s speeds with a built-in 100BASE PCS function.
Support for 100BASE-TX and 100BASE-T4 is provided by a built-in
scrambler.
Support for 100BASE-FX is possible with an appropriate PMD connected
to the 100BASE PCS. The 21140 and 21140A also support 10Mb/s and
to the 100BASE PCS.
The 21140 and 21140A also support 10Mb/s and
100Mb/s speeds over an MII interface connected to one or more PHYs.
.Pp
The 21140 and 21140A include a general purpose I/O facility, which
may be used to toggle relays on the board. This facility is often
used to reset individual board modules (e.g. the MII bus), select
the output path of the chip (e.g. connect the UTP port on the board
to the PHY, built-in 10BASE-T ENDEC, or built-in 100BASE-T PMD), or
detect link status (by reading an output pin on the 100BASE-T magnetics).
may be used to toggle relays on the board.
This facility is often used to reset individual board modules (e.g.
the MII bus), select the output path of the chip (e.g. connect the
UTP port on the board to the PHY, built-in 10BASE-T ENDEC, or
built-in 100BASE-T PMD), or detect link status (by reading an output
pin on the 100BASE-T magnetics).
.Pp
The 21140 and 21140A use a standardized data structure located in
the SROM to describe how the chip should be programmed for various
@ -162,28 +169,32 @@ EM440T4 multi-port, Kingston KNE100TX, older versions of the NetGear FA-310TX,
SMC 9332, SMC 9334, ZNYX ZX34x multi-port, and Adaptec ANA-6944A/TX multi-port.
.It
.Em DECchip 21142 and 21143
-- These are the fourth and fifth chips in the Tulip family. While
they have two different chip numbers, the 21142 and 21143 are essentially
identical, with only minor differences related to available technology
at time of manufacture. Both chips include support for 10Mb/s speeds
over a built-in serial interface, and support for 10Mb/s and 100Mb/s
speeds over an MII interface connected to one or more PHYs. The
serial interface includes support for 10BASE-T, 10BASE5 AUI, and
10BASE2 BNC media, as well as support for IEEE 802.3u NWay over
-- These are the fourth and fifth chips in the Tulip family.
While they have two different chip numbers, the 21142 and 21143
are essentially identical, with only minor differences related to
available technology at time of manufacture.
Both chips include support for 10Mb/s speeds over a built-in serial
interface, and support for 10Mb/s and 100Mb/s speeds over an MII
interface connected to one or more PHYs.
The serial interface includes support for 10BASE-T, 10BASE5 AUI,
and 10BASE2 BNC media, as well as support for IEEE 802.3u NWay over
the 10BASE-T interface, for negotiation of duplex mode and link
speed with the link partner.
.Pp
The 21143 adds support for 100Mb/s speeds with a built-in
PCS function. Support for 100BASE-TX and 100BASE-T4 is provided by
a built-in scrambler. Support for 100BASE-FX is possible with an
PCS function.
Support for 100BASE-TX and 100BASE-T4 is provided by
a built-in scrambler.
Support for 100BASE-FX is possible with an
appropriate PMD connected to the 100BASE PCS.
.Pp
The 21142 and 21143 include a general purpose I/O facility, which
may be used to toggle relays on the board. This facility is often
used to reset individual board modules (e.g. the MII bus), select
the output path of the chip (e.g. connect the UTP port on the board
to the PHY, built-in serial interface, or built-in 100BASE-T PMD), or
detect link status (by reading an output pin on the 100BASE-T magnetics).
may be used to toggle relays on the board.
This facility is often used to reset individual board modules (e.g.
the MII bus), select the output path of the chip (e.g. connect the
UTP port on the board to the PHY, built-in serial interface, or
built-in 100BASE-T PMD), or detect link status (by reading an output
pin on the 100BASE-T magnetics).
.Pp
The 21142 and 21143 use a standardized data structure located in
the SROM to describe how the chip should be programmed for various
@ -205,11 +216,12 @@ card, and the Compu-Shack FASTline-II PCI boards.
.Dq PNIC ,
were some of the first commonly-available Tulip clones,
appearing on low-cost boards when it became difficult for board
vendors to obtain DECchip 21140A parts. They include support for
10Mb/s speeds over a built-in 10BASE-T encoder/decoder, and 100Mb/s
speeds over a built-in PCS function. Support for 100BASE-TX and
100BASE-T4 is provided by a built-in scrambler and transceiver
module. The transceiver module also includes support for NWay,
vendors to obtain DECchip 21140A parts.
They include support for 10Mb/s speeds over a built-in 10BASE-T
encoder/decoder, and 100Mb/s speeds over a built-in PCS function.
Support for 100BASE-TX and 100BASE-T4 is provided by a built-in
scrambler and transceiver module.
The transceiver module also includes support for NWay,
for negotiating duplex mode and link speed with the link partner.
These chips also include support for 10Mb/s and 100Mb/s speeds over
and MII interface connected to one or more PHYs.
@ -230,21 +242,25 @@ FA-310TX, the Kingston KNE110TX, and some older LinkSys LNE100TX boards.
.Em Macronix 98713, 98713A, 98715, 98715A, and 98725
-- Of all the clones, these chips, dubbed
.Dq PMAC ,
are the best. They are very close clones of their respective
are the best.
They are very close clones of their respective
originals, with the exception of some slight programming magic
necessary to work around an apparent hardware bug.
.Pp
The 98713 is a DECchip 21140A clone. It includes all of the 21140A's
features, and uses the same SROM data format.
The 98713 is a DECchip 21140A clone.
It includes all of the 21140A's features, and uses the same SROM
data format.
.Pp
The 98713A is a half-clone of the DECchip 21143. It has support for
serial, PCS, and MII media. The serial interface has a built-in
NWay function. However, the 98713A does not have a GPIO facility, and,
The 98713A is a half-clone of the DECchip 21143.
It has support for serial, PCS, and MII media.
The serial interface has a built-in NWay function.
However, the 98713A does not have a GPIO facility, and,
as a result, usually does not use the same SROM format as the 21143 (no
need for GPIO programming information).
.Pp
The 98715, 98715A, and 98725 are more 21143-like, but lack the GPIO
facility and MII. These chips also support ACPI power management.
facility and MII.
These chips also support ACPI power management.
.Pp
Boards that include the Macronix chips include some SVEC boards,
some SOHOWare boards, and the Compex RL100TX.
@ -252,27 +268,27 @@ some SOHOWare boards, and the Compex RL100TX.
.Em Lite-On/Macronix 82C115
-- This chip, dubbed the
.Dq PNIC-II ,
was co-designed by Lite-On and Macronix. It is almost identical to
the Macronix 98725, with a few exceptions: it has Wake-On-LAN support,
uses a 128-bit receive filter hash table, and supports IEEE 802.3x
flow control.
was co-designed by Lite-On and Macronix.
It is almost identical to the Macronix 98725, with a few exceptions:
it has Wake-On-LAN support, uses a 128-bit receive filter hash
table, and supports IEEE 802.3x flow control.
.Pp
Boards that include the 82C115 include the newer LinkSys (Version 2)
LNE100TX boards.
.It
.Em Winbond 89C840F
-- This chip is a very low-end barely-a-clone of the 21140. It supports
10Mb/s and 100Mb/s speeds over an MII interface only, and has several
programming differences from the 21140.
-- This chip is a very low-end barely-a-clone of the 21140.
It supports 10Mb/s and 100Mb/s speeds over an MII interface only,
and has several programming differences from the 21140.
.Pp
The receive filter is completely different: it supports only a single
perfect match, and has only a 64-bit multicast filter hash table. The
receive filter is programmed using special registers rather than the
standard Tulip setup frame.
perfect match, and has only a 64-bit multicast filter hash table.
The receive filter is programmed using special registers rather
than the standard Tulip setup frame.
.Pp
This chip is also plagued by a terrible DMA engine. The chip must be
run in store-and-forward mode or it will often transmit garbage onto
the wire.
This chip is also plagued by a terrible DMA engine.
The chip must be run in store-and-forward mode or it will often
transmit garbage onto the wire.
.Pp
Interrupt pacing is also less flexible on the chip.
.Pp
@ -281,10 +297,11 @@ some Unicom 10/100 boards, and several no-name 10/100 boards.
.It
.Em ADMtek AL981
-- This chip is a low cost, single-chip (sans magnetics) 10/100 Ethernet
implementation. It supports 10Mb/s and 100Mb/s speeds over an internal
PHY. There is no generic MII bus; instead the IEEE 802.3u-compliant PHY
is accessed via special registers on the chip. This chip also supports
Wake-On-LAN and IEEE 802.3x flow control.
implementation.
It supports 10Mb/s and 100Mb/s speeds over an internal PHY.
There is no generic MII bus; instead the IEEE 802.3u-compliant PHY
is accessed via special registers on the chip.
This chip also supports Wake-On-LAN and IEEE 802.3x flow control.
.Pp
The receive filter on the AL981 is completely different: it supports only
a single perfect match, and has only a 64-bit multicast filter hash table.
@ -295,19 +312,22 @@ This chip also supports ACPI power management.
.Pp
A list of boards which include the AL981 is not yet available.
.Pp
Support for the AL981 has not yet been tested. If you have a board
Support for the AL981 has not yet been tested.
If you have a board
which uses this chip, please contact the author (listed below).
.It
.Em Xircom X3201-3
-- This chip is a CardBus 21143 clone with a loosely-coupled modem
function (the modem is on a separate CardBus function, but the MAC
portion includes a shadow of its interrupt status). Media is provided
by an IEEE 802.3u-compliant PHY connected to an MII interface. These
chips have no SROM; instead, the MAC address must be obtained from the
card's CIS information. Unlike most other Tulip-like chips, the X3201-3
requires that transmit buffers be aligned to a 4-byte boundary. This
virtually ensures that each outgoing packet must be copied into an aligned
buffer, since the Ethernet header is 14 bytes long.
portion includes a shadow of its interrupt status).
Media is provided
by an IEEE 802.3u-compliant PHY connected to an MII interface.
These chips have no SROM; instead, the MAC address must be obtained
from the card's CIS information.
Unlike most other Tulip-like chips, the X3201-3
requires that transmit buffers be aligned to a 4-byte boundary.
This virtually ensures that each outgoing packet must be copied
into an aligned buffer, since the Ethernet header is 14 bytes long.
.Pp
This chip also supports ACPI power management.
.Pp
@ -315,11 +335,12 @@ This chip is found in Xircom RealPort(tm) 10/100 CardBus Ethernet/Modem
cards, as well as some Intel OEM'd RealPort(tm) cards.
.It
.Em Davicom DM9102 and DM9102A
-- These chips are 21104A-like with a few minor exceptions. Media is
provided by an internal IEEE 802.3u-compliant PHY accessed as if it
were connected to a normal MII interface. The DM9102A also provides
an external MII interface, to which a HomePNA 1 PHY is typically
connected. The DM9102A also includes support for CardBus.
-- These chips are 21104A-like with a few minor exceptions.
Media is provided by an internal IEEE 802.3u-compliant PHY accessed
as if it were connected to a normal MII interface.
The DM9102A also provides an external MII interface, to which a
HomePNA 1 PHY is typically connected.
The DM9102A also includes support for CardBus.
.Pp
This chip also supports ACPI power management and Wake-On-LAN.
.Pp
@ -332,7 +353,8 @@ Media selection done using
.Xr ifconfig 8
using the standard
.Xr ifmedia 4
mechanism. Refer to those manual pages for more information.
mechanism.
Refer to those manual pages for more information.
.\" .Sh DIAGNOSTICS
.\" XXX too be done.
.Sh SEE ALSO
@ -511,10 +533,11 @@ The author may be contacted at
The
.Nm
driver does not match the DECchip 21040, 21041, 21140, 21142, and 21143
chips on the PCI bus by default. That is because another driver,
chips on the PCI bus by default.
That is because another driver,
.Nm de ,
which is more functional in some circumstances, exists for them. In
order for support for these chips to be activated in
which is more functional in some circumstances, exists for them.
In order for support for these chips to be activated in
.Nm tlp ,
either
.Nm de