Use #define<space> for consistency.
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tsutsui
parent
48c586e2b6
commit
2f451ddebd
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@ -1,4 +1,4 @@
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/* $NetBSD: locore.h,v 1.69 2005/09/08 15:13:23 tsutsui Exp $ */
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/* $NetBSD: locore.h,v 1.70 2005/10/30 04:40:43 tsutsui Exp $ */
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/*
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* Copyright 1996 The Board of Trustees of The Leland Stanford
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@ -22,7 +22,7 @@
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*/
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#ifndef _MIPS_LOCORE_H
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#define _MIPS_LOCORE_H
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#define _MIPS_LOCORE_H
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#ifndef _LKM
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#include "opt_cputype.h"
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@ -231,10 +231,10 @@ extern long *mips_locoresw[];
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#define proc_trampoline mips3_proc_trampoline
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#define wbflush() mips3_wbflush()
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#elif !defined(MIPS1) && !defined(MIPS3) && defined(MIPS32) && !defined(MIPS64)
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#define MachSetPID mips32_SetPID
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#define MIPS_TBIAP() mips32_TBIAP(mips_num_tlb_entries)
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#define MIPS_TBIS mips32_TBIS
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#define MachTLBUpdate mips32_TLBUpdate
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#define MachSetPID mips32_SetPID
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#define MIPS_TBIAP() mips32_TBIAP(mips_num_tlb_entries)
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#define MIPS_TBIS mips32_TBIS
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#define MachTLBUpdate mips32_TLBUpdate
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#define proc_trampoline mips32_proc_trampoline
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#define wbflush() mips32_wbflush()
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#elif !defined(MIPS1) && !defined(MIPS3) && !defined(MIPS32) && defined(MIPS64)
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@ -270,29 +270,29 @@ extern long *mips_locoresw[];
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*/
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typedef int mips_prid_t;
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#define MIPS_PRID_REV(x) (((x) >> 0) & 0x00ff)
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#define MIPS_PRID_IMPL(x) (((x) >> 8) & 0x00ff)
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#define MIPS_PRID_REV(x) (((x) >> 0) & 0x00ff)
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#define MIPS_PRID_IMPL(x) (((x) >> 8) & 0x00ff)
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/* pre-MIPS32/64 */
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#define MIPS_PRID_RSVD(x) (((x) >> 16) & 0xffff)
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#define MIPS_PRID_REV_MIN(x) ((MIPS_PRID_REV(x) >> 0) & 0x0f)
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#define MIPS_PRID_REV_MAJ(x) ((MIPS_PRID_REV(x) >> 4) & 0x0f)
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#define MIPS_PRID_RSVD(x) (((x) >> 16) & 0xffff)
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#define MIPS_PRID_REV_MIN(x) ((MIPS_PRID_REV(x) >> 0) & 0x0f)
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#define MIPS_PRID_REV_MAJ(x) ((MIPS_PRID_REV(x) >> 4) & 0x0f)
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/* MIPS32/64 */
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#define MIPS_PRID_CID(x) (((x) >> 16) & 0x00ff) /* Company ID */
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#define MIPS_PRID_CID_PREHISTORIC 0x00 /* Not MIPS32/64 */
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#define MIPS_PRID_CID_MTI 0x01 /* MIPS Technologies, Inc. */
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#define MIPS_PRID_CID_BROADCOM 0x02 /* Broadcom */
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#define MIPS_PRID_CID_ALCHEMY 0x03 /* Alchemy Semiconductor */
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#define MIPS_PRID_CID_SIBYTE 0x04 /* SiByte */
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#define MIPS_PRID_CID_SANDCRAFT 0x05 /* SandCraft */
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#define MIPS_PRID_CID_PHILIPS 0x06 /* Philips */
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#define MIPS_PRID_CID_TOSHIBA 0x07 /* Toshiba */
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#define MIPS_PRID_CID_LSI 0x08 /* LSI */
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#define MIPS_PRID_CID(x) (((x) >> 16) & 0x00ff) /* Company ID */
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#define MIPS_PRID_CID_PREHISTORIC 0x00 /* Not MIPS32/64 */
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#define MIPS_PRID_CID_MTI 0x01 /* MIPS Technologies, Inc. */
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#define MIPS_PRID_CID_BROADCOM 0x02 /* Broadcom */
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#define MIPS_PRID_CID_ALCHEMY 0x03 /* Alchemy Semiconductor */
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#define MIPS_PRID_CID_SIBYTE 0x04 /* SiByte */
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#define MIPS_PRID_CID_SANDCRAFT 0x05 /* SandCraft */
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#define MIPS_PRID_CID_PHILIPS 0x06 /* Philips */
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#define MIPS_PRID_CID_TOSHIBA 0x07 /* Toshiba */
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#define MIPS_PRID_CID_LSI 0x08 /* LSI */
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/* 0x09 unannounced */
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/* 0x0a unannounced */
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#define MIPS_PRID_CID_LEXRA 0x0b /* Lexra */
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#define MIPS_PRID_COPTS(x) (((x) >> 24) & 0x00ff) /* Company Options */
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#define MIPS_PRID_CID_LEXRA 0x0b /* Lexra */
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#define MIPS_PRID_COPTS(x) (((x) >> 24) & 0x00ff) /* Company Options */
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#ifdef _KERNEL
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/*
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@ -315,45 +315,45 @@ void mips_machdep_cache_config(void);
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* trapframe argument passed to trap()
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*/
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#define TF_AST 0
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#define TF_V0 1
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#define TF_V1 2
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#define TF_A0 3
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#define TF_A1 4
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#define TF_A2 5
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#define TF_A3 6
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#define TF_T0 7
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#define TF_T1 8
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#define TF_T2 9
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#define TF_T3 10
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#define TF_AST 0
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#define TF_V0 1
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#define TF_V1 2
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#define TF_A0 3
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#define TF_A1 4
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#define TF_A2 5
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#define TF_A3 6
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#define TF_T0 7
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#define TF_T1 8
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#define TF_T2 9
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#define TF_T3 10
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#if defined(__mips_n32) || defined(__mips_n64)
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#define TF_A4 11
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#define TF_A5 12
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#define TF_A6 13
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#define TF_A7 14
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#define TF_A4 11
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#define TF_A5 12
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#define TF_A6 13
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#define TF_A7 14
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#else
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#define TF_T4 11
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#define TF_T5 12
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#define TF_T6 13
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#define TF_T7 14
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#define TF_T4 11
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#define TF_T5 12
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#define TF_T6 13
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#define TF_T7 14
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#endif /* __mips_n32 || __mips_n64 */
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#define TF_TA0 11
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#define TF_TA1 12
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#define TF_TA2 13
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#define TF_TA3 14
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#define TF_TA0 11
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#define TF_TA1 12
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#define TF_TA2 13
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#define TF_TA3 14
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#define TF_T8 15
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#define TF_T9 16
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#define TF_T8 15
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#define TF_T9 16
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#define TF_RA 17
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#define TF_SR 18
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#define TF_MULLO 19
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#define TF_MULHI 20
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#define TF_EPC 21 /* may be changed by trap() call */
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#define TF_RA 17
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#define TF_SR 18
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#define TF_MULLO 19
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#define TF_MULHI 20
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#define TF_EPC 21 /* may be changed by trap() call */
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#define TF_NREGS 22
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#define TF_NREGS 22
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struct trapframe {
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mips_reg_t tf_regs[TF_NREGS];
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