Make pmap_prefer() use a global setting based on cache size

instead of assuming 64KB.   This allows best fit and will
support bigger caches.
This commit is contained in:
jeffs 2000-07-20 18:33:40 +00:00
parent c8b819c2ed
commit 2ebdfcd251
4 changed files with 16 additions and 9 deletions

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@ -1,4 +1,4 @@
/* $NetBSD: locore.h,v 1.38 2000/06/29 06:00:43 cgd Exp $ */
/* $NetBSD: locore.h,v 1.39 2000/07/20 18:33:40 jeffs Exp $ */
/*
* Copyright 1996 The Board of Trustees of The Leland Stanford
@ -223,6 +223,7 @@ extern u_int mips_L1ICacheLSize;
extern int mips_L2CachePresent;
extern u_int mips_L2CacheLSize;
extern u_int mips_CacheAliasMask;
extern u_int mips_CachePreferMask;
#ifdef MIPS3
extern int mips3_L1TwoWayCache;

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@ -1,4 +1,4 @@
/* $NetBSD: locore.S,v 1.109 2000/07/19 22:05:02 jeffs Exp $ */
/* $NetBSD: locore.S,v 1.110 2000/07/20 18:33:42 jeffs Exp $ */
/*
* Copyright (c) 1992, 1993
@ -1297,6 +1297,7 @@ _C_LABEL(cpu_arch):
.globl _C_LABEL(mips_L1DCacheLSize)
.globl _C_LABEL(mips_L1ICacheLSize)
.globl _C_LABEL(mips_CacheAliasMask)
.globl _C_LABEL(mips_CachePreferMask)
.globl _C_LABEL(mips_L2CacheSize)
.globl _C_LABEL(mips_L2CacheLSize)
.globl _C_LABEL(mips_L2CachePresent)
@ -1310,6 +1311,8 @@ _C_LABEL(mips_L1ICacheLSize):
.word 0
_C_LABEL(mips_CacheAliasMask):
.word 0
_C_LABEL(mips_CachePreferMask):
.word 0
_C_LABEL(mips_L2CacheSize):
.word 0
_C_LABEL(mips_L2CacheLSize):

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@ -1,4 +1,4 @@
/* $NetBSD: mips_machdep.c,v 1.94 2000/07/10 23:21:16 jeffs Exp $ */
/* $NetBSD: mips_machdep.c,v 1.95 2000/07/20 18:33:42 jeffs Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
@ -52,7 +52,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.94 2000/07/10 23:21:16 jeffs Exp $");
__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.95 2000/07/20 18:33:42 jeffs Exp $");
#include "opt_compat_netbsd.h"
#include "opt_compat_ultrix.h"
@ -224,6 +224,7 @@ mips3_ConfigCache()
MIPS3_CONFIG_DB);
mips_CacheAliasMask = (mips_L1DCacheSize - 1) & ~(NBPG - 1);
mips_CachePreferMask = max(mips_L1DCacheSize,mips_L1ICacheSize) - 1;
/*
* Clear out the I and D caches.
@ -582,6 +583,7 @@ cpu_identify()
/* One less alias bit with 2 way cache. */
mips_CacheAliasMask =
((mips_L1DCacheSize/2) - 1) & ~(NBPG - 1);
mips_CachePreferMask >>= 1;
}
else
printf(", direct mapped");

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@ -1,4 +1,4 @@
/* $NetBSD: pmap.c,v 1.103 2000/06/29 08:11:27 mrg Exp $ */
/* $NetBSD: pmap.c,v 1.104 2000/07/20 18:33:43 jeffs Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
@ -78,7 +78,7 @@
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.103 2000/06/29 08:11:27 mrg Exp $");
__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.104 2000/07/20 18:33:43 jeffs Exp $");
/*
* Manages physical address maps.
@ -2153,13 +2153,14 @@ pmap_prefer(foff, vap)
vaddr_t foff;
vaddr_t *vap;
{
vaddr_t va = *vap;
vaddr_t va;
vsize_t d;
if (CPUISMIPS3) {
va = *vap;
d = foff - va;
/* Use 64K to prevent virtual coherency exceptions */
d &= (0x10000 - 1);
d &= mips_CachePreferMask;
*vap = va + d;
}
}