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Redo the previous:

Browse Source 
GC all of the backward branch code (which wasn't used).
Separate the a.out stuff into a separate .h file.
Some other random cleanup.
Leave the arm_preserved_register() hack for now.
This commit is contained in:
mycroft 1998-11-12 11:03:23 +00:00
parent 76f0e60111
commit 2ea86fa2ea
4 changed files with 391 additions and 1005 deletions
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447
gnu/usr.bin/gcc/arch/arm32/arm32.c
View File

@ -39,17 +39,6 @@ Boston, MA 02111-1307, USA. */
#include "tree.h"
#include "expr.h"
int
arm_preserved_register(int n)
{
if(flag_pic && (n == arm_pic_register))
return 1;
return !call_used_regs[n];
}
/* The maximum number of insns skipped which will be conditionalised if
possible. */
#define MAX_INSNS_SKIPPED 5
@ -58,9 +47,6 @@ arm_preserved_register(int n)
extern FILE *asm_out_file;
extern char *output_multi_immediate ();
extern void arm_increase_location (); // only in 2.7
static int get_prologue_size PROTO ((void));
HOST_WIDE_INT int_log2 PROTO ((HOST_WIDE_INT));
static int arm_gen_constant PROTO ((enum rtx_code, enum machine_mode,
HOST_WIDE_INT, rtx, rtx, int, int));
@ -96,19 +82,6 @@ int arm_text_location = 0;
but all of these can be `put after' return insns */
int lr_save_eliminated;
/* A hash table is used to store text segment labels and their associated
offset from the start of the text segment. */
struct label_offset
{
char *name;
int offset;
struct label_offset *cdr;
};
#define LABEL_HASH_SIZE 257
static struct label_offset *offset_table[LABEL_HASH_SIZE];
/* Set to 1 when a return insn is output, this means that the epilogue
is not needed. */
@ -128,6 +101,16 @@ char *arm_condition_codes[] =
};
#define ARM_INVERSE_CONDITION_CODE(X) ((X) ^ 1)
int
arm_preserved_register (regno)
int regno;
{
if (flag_pic && regno == PIC_OFFSET_TABLE_REGNUM)
return 1;
return ! call_used_regs[regno];
}
/* Return 1 if it is possible to return using a single instruction */
@ -1937,15 +1920,6 @@ multi_register_push (op, mode)
return 1;
}
/* Routines for use with attributes */
int
const_pool_offset (symbol)
rtx symbol;
{
return get_pool_offset (symbol) - get_pool_size () - get_prologue_size ();
}
/* Routines for use in generating RTL */
rtx
@ -2233,37 +2207,6 @@ arm_gen_store_multiple (base_regno, count, to, up, write_back, unchanging_p,
gen_rtx (SUBREG, QImode, operands[2], 0)));
}
}
/* Check to see if a branch is forwards or backwards. Return TRUE if it
is backwards. */
int
arm_backwards_branch (from, to)
int from, to;
{
return insn_addresses[to] <= insn_addresses[from];
}
/* Check to see if a branch is within the distance that can be done using
an arithmetic expression. */
int
short_branch (from, to)
int from, to;
{
int delta = insn_addresses[from] + 8 - insn_addresses[to];
return abs (delta) < 980; /* A small margin for safety */
}
/* Check to see that the insn isn't the target of the conditionalizing
code */
int
arm_insn_not_targeted (insn)
rtx insn;
{
return insn != arm_target_insn;
}
/* Routines to output assembly language. */
@ -2943,7 +2886,6 @@ arithmetic_instr (op, shift_first_arg)
fputs ("\"\n", stream);
fputs ("\t.ascii\t\"", stream);
len_so_far = 0;
arm_increase_location (chars_so_far);
chars_so_far = 0;
}
@ -2968,7 +2910,6 @@ arithmetic_instr (op, shift_first_arg)
}
fputs ("\"\n", stream);
arm_increase_location (chars_so_far);
}
@ -3092,6 +3033,10 @@ arithmetic_instr (op, shift_first_arg)
if ((next = next_nonnote_insn (insn)) == NULL)
return 1;
/* No need to worry about lr if the call never returns */
if (GET_CODE (next) == BARRIER)
break;
if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == USE
&& (GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET)
&& (REGNO (SET_DEST (XVECEXP (PATTERN (insn), 0, 0)))
@ -3114,9 +3059,10 @@ arithmetic_instr (op, shift_first_arg)
}
char *
output_return_instruction (operand, really_return)
output_return_instruction (operand, really_return, reverse)
rtx operand;
int really_return;
int reverse;
{
char instr[100];
int reg, live_regs = 0;
@ -3136,16 +3082,14 @@ output_return_instruction (operand, really_return)
/* Otherwise, trap an attempted return by aborting. */
ops[0] = operand;
ops[1] = gen_rtx (SYMBOL_REF, Pmode, "abort");
output_asm_insn ("bl%d0\t%a1", ops);
assemble_external_libcall (ops[1]);
output_asm_insn (reverse ? "bl%D0\t%a1" : "bl%d0\t%a1", ops);
return "";
}
if (current_function_calls_alloca && ! really_return)
abort();
if (current_function_uses_pic_offset_table && flag_pic)
regs_ever_live[arm_pic_register] = 1;
for (reg = 0; reg <= 10; reg++)
if (regs_ever_live[reg] && arm_preserved_register(reg))
live_regs++;
@ -3162,9 +3106,11 @@ output_return_instruction (operand, really_return)
live_regs++;
if (frame_pointer_needed)
strcpy (instr, "ldm%?%d0ea\t%|fp, {");
strcpy (instr,
reverse ? "ldm%?%D0ea\t%|fp, {" : "ldm%?%d0ea\t%|fp, {");
else
strcpy (instr, "ldm%?%d0fd\t%|sp!, {");
strcpy (instr,
reverse ? "ldm%?%D0fd\t%|sp!, {" : "ldm%?%d0fd\t%|sp!, {");
for (reg = 0; reg <= 10; reg++)
if (regs_ever_live[reg] && arm_preserved_register(reg))
@ -3196,8 +3142,8 @@ output_return_instruction (operand, really_return)
}
else if (really_return)
{
strcpy (instr,
TARGET_6 ? "mov%?%d0\t%|pc, lr" : "mov%?%d0s\t%|pc, %|lr");
sprintf (instr, "mov%%?%%%s0%s\t%%|pc, %%|lr",
reverse ? "D" : "d", TARGET_6 ? "" : "s");
output_asm_insn (instr, &operand);
}
@ -3216,15 +3162,6 @@ arm_volatile_func ()
return (optimize > 0 && TREE_THIS_VOLATILE (current_function_decl));
}
/* Return the size of the prologue. It's not too bad if we slightly
over-estimate. */
static int
get_prologue_size ()
{
return profile_flag ? 12 : 0;
}
/* The amount of stack adjustment that happens here, in output_return and in
output_epilogue must be exactly the same as was calculated during reload,
or things will point to the wrong place. The only time we can safely
@ -3240,7 +3177,6 @@ output_func_prologue (f, frame_size)
int frame_size;
{
int reg, live_regs_mask = 0;
rtx operands[3];
int volatile_func = (optimize > 0
&& TREE_THIS_VOLATILE (current_function_decl));
@ -3298,6 +3234,11 @@ output_func_prologue (f, frame_size)
fprintf (f,"\t%s I don't think this function clobbers lr\n",
ASM_COMMENT_START);
#ifdef AOF_ASSEMBLER
if (flag_pic)
fprintf (f, "\tmov\t%sip, %s%s\n", REGISTER_PREFIX, REGISTER_PREFIX,
reg_names[PIC_OFFSET_TABLE_REGNUM]);
#endif
}
@ -3306,9 +3247,9 @@ output_func_epilogue (f, frame_size)
FILE *f;
int frame_size;
{
int reg, live_regs_mask = 0, code_size = 0;
int reg, live_regs_mask = 0;
/* If we need this then it will always be at lesat this much */
int floats_offset = 24;
int floats_offset = 12;
rtx operands[3];
int volatile_func = (optimize > 0
&& TREE_THIS_VOLATILE (current_function_decl));
@ -3316,9 +3257,7 @@ output_func_epilogue (f, frame_size)
if (use_return_insn() && return_used_this_function)
{
if (frame_size && !(frame_pointer_needed || TARGET_APCS))
{
abort ();
}
goto epilogue_done;
}
@ -3326,8 +3265,8 @@ output_func_epilogue (f, frame_size)
if (volatile_func)
{
rtx op = gen_rtx (SYMBOL_REF, Pmode, "abort");
assemble_external_libcall (op);
output_asm_insn ("bl\t%a0", &op);
code_size = 4;
goto epilogue_done;
}
@ -3343,16 +3282,14 @@ output_func_epilogue (f, frame_size)
for (reg = 23; reg > 15; reg--)
if (regs_ever_live[reg] && arm_preserved_register(reg))
{
floats_offset += 12;
fprintf (f, "\tldfe\t%s%s, [%sfp, #-%d]\n", REGISTER_PREFIX,
reg_names[reg], REGISTER_PREFIX, floats_offset);
floats_offset += 12;
code_size += 4;
}
live_regs_mask |= 0xA800;
print_multi_reg (f, "ldmea\t%sfp", live_regs_mask,
TARGET_6 ? FALSE : TRUE);
code_size += 4;
}
else
{
@ -3366,48 +3303,48 @@ output_func_epilogue (f, frame_size)
for (reg = 16; reg < 24; reg++)
if (regs_ever_live[reg] && arm_preserved_register(reg))
{
fprintf (f, "\tldfe\t%s%s, [%ssp], #12\n", REGISTER_PREFIX,
reg_names[reg], REGISTER_PREFIX);
code_size += 4;
}
if (current_function_pretend_args_size == 0 && regs_ever_live[14])
{
if (lr_save_eliminated)
fprintf (f, (TARGET_6 ? "\tmov\t%spc, %slr\n"
: "\tmovs\t%spc, %slr\n"),
REGISTER_PREFIX, REGISTER_PREFIX, f);
else
print_multi_reg (f, "ldmfd\t%ssp!", live_regs_mask | 0x8000,
TARGET_6 ? FALSE : TRUE);
code_size += 4;
}
else
{
if (live_regs_mask || regs_ever_live[14])
{
/* Restore the integer regs, and the return address into lr */
if (! lr_save_eliminated)
live_regs_mask |= 0x4000;
if (live_regs_mask != 0)
print_multi_reg (f, "ldmfd\t%ssp!", live_regs_mask, FALSE);
code_size += 4;
}
if (current_function_pretend_args_size)
{
/* Unwind the pre-pushed regs */
operands[0] = operands[1] = stack_pointer_rtx;
operands[2] = gen_rtx (CONST_INT, VOIDmode,
current_function_pretend_args_size);
output_add_immediate (operands);
}
fprintf (f,
TARGET_6 ? "\tmov\t%spc, %slr\n" : "\tmovs\t%spc, %slr\n",
/* And finally, go home */
fprintf (f, (TARGET_6 ? "\tmov\t%spc, %slr\n"
: "\tmovs\t%spc, %slr\n"),
REGISTER_PREFIX, REGISTER_PREFIX, f);
code_size += 4;
}
}
epilogue_done:
/* insn_addresses isn't allocated when not optimizing */
if (optimize > 0)
arm_increase_location (code_size
+ insn_addresses[INSN_UID (get_last_insn ())]
+ get_prologue_size ());
current_function_anonymous_args = 0;
}
@ -3460,8 +3397,6 @@ arm_expand_prologue ()
{
int reg;
rtx amount = GEN_INT (- get_frame_size ());
rtx push_insn;
int num_regs;
int live_regs_mask = 0;
int store_arg_regs = 0;
int volatile_func = (optimize > 0
@ -3586,7 +3521,6 @@ arm_print_operand (stream, x, code)
"%ld",
#endif
ARM_SIGN_EXTEND (~ INTVAL (x)));
else
{
putc ('~', stream);
@ -3624,11 +3558,18 @@ arm_print_operand (stream, x, code)
}
return;
case 'Q':
if (REGNO (x) > 15)
abort ();
fputs (REGISTER_PREFIX, stream);
fputs (reg_names[REGNO (x) + (WORDS_BIG_ENDIAN ? 1 : 0)], stream);
return;
case 'R':
if (REGNO (x) > 15)
abort ();
fputs (REGISTER_PREFIX, stream);
fputs (reg_names[REGNO (x) + 1], stream);
fputs (reg_names[REGNO (x) + (WORDS_BIG_ENDIAN ? 0 : 1)], stream);
return;
case 'm':
@ -3654,11 +3595,7 @@ arm_print_operand (stream, x, code)
return;
case 'D':
if (x && (flag_fast_math
|| GET_CODE (x) == EQ || GET_CODE (x) == NE
|| (GET_MODE (XEXP (x, 0)) != CCFPEmode
&& (GET_MODE_CLASS (GET_MODE (XEXP (x, 0)))
!= MODE_FLOAT))))
if (x)
fputs (arm_condition_codes[ARM_INVERSE_CONDITION_CODE
(get_arm_condition_code (x))],
stream);
@ -3690,157 +3627,6 @@ arm_print_operand (stream, x, code)
}
}
/* Increase the `arm_text_location' by AMOUNT if we're in the text
segment. */
void
arm_increase_location (amount)
int amount;
{
if (in_text_section ())
arm_text_location += amount;
}
/* Output a label definition. If this label is within the .text segment, it
is stored in OFFSET_TABLE, to be used when building `llc' instructions.
Maybe GCC remembers names not starting with a `*' for a long time, but this
is a minority anyway, so we just make a copy. Do not store the leading `*'
if the name starts with one. */
void
arm_asm_output_label (stream, name)
FILE *stream;
char *name;
{
char *real_name, *s;
struct label_offset *cur;
int hash = 0;
assemble_name (stream, name);
fputs (":\n", stream);
if (! in_text_section ())
return;
if (name[0] == '*')
{
real_name = xmalloc (1 + strlen (&name[1]));
strcpy (real_name, &name[1]);
}
else
{
real_name = xmalloc (2 + strlen (name));
strcpy (real_name, USER_LABEL_PREFIX);
strcat (real_name, name);
}
for (s = real_name; *s; s++)
hash += *s;
hash = hash % LABEL_HASH_SIZE;
cur = (struct label_offset *) xmalloc (sizeof (struct label_offset));
cur->name = real_name;
cur->offset = arm_text_location;
cur->cdr = offset_table[hash];
offset_table[hash] = cur;
}
/* Load a symbol that is known to be in the text segment into a register.
This should never be called when not optimizing. */
char *
output_load_symbol (insn, operands)
rtx insn;
rtx *operands;
{
char *s;
char *name = XSTR (operands[1], 0);
struct label_offset *he;
int hash = 0;
int offset;
unsigned int mask, never_mask = 0xffffffff;
int shift, inst;
char buffer[100];
if (optimize == 0 || *name != '*')
abort ();
for (s = &name[1]; *s; s++)
hash += *s;
hash = hash % LABEL_HASH_SIZE;
he = offset_table[hash];
while (he && strcmp (he->name, &name[1]))
he = he->cdr;
if (!he)
abort ();
offset = (arm_text_location + insn_addresses[INSN_UID (insn)]
+ get_prologue_size () + 8 - he->offset);
if (offset < 0)
abort ();
/* When generating the instructions, we never mask out the bits that we
think will be always zero, then if a mistake has occurred somewhere, the
assembler will spot it and generate an error. */
/* If the symbol is word aligned then we might be able to reduce the
number of loads. */
shift = ((offset & 3) == 0) ? 2 : 0;
/* Clear the bits from NEVER_MASK that will be orred in with the individual
instructions. */
for (; shift < 32; shift += 8)
{
mask = 0xff << shift;
if ((offset & mask) || ((unsigned) offset) > mask)
never_mask &= ~mask;
}
inst = 8;
mask = 0xff << (shift - 32);
while (mask && (never_mask & mask) == 0)
{
if (inst == 8)
{
strcpy (buffer, "sub%?\t%0, %|pc, #(8 + . -%a1)");
if ((never_mask | mask) != 0xffffffff)
sprintf (buffer + strlen (buffer), " & 0x%x", mask | never_mask);
}
else
sprintf (buffer, "sub%%?\t%%0, %%0, #(%d + . -%%a1) & 0x%x",
inst, mask | never_mask);
output_asm_insn (buffer, operands);
mask <<= 8;
inst -= 4;
}
return "";
}
/* Output code resembling an .lcomm directive. /bin/as doesn't have this
directive hence this hack, which works by reserving some `.space' in the
bss segment directly.
XXX This is a severe hack, which is guaranteed NOT to work since it doesn't
define STATIC COMMON space but merely STATIC BSS space. */
void
output_lcomm_directive (stream, name, size, rounded)
FILE *stream;
char *name;
int size, rounded;
{
fprintf (stream, "\n\t.bss\t%s .lcomm\n", ASM_COMMENT_START);
assemble_name (stream, name);
fprintf (stream, ":\t.space\t%d\n", rounded);
if (in_text_section ())
fputs ("\n\t.text\n", stream);
else
fputs ("\n\t.data\n", stream);
}
/* A finite state machine takes care of noticing whether or not instructions
can be conditionally executed, and thus decrease execution time and code
@ -4452,7 +4238,6 @@ legitimize_pic_address (orig, mode, reg)
rtx aof_pic_label = NULL_RTX;
struct pic_chain
{
struct pic_chain *next;
@ -4653,6 +4438,7 @@ find_barrier (from, max_count)
{
int count = 0;
rtx found_barrier = 0;
rtx last = from;
while (from && count < max_count)
{
@ -4666,11 +4452,12 @@ find_barrier (from, max_count)
&& CONSTANT_POOL_ADDRESS_P (SET_SRC (PATTERN (from))))
{
rtx src = SET_SRC (PATTERN (from));
count += 2;
count += 8;
}
else
count += get_attr_length (from);
last = from;
from = NEXT_INSN (from);
}
@ -4681,7 +4468,7 @@ find_barrier (from, max_count)
rtx label = gen_label_rtx ();
if (from)
from = PREV_INSN (from);
from = PREV_INSN (last);
else
from = get_last_insn ();
@ -4947,118 +4734,6 @@ arm_reorg (first)
}
}
arm_print_operand_address(STREAM, X)
FILE* STREAM;
rtx X;
{
int is_minus = GET_CODE (X) == MINUS;
if (GET_CODE (X) == REG)
fprintf (STREAM, "[%s%s, #0]", REGISTER_PREFIX,
reg_names[REGNO (X)]);
else if (GET_CODE (X) == PLUS || is_minus)
{
rtx base = XEXP (X, 0);
rtx index = XEXP (X, 1);
char *base_reg_name;
HOST_WIDE_INT offset = 0;
if (GET_CODE (base) != REG)
{
/* Ensure that BASE is a register (one of them must be). */
rtx temp = base;
base = index;
index = temp;
}
base_reg_name = reg_names[REGNO (base)];
switch (GET_CODE (index))
{
case CONST_INT:
offset = INTVAL (index);
if (is_minus)
offset = -offset;
fprintf (STREAM, "[%s%s, #%d]", REGISTER_PREFIX,
base_reg_name, offset);
break;
case REG:
fprintf (STREAM, "[%s%s, %s%s%s]", REGISTER_PREFIX,
base_reg_name, is_minus ? "-" : "",
REGISTER_PREFIX, reg_names[REGNO (index)] );
break;
case MULT:
case ASHIFTRT:
case LSHIFTRT:
case ASHIFT:
case ROTATERT:
{
fprintf (STREAM, "[%s%s, %s%s%s", REGISTER_PREFIX,
base_reg_name, is_minus ? "-" : "", REGISTER_PREFIX,
reg_names[REGNO (XEXP (index, 0))]);
arm_print_operand (STREAM, index, 'S');
fputs ("]", STREAM);
break;
}
default:
abort();
}
}
else if (GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC
|| GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC)
{
if (GET_CODE (XEXP (X, 0)) != REG)
abort ();
if (GET_CODE (X) == PRE_DEC || GET_CODE (X) == PRE_INC)
fprintf (STREAM, "[%s%s, #%s%d]!", REGISTER_PREFIX,
reg_names[REGNO (XEXP (X, 0))],
GET_CODE (X) == PRE_DEC ? "-" : "",
GET_MODE_SIZE (output_memory_reference_mode));
else
fprintf (STREAM, "[%s%s], #%s%d", REGISTER_PREFIX,
reg_names[REGNO (XEXP (X, 0))],
GET_CODE (X) == POST_DEC ? "-" : "",
GET_MODE_SIZE (output_memory_reference_mode));
}
else if (flag_pic && GET_CODE(X) == CONST && is_pic(X))
{
output_pic_addr_const(STREAM, X);
}
else output_addr_const(STREAM, X);
}
output_pic_addr_const(stream, exp)
FILE* stream;
rtx exp;
{
rtx u, v;
// we expect (const (minus (const (plus (u (pc)))) v)
if((GET_CODE(exp) == CONST)
&& (GET_CODE(XEXP (exp, 0)) == MINUS)
&& (GET_CODE(XEXP (XEXP (exp, 0), 0)) == CONST)
&& (GET_CODE(XEXP (XEXP (XEXP (exp, 0), 0), 0)) == PLUS)
&& (u = (XEXP (XEXP (XEXP (XEXP (exp, 0), 0), 0), 0)))
&& (GET_CODE(XEXP( XEXP (XEXP (XEXP (exp, 0), 0), 0),1)) == PC)
&& (v = (XEXP (XEXP (exp, 0), 1)))
){
output_addr_const(stream, u);
fputs(" + (", stream);
output_addr_const(stream, XEXP( XEXP (XEXP (XEXP (exp, 0), 0), 0),1));
fputs(" - (", stream);
output_addr_const(stream, XEXP (XEXP (XEXP (exp, 0), 1), 0));
fputs(") )", stream);
} else {
output_addr_const(stream, XEXP (XEXP (XEXP (exp, 0), 0), 0));
fputs(" - (", stream);
output_addr_const(stream, XEXP (XEXP (XEXP (exp, 0), 1), 0));
fputs(")", stream);
}
}
/* Return TRUE if X references a LABEL_REF. */
int
label_mentioned_p (x)

352
gnu/usr.bin/gcc/arch/arm32/arm32.h
View File

@ -794,7 +794,8 @@ extern int arm_preserved_register(int n);
int volatile_func = arm_volatile_func (); \
if ((FROM) == ARG_POINTER_REGNUM && (TO) == HARD_FRAME_POINTER_REGNUM)\
(OFFSET) = 0; \
else if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM)\
else if ((FROM) == FRAME_POINTER_REGNUM \
&& (TO) == STACK_POINTER_REGNUM) \
(OFFSET) = (get_frame_size () + 3 & ~3); \
else \
{ \
@ -817,7 +818,8 @@ extern int arm_preserved_register(int n);
{ \
if (! frame_pointer_needed) \
offset -= 16; \
if (! volatile_func && (regs_ever_live[14] || saved_hard_reg)) \
if (! volatile_func \
&& (regs_ever_live[14] || saved_hard_reg)) \
offset += 4; \
(OFFSET) = (get_frame_size () + 3 & ~3) + offset; \
} \
@ -1389,126 +1391,11 @@ extern int arm_compare_fp;
/* Assembler output control */
#ifndef ARM_OS_NAME
#define ARM_OS_NAME "(generic)"
#endif
/* The text to go at the start of the assembler file */
#define ASM_FILE_START(STREAM) \
{ \
extern char *version_string; \
fprintf (STREAM,"%s Generated by gcc %s for ARM/%s\n", \
ASM_COMMENT_START, version_string, ARM_OS_NAME); \
fprintf (STREAM,"%srfp\t.req\t%sr9\n", REGISTER_PREFIX, REGISTER_PREFIX); \
fprintf (STREAM,"%ssl\t.req\t%sr10\n", REGISTER_PREFIX, REGISTER_PREFIX); \
fprintf (STREAM,"%sfp\t.req\t%sr11\n", REGISTER_PREFIX, REGISTER_PREFIX); \
fprintf (STREAM,"%sip\t.req\t%sr12\n", REGISTER_PREFIX, REGISTER_PREFIX); \
fprintf (STREAM,"%ssp\t.req\t%sr13\n", REGISTER_PREFIX, REGISTER_PREFIX); \
fprintf (STREAM,"%slr\t.req\t%sr14\n", REGISTER_PREFIX, REGISTER_PREFIX); \
fprintf (STREAM,"%spc\t.req\t%sr15\n", REGISTER_PREFIX, REGISTER_PREFIX); \
}
#define ASM_APP_ON ""
#define ASM_APP_OFF ""
/* Switch to the text or data segment. */
#define TEXT_SECTION_ASM_OP ".text"
#define DATA_SECTION_ASM_OP ".data"
#define REGISTER_PREFIX ""
#define USER_LABEL_PREFIX "_"
#define LOCAL_LABEL_PREFIX ""
/* The assembler's names for the registers. */
#ifndef REGISTER_NAMES
#define REGISTER_NAMES \
{ \
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
"r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc", \
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
"cc", "sfp", "afp" \
}
#endif
#ifndef ADDITIONAL_REGISTER_NAMES
#define ADDITIONAL_REGISTER_NAMES \
{ \
{"a1", 0}, \
{"a2", 1}, \
{"a3", 2}, \
{"a4", 3}, \
{"v1", 4}, \
{"v2", 5}, \
{"v3", 6}, \
{"v4", 7}, \
{"v5", 8}, \
{"v6", 9}, \
{"rfp", 9}, /* Gcc used to call it this */ \
{"sb", 9}, \
{"v7", 10}, \
{"r10", 10}, \
{"r11", 11}, /* fp */ \
{"r12", 12}, /* ip */ \
{"r13", 13}, /* sp */ \
{"r14", 14}, /* lr */ \
{"r15", 15} /* pc */ \
}
#endif
/* Arm Assembler barfs on dollars */
#define DOLLARS_IN_IDENTIFIERS 0
#define NO_DOLLAR_IN_LABEL
/* DBX register number for a given compiler register number */
#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
/* Generate DBX debugging information. riscix.h will undefine this because
the native assembler does not support stabs. */
#define DBX_DEBUGGING_INFO 1
/* Acorn dbx moans about continuation chars, so don't use any. */
#ifndef DBX_CONTIN_LENGTH
#define DBX_CONTIN_LENGTH 0
#endif
/* Output a source filename for the debugger. RISCiX dbx insists that the
``desc'' field is set to compiler version number >= 315 (sic). */
#define DBX_OUTPUT_MAIN_SOURCE_FILENAME(STREAM,NAME) \
do { \
fprintf (STREAM, ".stabs \"%s\",%d,0,315,%s\n", (NAME), N_SO, \
&ltext_label_name[1]); \
text_section (); \
ASM_OUTPUT_INTERNAL_LABEL (STREAM, "Ltext", 0); \
} while (0)
/* Output a label definition. */
#define ASM_OUTPUT_LABEL(STREAM,NAME) \
arm_asm_output_label ((STREAM), (NAME))
/* Output a function label definition. */
#define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL) \
ASM_OUTPUT_LABEL(STREAM, NAME)
/* Output a globalising directive for a label. */
#define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
(fprintf (STREAM, "\t.global\t"), \
assemble_name (STREAM, NAME), \
fputc ('\n',STREAM)) \
/* Output a reference to a label. */
#define ASM_OUTPUT_LABELREF(STREAM,NAME) \
fprintf (STREAM, "%s%s", USER_LABEL_PREFIX, NAME)
/* Make an internal label into a string. */
#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
sprintf (STRING, "*%s%d", PREFIX, NUM)
/* Output an internal label definition. */
#define ASM_OUTPUT_INTERNAL_LABEL(STREAM, PREFIX, NUM) \
do \
{ \
char *s = (char *) alloca (11 + strlen (PREFIX)); \
char *s = (char *) alloca (40 + strlen (PREFIX)); \
extern int arm_target_label, arm_ccfsm_state; \
extern rtx arm_target_insn; \
\
@ -1518,20 +1405,10 @@ do { \
arm_ccfsm_state = 0; \
arm_target_insn = NULL; \
} \
strcpy (s, "*"); \
sprintf (&s[strlen (s)], "%s%d", (PREFIX), (NUM)); \
arm_asm_output_label (STREAM, s); \
ASM_GENERATE_INTERNAL_LABEL (s, (PREFIX), (NUM)); \
ASM_OUTPUT_LABEL (STREAM, s); \
} while (0)
/* Nothing special is done about jump tables */
/* #define ASM_OUTPUT_CASE_LABEL(STREAM,PREFIX,NUM,TABLE) */
/* #define ASM_OUTPUT_CASE_END(STREAM,NUM,TABLE) */
/* Construct a private name. */
#define ASM_FORMAT_PRIVATE_NAME(OUTVAR,NAME,NUMBER) \
((OUTVAR) = (char *) alloca (strlen (NAME) + 10), \
sprintf ((OUTVAR), "%s.%d", (NAME), (NUMBER)))
/* Output a push or a pop instruction (only used when profiling). */
#define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \
fprintf(STREAM,"\tstmfd\t%ssp!,{%s%s}\n", \
@ -1541,136 +1418,6 @@ do { \
fprintf(STREAM,"\tldmfd\t%ssp!,{%s%s}\n", \
REGISTER_PREFIX, REGISTER_PREFIX, reg_names[REGNO])
/* Output a relative address. Not needed since jump tables are absolute
but we must define it anyway. */
#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM,VALUE,REL) \
fprintf (STREAM, "\tb L%d\n", VALUE)
/* Output an element of a dispatch table. */
#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM,VALUE) \
fprintf (STREAM, "\t.word\tL%d\n", VALUE)
/* Output various types of constants. For real numbers we output hex, with
a comment containing the "human" value, this allows us to pass NaN's which
the riscix assembler doesn't understand (it also makes cross-assembling
less likely to fail). */
#define ASM_OUTPUT_LONG_DOUBLE(STREAM,VALUE) \
do { char dstr[30]; \
long l[3]; \
arm_increase_location (12); \
REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \
if (sizeof (int) == sizeof (long)) \
fprintf (STREAM, "\t.long 0x%x,0x%x,0x%x\t%s long double %s\n", \
l[2], l[1], l[0], ASM_COMMENT_START, dstr); \
else \
fprintf (STREAM, "\t.long 0x%lx,0x%lx,0x%lx\t%s long double %s\n",\
l[0], l[1], l[2], ASM_COMMENT_START, dstr); \
} while (0)
#define ASM_OUTPUT_DOUBLE(STREAM, VALUE) \
do { char dstr[30]; \
long l[2]; \
arm_increase_location (8); \
REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
REAL_VALUE_TO_DECIMAL (VALUE, "%.14g", dstr); \
if (sizeof (int) == sizeof (long)) \
fprintf (STREAM, "\t.long 0x%x, 0x%x\t%s double %s\n", l[0], \
l[1], ASM_COMMENT_START, dstr); \
else \
fprintf (STREAM, "\t.long 0x%lx, 0x%lx\t%s double %s\n", l[0], \
l[1], ASM_COMMENT_START, dstr); \
} while (0)
#define ASM_OUTPUT_FLOAT(STREAM, VALUE) \
do { char dstr[30]; \
long l; \
arm_increase_location (4); \
REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
REAL_VALUE_TO_DECIMAL (VALUE, "%.7g", dstr); \
if (sizeof (int) == sizeof (long)) \
fprintf (STREAM, "\t.word 0x%x\t%s float %s\n", l, \
ASM_COMMENT_START, dstr); \
else \
fprintf (STREAM, "\t.word 0x%lx\t%s float %s\n", l, \
ASM_COMMENT_START, dstr); \
} while (0);
#define ASM_OUTPUT_INT(STREAM, EXP) \
{fprintf (STREAM, "\t.word\t"); \
if (flag_pic && GET_CODE(EXP) == CONST && is_pic(EXP)) \
{ \
output_pic_addr_const(STREAM, EXP); \
} \
else output_addr_const(STREAM, EXP); \
arm_increase_location (4); \
fputc ('\n', STREAM);}
#define ASM_OUTPUT_SHORT(STREAM, EXP) \
(fprintf (STREAM, "\t.short\t"), \
output_addr_const (STREAM, (EXP)), \
arm_increase_location (2), \
fputc ('\n', STREAM))
#define ASM_OUTPUT_CHAR(STREAM, EXP) \
(fprintf (STREAM, "\t.byte\t"), \
output_addr_const (STREAM, (EXP)), \
arm_increase_location (1), \
fputc ('\n', STREAM))
#define ASM_OUTPUT_BYTE(STREAM, VALUE) \
(fprintf (STREAM, "\t.byte\t%d\n", VALUE), \
arm_increase_location (1))
#define ASM_OUTPUT_ASCII(STREAM, PTR, LEN) \
output_ascii_pseudo_op ((STREAM), (unsigned char *)(PTR), (LEN))
/* Output a gap. In fact we fill it with nulls. */
#define ASM_OUTPUT_SKIP(STREAM, NBYTES) \
(arm_increase_location (NBYTES), \
fprintf (STREAM, "\t.space\t%d\n", NBYTES))
/* Align output to a power of two. Horrible /bin/as. */
#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
do \
{ \
register int amount = 1 << (POWER); \
extern int arm_text_location; \
\
if (amount == 2) \
fprintf (STREAM, "\t.even\n"); \
else \
fprintf (STREAM, "\t.align\t%d\n", amount - 4); \
\
if (in_text_section ()) \
arm_text_location = ((arm_text_location + amount - 1) \
& ~(amount - 1)); \
} while (0)
/* Output a common block */
#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
(fprintf (STREAM, "\t.comm\t"), \
assemble_name ((STREAM), (NAME)), \
fprintf(STREAM, ", %d\t%s %d\n", ROUNDED, ASM_COMMENT_START, SIZE))
/* Output a local common block. /bin/as can't do this, so hack a `.space' into
the bss segment. Note that this is *bad* practice. */
#define ASM_OUTPUT_LOCAL(STREAM,NAME,SIZE,ROUNDED) \
output_lcomm_directive (STREAM, NAME, SIZE, ROUNDED)
/* Output a source line for the debugger. */
/* #define ASM_OUTPUT_SOURCE_LINE(STREAM,LINE) */
/* Output a #ident directive. */
#define ASM_OUTPUT_IDENT(STREAM,STRING) \
fprintf (STREAM,"- - - ident %s\n",STRING)
/* The assembler's parentheses characters. */
#define ASM_OPEN_PAREN "("
#define ASM_CLOSE_PAREN ")"
/* Target characters. */
#define TARGET_BELL 007
#define TARGET_BS 010
@ -1686,14 +1433,9 @@ do { char dstr[30]; \
if (optimize) \
final_prescan_insn (INSN, OPVEC, NOPERANDS)
#ifndef ASM_COMMENT_START
#define ASM_COMMENT_START "@"
#endif
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
((CODE) == '?' || (CODE) == '|' || (CODE) == '@')
/* Output an operand of an instruction. */
#define PRINT_OPERAND(STREAM, X, CODE) \
arm_print_operand (STREAM, X, CODE)
@ -1706,6 +1448,82 @@ do { char dstr[30]; \
: 0))))
/* Output the address of an operand. */
#define PRINT_OPERAND_ADDRESS(STREAM,X) \
{ \
int is_minus = GET_CODE (X) == MINUS; \
\
if (GET_CODE (X) == REG) \
fprintf (STREAM, "[%s%s, #0]", REGISTER_PREFIX, \
reg_names[REGNO (X)]); \
else if (GET_CODE (X) == PLUS || is_minus) \
{ \
rtx base = XEXP (X, 0); \
rtx index = XEXP (X, 1); \
char *base_reg_name; \
HOST_WIDE_INT offset = 0; \
if (GET_CODE (base) != REG) \
{ \
/* Ensure that BASE is a register (one of them must be). */ \
rtx temp = base; \
base = index; \
index = temp; \
} \
base_reg_name = reg_names[REGNO (base)]; \
switch (GET_CODE (index)) \
{ \
case CONST_INT: \
offset = INTVAL (index); \
if (is_minus) \
offset = -offset; \
fprintf (STREAM, "[%s%s, #%d]", REGISTER_PREFIX, \
base_reg_name, offset); \
break; \
\
case REG: \
fprintf (STREAM, "[%s%s, %s%s%s]", REGISTER_PREFIX, \
base_reg_name, is_minus ? "-" : "", \
REGISTER_PREFIX, reg_names[REGNO (index)] ); \
break; \
\
case MULT: \
case ASHIFTRT: \
case LSHIFTRT: \
case ASHIFT: \
case ROTATERT: \
{ \
fprintf (STREAM, "[%s%s, %s%s%s", REGISTER_PREFIX, \
base_reg_name, is_minus ? "-" : "", REGISTER_PREFIX,\
reg_names[REGNO (XEXP (index, 0))]); \
arm_print_operand (STREAM, index, 'S'); \
fputs ("]", STREAM); \
break; \
} \
\
default: \
abort(); \
} \
} \
else if (GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC \
|| GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC) \
{ \
extern int output_memory_reference_mode; \
\
if (GET_CODE (XEXP (X, 0)) != REG) \
abort (); \
\
if (GET_CODE (X) == PRE_DEC || GET_CODE (X) == PRE_INC) \
fprintf (STREAM, "[%s%s, #%s%d]!", REGISTER_PREFIX, \
reg_names[REGNO (XEXP (X, 0))], \
GET_CODE (X) == PRE_DEC ? "-" : "", \
GET_MODE_SIZE (output_memory_reference_mode)); \
else \
fprintf (STREAM, "[%s%s], #%s%d", REGISTER_PREFIX, \
reg_names[REGNO (XEXP (X, 0))], \
GET_CODE (X) == POST_DEC ? "-" : "", \
GET_MODE_SIZE (output_memory_reference_mode)); \
} \
else output_addr_const(STREAM, X); \
}
/* Handles PIC addr specially */
#define OUTPUT_INT_ADDR_CONST(STREAM,X) \
@ -1720,10 +1538,6 @@ do { char dstr[30]; \
else output_addr_const(STREAM, X); \
}
extern arm_print_operand_address();
#define PRINT_OPERAND_ADDRESS(STREAM,X) arm_print_operand_address(STREAM,X)
/* Position Independent Code. */
/* We decide which register to use based on the compilation options and
the assembler in use; this is more general than the APCS restriction of

127
gnu/usr.bin/gcc/arch/arm32/arm32.md
View File

@ -2024,8 +2024,7 @@
DONE;
}
if (flag_pic &&
(CONSTANT_P (operands[1])
|| CONSTANT_POOL_ADDRESS_P(operands[1])))
(CONSTANT_P (operands[1]) || CONSTANT_POOL_ADDRESS_P (operands[1])))
operands[1] = legitimize_pic_address (operands[1], SImode,
((reload_in_progress
|| reload_completed)
@ -3516,14 +3515,14 @@
arm_ccfsm_state += 2;
return \"\";
}
return output_return_instruction (NULL, TRUE);
return output_return_instruction (NULL, TRUE, FALSE);
}"
[(set_attr "type" "load")])
(define_insn ""
[(set (pc)
(if_then_else (match_operator 0 "comparison_operator"
[(reg 24) (const_int 0)])
[(match_operand 1 "cc_register" "") (const_int 0)])
(return)
(pc)))]
"USE_RETURN_INSN"
@ -3536,7 +3535,7 @@
arm_ccfsm_state += 2;
return \"\";
}
return output_return_instruction (operands[0], TRUE);
return output_return_instruction (operands[0], TRUE, FALSE);
}"
[(set_attr "conds" "use")
(set_attr "type" "load")])
@ -3544,7 +3543,7 @@
(define_insn ""
[(set (pc)
(if_then_else (match_operator 0 "comparison_operator"
[(reg 24) (const_int 0)])
[(match_operand 1 "cc_register" "") (const_int 0)])
(pc)
(return)))]
"USE_RETURN_INSN"
@ -3557,11 +3556,7 @@
arm_ccfsm_state += 2;
return \"\";
}
return output_return_instruction
(gen_rtx (reverse_condition (GET_CODE (operands[0])),
GET_MODE (operands[0]), XEXP (operands[0], 0),
XEXP (operands[0], 1)),
TRUE);
return output_return_instruction (operands[0], TRUE, TRUE);
}"
[(set_attr "conds" "use")
(set_attr "type" "load")])
@ -5316,12 +5311,12 @@
if (arm_ccfsm_state && arm_target_insn && INSN_DELETED_P (arm_target_insn))
{
arm_current_cc ^= 1;
output_return_instruction (NULL, TRUE);
output_return_instruction (NULL, TRUE, FALSE);
arm_ccfsm_state = 0;
arm_target_insn = NULL;
}
output_return_instruction (NULL, FALSE);
output_return_instruction (NULL, FALSE, FALSE);
return \"b%?\\t%a0\";
}"
[(set (attr "conds")
@ -5347,12 +5342,12 @@
if (arm_ccfsm_state && arm_target_insn && INSN_DELETED_P (arm_target_insn))
{
arm_current_cc ^= 1;
output_return_instruction (NULL, TRUE);
output_return_instruction (NULL, TRUE, FALSE);
arm_ccfsm_state = 0;
arm_target_insn = NULL;
}
output_return_instruction (NULL, FALSE);
output_return_instruction (NULL, FALSE, FALSE);
return \"b%?\\t%a1\";
}"
[(set (attr "conds")
@ -5382,12 +5377,12 @@
if (arm_ccfsm_state && arm_target_insn && INSN_DELETED_P (arm_target_insn))
{
arm_current_cc ^= 1;
output_return_instruction (NULL, TRUE);
output_return_instruction (NULL, TRUE, FALSE);
arm_ccfsm_state = 0;
arm_target_insn = NULL;
}
output_return_instruction (NULL, FALSE);
output_return_instruction (NULL, FALSE, FALSE);
return \"b%?\\t%a1\";
}"
[(set (attr "conds")
@ -5396,104 +5391,6 @@
(const_string "nocond")))
(set_attr "length" "8")])
;; If calling a subroutine and then jumping back to somewhere else, but not
;; too far away, then we can set the link register with the branch address
;; and jump direct to the subroutine. On return from the subroutine
;; execution continues at the branch; this avoids a prefetch stall.
;; We use the length attribute (via short_branch ()) to establish whether or
;; not this is possible, this is the same as the sparc does.
(define_peephole
[(parallel[(call (mem:SI (match_operand:SI 0 "" "X"))
(match_operand:SI 1 "general_operand" "g"))
(clobber (reg:SI 14))])
(set (pc)
(label_ref (match_operand 2 "" "")))]
"0 && GET_CODE (operands[0]) == SYMBOL_REF
&& short_branch (INSN_UID (insn), INSN_UID (operands[2]))
&& arm_insn_not_targeted (insn)"
"*
{
int backward = arm_backwards_branch (INSN_UID (insn),
INSN_UID (operands[2]));
#if 0
/* Putting this in means that TARGET_6 code will ONLY run on an arm6 or
* above, leaving it out means that the code will still run on an arm 2 or 3
*/
if (TARGET_6)
{
if (backward)
output_asm_insn (\"sub%?\\t%|lr, %|pc, #(8 + . -%l2)\", operands);
else
output_asm_insn (\"add%?\\t%|lr, %|pc, #(%l2 - . -8)\", operands);
}
else
#endif
{
output_asm_insn (\"mov%?\\t%|lr, %|pc\\t%@ protect cc\", operands);
if (backward)
output_asm_insn (\"sub%?\\t%|lr, %|lr, #(4 + . -%l2)\", operands);
else
output_asm_insn (\"add%?\\t%|lr, %|lr, #(%l2 - . -4)\", operands);
}
return \"b%?\\t%a0\";
}"
[(set (attr "conds")
(if_then_else (eq_attr "cpu" "arm6")
(const_string "clob")
(const_string "nocond")))
(set (attr "length")
(if_then_else (eq_attr "cpu" "arm6")
(const_int 8)
(const_int 12)))])
(define_peephole
[(parallel[(set (match_operand:SI 0 "s_register_operand" "=r")
(call (mem:SI (match_operand:SI 1 "" "X"))
(match_operand:SI 2 "general_operand" "g")))
(clobber (reg:SI 14))])
(set (pc)
(label_ref (match_operand 3 "" "")))]
"0 && GET_CODE (operands[0]) == SYMBOL_REF
&& short_branch (INSN_UID (insn), INSN_UID (operands[3]))
&& arm_insn_not_targeted (insn)"
"*
{
int backward = arm_backwards_branch (INSN_UID (insn),
INSN_UID (operands[3]));
#if 0
/* Putting this in means that TARGET_6 code will ONLY run on an arm6 or
* above, leaving it out means that the code will still run on an arm 2 or 3
*/
if (TARGET_6)
{
if (backward)
output_asm_insn (\"sub%?\\t%|lr, %|pc, #(8 + . -%l3)\", operands);
else
output_asm_insn (\"add%?\\t%|lr, %|pc, #(%l3 - . -8)\", operands);
}
else
#endif
{
output_asm_insn (\"mov%?\\t%|lr, %|pc\\t%@ protect cc\", operands);
if (backward)
output_asm_insn (\"sub%?\\t%|lr, %|lr, #(4 + . -%l3)\", operands);
else
output_asm_insn (\"add%?\\t%|lr, %|lr, #(%l3 - . -4)\", operands);
}
return \"b%?\\t%a1\";
}"
[(set (attr "conds")
(if_then_else (eq_attr "cpu" "arm6")
(const_string "clob")
(const_string "nocond")))
(set (attr "length")
(if_then_else (eq_attr "cpu" "arm6")
(const_int 8)
(const_int 12)))])
(define_split
[(set (pc)
(if_then_else (match_operator 0 "comparison_operator"

2
gnu/usr.bin/gcc/arch/arm32/netbsd.h
View File

@ -54,7 +54,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
/*#undef ASM_DECLARE_FUNCTION_NAME*/
#include "arm32/arm32.h"
#include "arm32/aout.h"
/* NetBSD assembler can cope with $ in labels so lets be compatible */